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authorChris Forbes <[email protected]>2014-09-09 21:15:09 +1200
committerKenneth Graunke <[email protected]>2015-09-22 20:23:46 -0700
commitf5991ebf3418c48486bda072ad7aba247bc21923 (patch)
tree8aced8b8b55195835ba4b5cdb78ca3368af40f6c /src/mesa/drivers/dri/i965/brw_defines.h
parent8ae8feca844c953510e94f116be2fc37fb14ffe0 (diff)
i965: Add defines for tessellation stages
v2 (Ken): - Squash together commits for HS, DS, and TE, as well as fixes. - Add INTEL_MASK variants so we can use SET_FIELD if we want. - Rename GEN7_HS_INSTANCE_CONTROL to GEN7_HS_INSTANCE_COUNT to match the documentation. - Add some more fields from the PRMs. - Add Broadwell variants. Signed-off-by: Chris Forbes <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_defines.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h72
1 files changed, 72 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 8fc8cebf11e..f9d8d1b98f2 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1790,6 +1790,8 @@ enum brw_message_target {
/* DW3: PS */
#define _3DSTATE_SAMPLER_STATE_POINTERS_VS 0x782B /* GEN7+ */
+#define _3DSTATE_SAMPLER_STATE_POINTERS_HS 0x782C /* GEN7+ */
+#define _3DSTATE_SAMPLER_STATE_POINTERS_DS 0x782D /* GEN7+ */
#define _3DSTATE_SAMPLER_STATE_POINTERS_GS 0x782E /* GEN7+ */
#define _3DSTATE_SAMPLER_STATE_POINTERS_PS 0x782F /* GEN7+ */
@@ -1873,6 +1875,8 @@ enum brw_message_target {
#define GEN6_MAX_GS_URB_ENTRY_SIZE_BYTES (5*128)
#define _3DSTATE_PUSH_CONSTANT_ALLOC_VS 0x7912 /* GEN7+ */
+#define _3DSTATE_PUSH_CONSTANT_ALLOC_HS 0x7913 /* GEN7+ */
+#define _3DSTATE_PUSH_CONSTANT_ALLOC_DS 0x7914 /* GEN7+ */
#define _3DSTATE_PUSH_CONSTANT_ALLOC_GS 0x7915 /* GEN7+ */
#define _3DSTATE_PUSH_CONSTANT_ALLOC_PS 0x7916 /* GEN7+ */
# define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16
@@ -1975,8 +1979,76 @@ enum brw_message_target {
#define GEN7_MAX_GS_OUTPUT_VERTEX_SIZE_BYTES (62*16)
#define _3DSTATE_HS 0x781B /* GEN7+ */
+/* DW1 */
+# define GEN7_HS_SAMPLER_COUNT_MASK INTEL_MASK(29, 27)
+# define GEN7_HS_SAMPLER_COUNT_SHIFT 27
+# define GEN7_HS_BINDING_TABLE_ENTRY_COUNT_MASK INTEL_MASK(25, 18)
+# define GEN7_HS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
+# define GEN7_HS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
+# define GEN7_HS_FLOATING_POINT_MODE_ALT (1 << 16)
+# define GEN7_HS_MAX_THREADS_SHIFT 0
+/* DW2 */
+# define GEN7_HS_ENABLE (1 << 31)
+# define GEN7_HS_STATISTICS_ENABLE (1 << 29)
+# define GEN8_HS_MAX_THREADS_SHIFT 8
+# define GEN7_HS_INSTANCE_COUNT_MASK INTEL_MASK(3, 0)
+# define GEN7_HS_INSTANCE_COUNT_SHIFT 0
+/* DW5 */
+# define GEN7_HS_SINGLE_PROGRAM_FLOW (1 << 27)
+# define GEN7_HS_VECTOR_MASK_ENABLE (1 << 26)
+# define HSW_HS_ACCESSES_UAV (1 << 25)
+# define GEN7_HS_INCLUDE_VERTEX_HANDLES (1 << 24)
+# define GEN7_HS_DISPATCH_START_GRF_MASK INTEL_MASK(23, 19)
+# define GEN7_HS_DISPATCH_START_GRF_SHIFT 19
+# define GEN7_HS_URB_READ_LENGTH_MASK INTEL_MASK(16, 11)
+# define GEN7_HS_URB_READ_LENGTH_SHIFT 11
+# define GEN7_HS_URB_ENTRY_READ_OFFSET_MASK INTEL_MASK(9, 4)
+# define GEN7_HS_URB_ENTRY_READ_OFFSET_SHIFT 4
+
#define _3DSTATE_TE 0x781C /* GEN7+ */
+/* DW1 */
+# define GEN7_TE_PARTITIONING_SHIFT 12
+# define GEN7_TE_OUTPUT_TOPOLOGY_SHIFT 8
+# define GEN7_TE_DOMAIN_SHIFT 4
+//# define GEN7_TE_MODE_SW (1 << 1)
+# define GEN7_TE_ENABLE (1 << 0)
+
#define _3DSTATE_DS 0x781D /* GEN7+ */
+/* DW2 */
+# define GEN7_DS_SINGLE_DOMAIN_POINT_DISPATCH (1 << 31)
+# define GEN7_DS_VECTOR_MASK_ENABLE (1 << 30)
+# define GEN7_DS_SAMPLER_COUNT_MASK INTEL_MASK(29, 27)
+# define GEN7_DS_SAMPLER_COUNT_SHIFT 27
+# define GEN7_DS_BINDING_TABLE_ENTRY_COUNT_MASK INTEL_MASK(25, 18)
+# define GEN7_DS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
+# define GEN7_DS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
+# define GEN7_DS_FLOATING_POINT_MODE_ALT (1 << 16)
+# define HSW_DS_ACCESSES_UAV (1 << 14)
+/* DW4 */
+# define GEN7_DS_DISPATCH_START_GRF_MASK INTEL_MASK(24, 20)
+# define GEN7_DS_DISPATCH_START_GRF_SHIFT 20
+# define GEN7_DS_URB_READ_LENGTH_MASK INTEL_MASK(17, 11)
+# define GEN7_DS_URB_READ_LENGTH_SHIFT 11
+# define GEN7_DS_URB_ENTRY_READ_OFFSET_MASK INTEL_MASK(9, 4)
+# define GEN7_DS_URB_ENTRY_READ_OFFSET_SHIFT 4
+/* DW5 */
+# define GEN7_DS_MAX_THREADS_SHIFT 25
+# define HSW_DS_MAX_THREADS_SHIFT 21
+# define GEN7_DS_STATISTICS_ENABLE (1 << 10)
+# define GEN7_DS_SIMD8_DISPATCH_ENABLE (1 << 3)
+# define GEN7_DS_COMPUTE_W_COORDINATE_ENABLE (1 << 2)
+# define GEN7_DS_CACHE_DISABLE (1 << 1)
+# define GEN7_DS_ENABLE (1 << 0)
+/* Gen8+ DW8 */
+# define GEN8_DS_URB_ENTRY_OUTPUT_OFFSET_MASK INTEL_MASK(26, 21)
+# define GEN8_DS_URB_ENTRY_OUTPUT_OFFSET_SHIFT 21
+# define GEN8_DS_URB_OUTPUT_LENGTH_MASK INTEL_MASK(20, 16)
+# define GEN8_DS_URB_OUTPUT_LENGTH_SHIFT 16
+# define GEN8_DS_USER_CLIP_DISTANCE_MASK INTEL_MASK(15, 8)
+# define GEN8_DS_USER_CLIP_DISTANCE_SHIFT 8
+# define GEN8_DS_USER_CULL_DISTANCE_MASK INTEL_MASK(7, 0)
+# define GEN8_DS_USER_CULL_DISTANCE_SHIFT 0
+
#define _3DSTATE_CLIP 0x7812 /* GEN6+ */
/* DW1 */