diff options
| author | Chris Forbes <[email protected]> | 2013-01-24 21:35:15 +1300 |
|---|---|---|
| committer | Chris Forbes <[email protected]> | 2013-03-02 11:40:49 +1300 |
| commit | f52ce6a0ca73d1cd89091689efd8ea2e14748723 (patch) | |
| tree | 5e6037eae92c8fcb30857db1f30c8a9d11501a7c /src/mesa/drivers/dri/i965/brw_defines.h | |
| parent | 555dc6d74de76becac30289c6da0205489057a21 (diff) | |
i965: add a new virtual opcode: SHADER_OPCODE_TXF_MS
This is very similar to the TXF opcode, but lowers to `ld2dms` rather
than `ld` on Gen7.
V4: - add SHADER_OPCODE_TXF_MS to is_tex() functions, so regalloc thinks
it actually writes the correct number of registers. Otherwise in
nontrivial shaders some of the registers tend to get clobbered,
producing bad results.
Signed-off-by: Chris Forbes <[email protected]>
Reviewed-by: Paul Berry <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_defines.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index d0794c841ab..d9b7f9aeb15 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -709,6 +709,7 @@ enum opcode { SHADER_OPCODE_TXL, SHADER_OPCODE_TXS, FS_OPCODE_TXB, + SHADER_OPCODE_TXF_MS, SHADER_OPCODE_SHADER_TIME_ADD, |