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authorKenneth Graunke <[email protected]>2014-02-23 21:59:25 -0800
committerKenneth Graunke <[email protected]>2014-03-04 17:23:03 -0800
commitdfa1ab0e52dde185c80f83b8e354a821f46c2949 (patch)
treeb33e73d8593b511a3652d935a0e1042dcd1faee3 /src/mesa/drivers/dri/i965/brw_defines.h
parent23e81b93bbe3966a842de507988eeaa7342e12ca (diff)
i965: Implement ARB_stencil_texturing on Gen8+.
On earlier hardware, we had to implement math in the shader to translate Y-tiled or untiled coordinates to W-tiled coordinates (which is what BLORP does today in order to texture from stencil buffers). On Broadwell, we can simply state that it's W-tiled in SURFACE_STATE, and adjust the pitch. This is much easier. In the surface state code, I chose to handle the "should we sample depth or stencil?" question separately from the setup for sampling from stencil. This should make it work with the BindRenderbufferTexImage hook as well, and hopefully be reusable for GL_ARB_texture_stencil8 someday. v2: Update docs/GL3.txt (caught by Matt). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_defines.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 01d3cb61414..8a4879ba447 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -264,6 +264,7 @@
#define GEN8_SURFACE_HALIGN_8 (2 << 14)
#define GEN8_SURFACE_HALIGN_16 (3 << 14)
#define GEN8_SURFACE_TILING_NONE (0 << 12)
+#define GEN8_SURFACE_TILING_W (1 << 12)
#define GEN8_SURFACE_TILING_X (2 << 12)
#define GEN8_SURFACE_TILING_Y (3 << 12)
#define BRW_SURFACE_RC_READ_WRITE (1 << 8)