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author | Eric Anholt <[email protected]> | 2013-04-29 11:48:22 -0700 |
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committer | Eric Anholt <[email protected]> | 2013-05-02 15:54:09 -0700 |
commit | 74e670d0a39ee0e7b26a65ee727ff9245b052878 (patch) | |
tree | 8383b40163c7707784667fad9ec8b08c3070e7c2 /src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | |
parent | 15e64de9e68e99579a0a2fbc80763a5bb64267ea (diff) |
i965/vs: Do round-robin register allocation on gen6+ like we do in the FS.
This will free instruction scheduling to make better choices. No
statistically significant performance difference on GLB2.7 (n=93).
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_blorp_blit.cpp')
0 files changed, 0 insertions, 0 deletions