diff options
author | Scott D Phillips <[email protected]> | 2018-09-24 08:33:06 +0300 |
---|---|---|
committer | Tapani Pälli <[email protected]> | 2018-10-23 14:08:05 +0300 |
commit | 11b1afdc92db98e93f2ca50beeb7fc481a11e708 (patch) | |
tree | f53bc832b081664396707a5be7faa8e5138889b1 /src/mesa/drivers/dri/i965/Makefile.am | |
parent | 91d3a5d1a86915480e9e07cf370ad0e9743ab5b5 (diff) |
i965/tiled_memcpy: inline movntdqa loads in tiled_to_linear
The reference for MOVNTDQA says:
For WC memory type, the nontemporal hint may be implemented by
loading a temporary internal buffer with the equivalent of an
aligned cache line without filling this data to the cache.
[...] Subsequent MOVNTDQA reads to unread portions of the WC
cache line will receive data from the temporary internal
buffer if data is available.
This hidden cache line sized temporary buffer can improve the
read performance from wc maps.
v2: Add mfence at start of tiled_to_linear for streaming loads (Chris)
v3: add Android build support (Tapani)
v4: squash 'fix i915: Fix streaming loads for intel_tiled_memcpy'
separate sse41 to own static library (Tapani)
Reviewed-by: Chris Wilson <[email protected]> (v2)
Reviewed-by: Matt Turner <[email protected]> (v2)
Acked-by: Kenneth Graunke <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
Signed-off-by: Tapani Pälli <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/Makefile.am')
-rw-r--r-- | src/mesa/drivers/dri/i965/Makefile.am | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile.am b/src/mesa/drivers/dri/i965/Makefile.am index 0afa7a2f216..dc19da2c4a6 100644 --- a/src/mesa/drivers/dri/i965/Makefile.am +++ b/src/mesa/drivers/dri/i965/Makefile.am @@ -92,8 +92,20 @@ libi965_gen11_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=110 noinst_LTLIBRARIES = \ libi965_dri.la \ + libintel_tiled_memcpy.la \ + libintel_tiled_memcpy_sse41.la \ $(I965_PERGEN_LIBS) +libintel_tiled_memcpy_la_SOURCES = \ + $(intel_tiled_memcpy_FILES) +libintel_tiled_memcpy_la_CFLAGS = \ + $(AM_CFLAGS) + +libintel_tiled_memcpy_sse41_la_SOURCES = \ + $(intel_tiled_memcpy_sse41_FILES) +libintel_tiled_memcpy_sse41_la_CFLAGS = \ + $(AM_CFLAGS) $(SSE41_CFLAGS) + libi965_dri_la_SOURCES = \ $(i965_FILES) \ $(i965_oa_GENERATED_FILES) @@ -104,6 +116,8 @@ libi965_dri_la_LIBADD = \ $(top_builddir)/src/intel/compiler/libintel_compiler.la \ $(top_builddir)/src/intel/blorp/libblorp.la \ $(I965_PERGEN_LIBS) \ + libintel_tiled_memcpy.la \ + libintel_tiled_memcpy_sse41.la \ $(LIBDRM_LIBS) BUILT_SOURCES = $(i965_oa_GENERATED_FILES) |