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authorKenneth Graunke <[email protected]>2014-07-26 13:12:37 -0700
committerKenneth Graunke <[email protected]>2014-08-02 05:16:40 -0700
commit7679393f561ca4f0e9c9587d4b208b035b7b9098 (patch)
treec4251cccc885439e3e3812df28b49b1e212bc408 /src/mesa/drivers/dri/i915/intel_reg.h
parenta50b640dfe3580049e07bfdafb2e69410844359d (diff)
i965: Make brw_update_sampler_state use 8 bits for LOD fields on Gen7+.
This was the only actual difference between Gen4-6 and Gen7+ in terms of the values we program. The rest was just mechanical structure rearrangement. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i915/intel_reg.h')
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