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authorRoss Zwisler <[email protected]>2019-12-18 19:56:24 -0700
committerLionel Landwerlin <[email protected]>2019-12-20 10:47:52 +0000
commitcabcbb4db0fcc6bc204169b1ba0deca4561e67ee (patch)
tree60f67df50d268bf70a50897388d4d58166c9a9e6 /src/intel
parentc57337bbd3e3620bcb0f38d23f43ea58c382737d (diff)
intel: limit shader geometry on BDW GT1
Similar to the SKL GT1 fix introduced here: https://gitlab.freedesktop.org/asimiklit/mesa/commit/b1ba7ffdbd54fdb5da18d086c7b7a830e06a1cff we need to limit the .urb.max_entries[MESA_SHADER_GEOMETRY] on BDW GT1 to address failures in these two tests: dEQP-GLES31.functional.geometry_shading.layered.render_with_default_layer_3d dEQP-GLES31.functional.geometry_shading.layered.render_with_default_layer_2d_array The value 690 was found via bisection. 691 is the actual max on the hardware I'm using, but 690 seemed like a nice round number. Signed-off-by: Ross Zwisler <[email protected]> Signed-off-by: Lionel Landwerlin <[email protected]> Acked-by: Lionel Landwerlin <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3173> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3173>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/dev/gen_device_info.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c
index 23306475b3e..520b87073a7 100644
--- a/src/intel/dev/gen_device_info.c
+++ b/src/intel/dev/gen_device_info.c
@@ -446,7 +446,8 @@ static const struct gen_device_info gen_device_info_bdw_gt1 = {
[MESA_SHADER_VERTEX] = 2560,
[MESA_SHADER_TESS_CTRL] = 504,
[MESA_SHADER_TESS_EVAL] = 1536,
- [MESA_SHADER_GEOMETRY] = 960,
+ /* Reduced from 960, seems to be similar to the bug on Gen9 GT1. */
+ [MESA_SHADER_GEOMETRY] = 690,
},
},
.simulator_id = 11,