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authorJason Ekstrand <[email protected]>2016-09-08 10:26:15 -0700
committerJason Ekstrand <[email protected]>2016-09-13 12:40:12 -0700
commitc0b9776cd607d059367b407b18d5c3c2c264099b (patch)
tree00110e7cc29a8079f87ae4794acc0b045fca8df7 /src/intel
parent00e79cec995b8c654783860613bc36b90d3d33dc (diff)
intel/isl: Divide QPitch by 2 for 3-D stencil textures on SKL+
Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/isl/isl_surface_state.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index cd7a0845c78..f22bf361fb6 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -173,7 +173,20 @@ get_qpitch(const struct isl_surf *surf)
unreachable("Bad isl_surf_dim");
case ISL_DIM_LAYOUT_GEN4_2D:
if (GEN_GEN >= 9) {
- return isl_surf_get_array_pitch_el_rows(surf);
+ if (surf->dim == ISL_SURF_DIM_3D && surf->tiling == ISL_TILING_W) {
+ /* This is rather annoying and completely undocumented. It
+ * appears that the hardware has a bug (or undocumented feature)
+ * regarding stencil buffers most likely related to the way
+ * W-tiling is handled as modified Y-tiling. If you bind a 3-D
+ * stencil buffer normally, and use texelFetch on it, the z or
+ * array index will get implicitly multiplied by 2 for no obvious
+ * reason. The fix appears to be to divide qpitch by 2 for
+ * W-tiled surfaces.
+ */
+ return isl_surf_get_array_pitch_el_rows(surf) / 2;
+ } else {
+ return isl_surf_get_array_pitch_el_rows(surf);
+ }
} else {
/* From the Broadwell PRM for RENDER_SURFACE_STATE.QPitch
*