diff options
author | Jason Ekstrand <[email protected]> | 2016-09-19 22:04:40 -0700 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2016-11-16 10:10:26 -0800 |
commit | b3bc8068550d2efc98c49d7d82a6aa40154f76fe (patch) | |
tree | e4591cae1e83cd0d8ec2b1395fa3023714c1c0a9 /src/intel | |
parent | ba349e106ec2aa48798676dd33edcf643d168b8e (diff) |
intel/isl: Add some basic info about RENDER_SURFACE_STATE to isl_device
Signed-off-by: Jason Ekstrand <[email protected]>
Reviewed-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r-- | src/intel/blorp/blorp_genX_exec.h | 33 | ||||
-rw-r--r-- | src/intel/isl/isl.c | 19 | ||||
-rw-r--r-- | src/intel/isl/isl.h | 11 | ||||
-rw-r--r-- | src/intel/vulkan/anv_batch_chain.c | 4 | ||||
-rw-r--r-- | src/intel/vulkan/genX_cmd_buffer.c | 8 |
5 files changed, 44 insertions, 31 deletions
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 5921190e2bd..86da7892eaf 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -996,28 +996,13 @@ blorp_emit_depth_stencil_state(struct blorp_batch *batch, return offset; } -struct surface_state_info { - unsigned num_dwords; - unsigned ss_align; /* Required alignment of RENDER_SURFACE_STATE in bytes */ - unsigned reloc_dw; - unsigned aux_reloc_dw; -}; - -static const struct surface_state_info surface_state_infos[] = { - [6] = {6, 32, 1, 0}, - [7] = {8, 32, 1, 6}, - [8] = {13, 64, 8, 10}, - [9] = {16, 64, 8, 10}, -}; - static void blorp_emit_surface_state(struct blorp_batch *batch, const struct brw_blorp_surface_info *surface, - uint32_t *state, uint32_t state_offset, + void *state, uint32_t state_offset, bool is_render_target) { - const struct surface_state_info ss_info = surface_state_infos[GEN_GEN]; - + const struct isl_device *isl_dev = batch->blorp->isl_dev; struct isl_surf surf = surface->surf; if (surf.dim == ISL_SURF_DIM_1D && @@ -1039,7 +1024,7 @@ blorp_emit_surface_state(struct blorp_batch *batch, .aux_surf = &surface->aux_surf, .aux_usage = aux_usage, .mocs = mocs, .clear_color = surface->clear_color); - blorp_surface_reloc(batch, state_offset + ss_info.reloc_dw * 4, + blorp_surface_reloc(batch, state_offset + isl_dev->ss.addr_offset, surface->addr, 0); if (aux_usage != ISL_AUX_USAGE_NONE) { @@ -1048,8 +1033,9 @@ blorp_emit_surface_state(struct blorp_batch *batch, * surface buffer addresses are always 4K page alinged. */ assert((surface->aux_addr.offset & 0xfff) == 0); - blorp_surface_reloc(batch, state_offset + ss_info.aux_reloc_dw * 4, - surface->aux_addr, state[ss_info.aux_reloc_dw]); + uint32_t *aux_addr = state + isl_dev->ss.aux_addr_offset; + blorp_surface_reloc(batch, state_offset + isl_dev->ss.aux_addr_offset, + surface->aux_addr, *aux_addr); } } @@ -1087,14 +1073,13 @@ static void blorp_emit_surface_states(struct blorp_batch *batch, const struct blorp_params *params) { + const struct isl_device *isl_dev = batch->blorp->isl_dev; uint32_t bind_offset, surface_offsets[2]; void *surface_maps[2]; - const unsigned ss_size = GENX(RENDER_SURFACE_STATE_length) * 4; - const unsigned ss_align = GENX(RENDER_SURFACE_STATE_length) > 8 ? 64 : 32; - unsigned num_surfaces = 1 + params->src.enabled; - blorp_alloc_binding_table(batch, num_surfaces, ss_size, ss_align, + blorp_alloc_binding_table(batch, num_surfaces, + isl_dev->ss.size, isl_dev->ss.align, &bind_offset, surface_offsets, surface_maps); if (params->dst.enabled) { diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 32463b12982..658650ba6f3 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -46,6 +46,20 @@ __isl_finishme(const char *file, int line, const char *fmt, ...) fprintf(stderr, "%s:%d: FINISHME: %s\n", file, line, buf); } +static const struct { + uint8_t size; + uint8_t align; + uint8_t addr_offset; + uint8_t aux_addr_offset; +} ss_infos[] = { + [4] = {24, 32, 4}, + [5] = {24, 32, 4}, + [6] = {24, 32, 4}, + [7] = {32, 32, 4, 24}, + [8] = {52, 64, 32, 40}, + [9] = {64, 64, 32, 40}, +}; + void isl_device_init(struct isl_device *dev, const struct gen_device_info *info, @@ -67,6 +81,11 @@ isl_device_init(struct isl_device *dev, assert(info->has_hiz_and_separate_stencil); if (info->must_use_separate_stencil) assert(ISL_DEV_USE_SEPARATE_STENCIL(dev)); + + dev->ss.size = ss_infos[ISL_DEV_GEN(dev)].size; + dev->ss.align = ss_infos[ISL_DEV_GEN(dev)].align; + dev->ss.addr_offset = ss_infos[ISL_DEV_GEN(dev)].addr_offset; + dev->ss.aux_addr_offset = ss_infos[ISL_DEV_GEN(dev)].aux_addr_offset; } /** diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 11ad8919e64..07368f9bcf5 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -671,6 +671,17 @@ struct isl_device { const struct gen_device_info *info; bool use_separate_stencil; bool has_bit6_swizzling; + + /** + * Describes the layout of a RENDER_SURFACE_STATE structure for the + * current gen. + */ + struct { + uint8_t size; + uint8_t align; + uint8_t addr_offset; + uint8_t aux_addr_offset; + } ss; }; struct isl_extent2d { diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c index 6f05867ff71..cca8867b0cd 100644 --- a/src/intel/vulkan/anv_batch_chain.c +++ b/src/intel/vulkan/anv_batch_chain.c @@ -620,7 +620,9 @@ anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer, struct anv_state anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer) { - return anv_state_stream_alloc(&cmd_buffer->surface_state_stream, 64, 64); + struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; + return anv_state_stream_alloc(&cmd_buffer->surface_state_stream, + isl_dev->ss.size, isl_dev->ss.align); } struct anv_state diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index edf5f8eb539..25dc2567226 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -622,14 +622,10 @@ add_surface_state_reloc(struct anv_cmd_buffer *cmd_buffer, struct anv_state state, struct anv_bo *bo, uint32_t offset) { - /* The address goes in SURFACE_STATE dword 1 for gens < 8 and dwords 8 and - * 9 for gen8+. We only write the first dword for gen8+ here and rely on - * the initial state to set the high bits to 0. */ - - const uint32_t dword = GEN_GEN < 8 ? 1 : 8; + const struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; anv_reloc_list_add(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc, - state.offset + dword * 4, bo, offset); + state.offset + isl_dev->ss.addr_offset, bo, offset); } static struct anv_state |