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authorRafael Antognolli <[email protected]>2018-10-23 09:03:32 -0700
committerRafael Antognolli <[email protected]>2019-04-22 16:54:00 -0700
commit9ea90aae1e778c56381c63fc43cfe6a29a25c45f (patch)
tree931024a3c7be49669f483e8ea49c876960ea12c2 /src/intel
parentc0504569eac5e5c305e9f0c240e248aca9d8891f (diff)
intel/fs: Add a lowering pass for linear interpolation.
On gen11, instead of using a PLN instruction, we convert FS_OPCODE_LINTERP to 2 or 4 multiply adds. That is done in the fs_generator code. This patch adds a lowering pass that does the same thing at the fs_visitor. It also drops the usage of NF types, since we don't need the extra precision and it lets us skip the accumulator. With all that, some optimizations will still be run on the generated code, and we should get better scheduling. v2: Update comment about saturation and conditional mod (Matt) Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/compiler/brw_fs.cpp46
-rw-r--r--src/intel/compiler/brw_fs.h1
2 files changed, 47 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 8d72eb8837d..22eefd4ef49 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -3877,6 +3877,47 @@ fs_visitor::lower_load_payload()
}
bool
+fs_visitor::lower_linterp()
+{
+ bool progress = false;
+
+ if (devinfo->gen < 11)
+ return false;
+
+ foreach_block_and_inst_safe(block, fs_inst, inst, cfg) {
+ const fs_builder ibld(this, block, inst);
+
+ if (inst->opcode != FS_OPCODE_LINTERP)
+ continue;
+
+ fs_reg dwP = component(inst->src[1], 0);
+ fs_reg dwQ = component(inst->src[1], 1);
+ fs_reg dwR = component(inst->src[1], 3);
+ for (unsigned i = 0; i < DIV_ROUND_UP(dispatch_width, 8); i++) {
+ const fs_builder hbld(ibld.half(i));
+ fs_reg dst = half(inst->dst, i);
+ fs_reg delta_xy = offset(inst->src[0], ibld, i);
+ hbld.MAD(dst, dwR, half(delta_xy, 0), dwP);
+ fs_inst *mad = hbld.MAD(dst, dst, half(delta_xy, 1), dwQ);
+
+ /* Propagate conditional mod and saturate from the original
+ * instruction to the second MAD instruction.
+ */
+ set_saturate(inst->saturate, mad);
+ set_condmod(inst->conditional_mod, mad);
+ }
+
+ inst->remove(block);
+ progress = true;
+ }
+
+ if (progress)
+ invalidate_live_intervals();
+
+ return progress;
+}
+
+bool
fs_visitor::lower_integer_multiplication()
{
bool progress = false;
@@ -7070,6 +7111,11 @@ fs_visitor::optimize()
OPT(compact_virtual_grfs);
} while (progress);
+ if (OPT(lower_linterp)) {
+ OPT(opt_copy_propagation);
+ OPT(dead_code_eliminate);
+ }
+
/* Do this after cmod propagation has had every possible opportunity to
* propagate results into SEL instructions.
*/
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index e8af99e1705..f05a9e0625a 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -167,6 +167,7 @@ public:
bool lower_pack();
bool lower_regioning();
bool lower_logical_sends();
+ bool lower_linterp();
bool lower_integer_multiplication();
bool lower_minmax();
bool lower_simd_width();