intel/compiler: Extract control barriers from scoped barriers

Add a lowering pass extracting all control barriers embedded in scoped
barriers into proper control barriers so we can get rid of the logic
inserting control barriers when an SpvOpControlBarrier with WorkGroup
scope is parsed in spirv_to_nir().

Signed-off-by: Boris Brezillon <[email protected]>
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4900>

4 files changed, 87 insertions, 0 deletions

diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index ff1b3bf5572..61c1e190b23 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -916,6 +916,7 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
 
    UNUSED bool progress; /* Written by OPT */
 
+   OPT(brw_nir_lower_scoped_barriers);
    OPT(nir_opt_combine_memory_barriers, combine_all_barriers, NULL);
 
    do {
diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h
index c2dd970647d..246218375f7 100644
--- a/src/intel/compiler/brw_nir.h
+++ b/src/intel/compiler/brw_nir.h
@@ -119,6 +119,8 @@ void brw_nir_lower_fs_outputs(nir_shader *nir);
 
 bool brw_nir_lower_conversions(nir_shader *nir);
 
+bool brw_nir_lower_scoped_barriers(nir_shader *nir);
+
 bool brw_nir_lower_image_load_store(nir_shader *nir,
                                     const struct gen_device_info *devinfo,
                                     bool *uses_atomic_load_store);
diff --git a/src/intel/compiler/brw_nir_lower_scoped_barriers.c b/src/intel/compiler/brw_nir_lower_scoped_barriers.c
new file mode 100644
index 00000000000..bc78ff1985f
--- /dev/null
+++ b/src/intel/compiler/brw_nir_lower_scoped_barriers.c
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2020 Intel Corporation
+ * Copyright (c) 2020 Collabora Ltd
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/*
+ * Lower scoped barriers embedding a control barrier (execusion_scope != NONE)
+ * to scoped_barriers-without-control-barrier + control_barrier.
+ */
+
+#include "brw_nir.h"
+#include "compiler/nir/nir_builder.h"
+
+static bool
+lower_impl(nir_function_impl *impl)
+{
+   nir_builder b;
+   nir_builder_init(&b, impl);
+   bool progress = false;
+
+   nir_foreach_block(block, impl) {
+      nir_foreach_instr_safe(instr, block) {
+         if (instr->type != nir_instr_type_intrinsic)
+            continue;
+
+         nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
+
+         if (intr->intrinsic != nir_intrinsic_scoped_barrier ||
+             nir_intrinsic_execution_scope(intr) == NIR_SCOPE_NONE)
+            continue;
+
+         if (nir_intrinsic_execution_scope(intr) == NIR_SCOPE_WORKGROUP) {
+            b.cursor = nir_after_instr(&intr->instr);
+            nir_intrinsic_instr *cbarrier =
+               nir_intrinsic_instr_create(b.shader,
+                                          nir_intrinsic_control_barrier);
+            nir_builder_instr_insert(&b, &cbarrier->instr);
+         }
+
+         nir_intrinsic_set_execution_scope(intr, NIR_SCOPE_NONE);
+         progress = true;
+      }
+   }
+
+   if (progress) {
+      nir_metadata_preserve(impl, nir_metadata_block_index |
+                                  nir_metadata_dominance);
+   }
+
+   return progress;
+}
+
+bool
+brw_nir_lower_scoped_barriers(nir_shader *nir)
+{
+   bool progress = false;
+
+   nir_foreach_function(function, nir) {
+      if (function->impl)
+         progress |= lower_impl(function->impl);
+   }
+
+   return progress;
+}
diff --git a/src/intel/compiler/meson.build b/src/intel/compiler/meson.build
index 480185a0913..452f71238ff 100644
--- a/src/intel/compiler/meson.build
+++ b/src/intel/compiler/meson.build
@@ -85,6 +85,7 @@ libintel_compiler_files = files(
   'brw_nir_lower_alpha_to_coverage.c',
   'brw_nir_lower_image_load_store.c',
   'brw_nir_lower_mem_access_bit_sizes.c',
+  'brw_nir_lower_scoped_barriers.c',
   'brw_nir_opt_peephole_ffma.c',
   'brw_nir_tcs_workarounds.c',
   'brw_nir_clamp_image_1d_2d_array_sizes.c',