diff options
| author | Rafael Antognolli <[email protected]> | 2020-02-28 13:57:07 -0800 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-03-02 22:28:11 +0000 |
| commit | 43dc842cb91c195fe7bb47a7ce324425096bf6f5 (patch) | |
| tree | ac3d2dba56a0655c215b6ef6667ee556a00b2b97 /src/intel | |
| parent | 3ca3050de57e60e86c1e3ccfa9d57689ffc5a820 (diff) | |
anv: Wait for the GPU to be idle before invalidating the aux table.
Reviewed-by: Jason Ekstrand <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/vulkan/genX_cmd_buffer.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index b270b79fd40..7e8c2d57eba 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -2029,6 +2029,16 @@ genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer) if (bits & ANV_PIPE_FLUSH_BITS) bits |= ANV_PIPE_NEEDS_END_OF_PIPE_SYNC_BIT; + + /* HSD 1209978178: docs say that before programming the aux table: + * + * "Driver must ensure that the engine is IDLE but ensure it doesn't + * add extra flushes in the case it knows that the engine is already + * IDLE." + */ + if (GEN_GEN == 12 && ANV_PIPE_AUX_TABLE_INVALIDATE_BIT) + bits |= ANV_PIPE_NEEDS_END_OF_PIPE_SYNC_BIT; + /* If we're going to do an invalidate and we have a pending end-of-pipe * sync that has yet to be resolved, we do the end-of-pipe sync now. */ |