diff options
| author | Kenneth Graunke <[email protected]> | 2018-01-07 22:29:34 -0800 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2018-01-09 10:13:53 -0800 |
| commit | 28c2d0d80b2ba15cc56651c0d3e6bc6eb31f9594 (patch) | |
| tree | f5514fc09671be5142391d5b20b8ea1832d2a353 /src/intel | |
| parent | 8eadc2fb8fe395ea0a8202217bd5545978962d1d (diff) | |
genxml: Add missing INSTDONE_1 bits on Gen7.5+.
This will make aubinator_error_decode decode them properly.
Reviewed-by: Lionel Landwerlin <[email protected]>
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/genxml/gen10.xml | 2 | ||||
| -rw-r--r-- | src/intel/genxml/gen75.xml | 2 | ||||
| -rw-r--r-- | src/intel/genxml/gen8.xml | 2 | ||||
| -rw-r--r-- | src/intel/genxml/gen9.xml | 2 |
4 files changed, 8 insertions, 0 deletions
diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml index a6b8f48fda5..47c679a3fa9 100644 --- a/src/intel/genxml/gen10.xml +++ b/src/intel/genxml/gen10.xml @@ -3637,6 +3637,8 @@ <field name="TSG Done" start="17" end="17" type="bool"/> <field name="GAFM Done" start="18" end="18" type="bool"/> <field name="GAM Done" start="19" end="19" type="bool"/> + <field name="RS Done" start="20" end="20" type="bool"/> + <field name="CS Done" start="21" end="21" type="bool"/> <field name="SDE Done" start="22" end="22" type="bool"/> <field name="RCCFBC CS Done" start="23" end="23" type="bool"/> </register> diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml index e2fd856197d..be537aff0ae 100644 --- a/src/intel/genxml/gen75.xml +++ b/src/intel/genxml/gen75.xml @@ -3046,6 +3046,8 @@ <field name="TSG Done" start="17" end="17" type="bool"/> <field name="GAFM Done" start="18" end="18" type="bool"/> <field name="GAM Done" start="19" end="19" type="bool"/> + <field name="RS Done" start="20" end="20" type="bool"/> + <field name="CS Done" start="21" end="21" type="bool"/> <field name="SDE Done" start="22" end="22" type="bool"/> <field name="RCCFBC CS Done" start="23" end="23" type="bool"/> </register> diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml index a89283ded6b..c075eecc34a 100644 --- a/src/intel/genxml/gen8.xml +++ b/src/intel/genxml/gen8.xml @@ -3300,6 +3300,8 @@ <field name="TSG Done" start="17" end="17" type="bool"/> <field name="GAFM Done" start="18" end="18" type="bool"/> <field name="GAM Done" start="19" end="19" type="bool"/> + <field name="RS Done" start="20" end="20" type="bool"/> + <field name="CS Done" start="21" end="21" type="bool"/> <field name="SDE Done" start="22" end="22" type="bool"/> <field name="RCCFBC CS Done" start="23" end="23" type="bool"/> </register> diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml index f07ed748ac7..7eef4bee013 100644 --- a/src/intel/genxml/gen9.xml +++ b/src/intel/genxml/gen9.xml @@ -3583,6 +3583,8 @@ <field name="TSG Done" start="17" end="17" type="bool"/> <field name="GAFM Done" start="18" end="18" type="bool"/> <field name="GAM Done" start="19" end="19" type="bool"/> + <field name="RS Done" start="20" end="20" type="bool"/> + <field name="CS Done" start="21" end="21" type="bool"/> <field name="SDE Done" start="22" end="22" type="bool"/> <field name="RCCFBC CS Done" start="23" end="23" type="bool"/> </register> |