diff options
author | Plamena Manolova <[email protected]> | 2019-03-12 21:25:36 +0200 |
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committer | Plamena Manolova <[email protected]> | 2019-03-14 13:04:12 +0000 |
commit | 19ab08200179e71af42ce6e1b91f502e50f915b3 (patch) | |
tree | bfb723fe39f26df95197b7d75b98dfe3165de46b /src/intel | |
parent | 0c3adaad22c34742058a9f52138cfd37778ef6df (diff) |
i965: Disable ARB_fragment_shader_interlock for platforms prior to GEN9
ARB_fragment_shader_interlock depends on memory fences to
ensure fragment ordering and this ordering guarantee is
only supported from GEN9 onwards.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109980
Fixes: 939312702e35 "i965: Add ARB_fragment_shader_interlock support."
Signed-off-by: Plamena Manolova <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r-- | src/intel/compiler/brw_fs_generator.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 649dd999a0e..c24d4eb7cab 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -2100,6 +2100,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width) break; case SHADER_OPCODE_INTERLOCK: + assert(devinfo->gen >= 9); /* The interlock is basically a memory fence issued via sendc */ brw_memory_fence(p, dst, BRW_OPCODE_SENDC); break; |