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authorTopi Pohjolainen <[email protected]>2017-05-14 19:02:20 +0300
committerTopi Pohjolainen <[email protected]>2017-06-17 06:38:56 +0300
commit0d1af164e197756e2d804e479e0f3e735a25f26c (patch)
treefa4b518dccd0291c4eed6443b36040673cd976e3 /src/intel
parente3f5b8ac168fe3d3afa48906ea56465a5836ac58 (diff)
intel/isl/gen6: Allow arrayed stencil
Nothing prevents arrayed stencil surfaces even though hardware doesn't support mipmapping. Reviewed-by: Nanley Chery <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/isl/isl.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 351612ad4f7..2449ffb29ae 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -447,7 +447,6 @@ isl_choose_array_pitch_span(const struct isl_device *dev,
* the storage for LODs other than LOD 0 is not needed.
*/
assert(info->levels == 1);
- assert(phys_level0_sa->array_len == 1);
return ISL_ARRAY_PITCH_SPAN_COMPACT;
} else {
if ((ISL_DEV_GEN(dev) == 5 || ISL_DEV_GEN(dev) == 6) &&