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authorJason Ekstrand <[email protected]>2016-11-12 11:28:17 -0800
committerJason Ekstrand <[email protected]>2016-11-16 10:09:10 -0800
commit9359835fcb26ff04ba8df9fcd89465af1bfc7274 (patch)
tree93c91e0923fcf08a0d55b65d61133bf340924c15 /src/intel/vulkan
parent5706d2590feaf69b48d46fb8f948867f398e2415 (diff)
anv/pipline: Re-order state emission and make it consistent
This commit makes both gen7 and gen8 pipeline setup emit state packets in exactly the same order. Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
Diffstat (limited to 'src/intel/vulkan')
-rw-r--r--src/intel/vulkan/gen7_pipeline.c7
-rw-r--r--src/intel/vulkan/gen8_pipeline.c6
2 files changed, 5 insertions, 8 deletions
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 02f18e71591..192175658fb 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -68,9 +68,8 @@ genX(graphics_pipeline_create)(
assert(pCreateInfo->pRasterizationState);
emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
pCreateInfo->pMultisampleState, pass, subpass);
-
+ emit_ms_state(pipeline, pCreateInfo->pMultisampleState);
emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass);
-
emit_cb_state(pipeline, pCreateInfo->pColorBlendState,
pCreateInfo->pMultisampleState);
@@ -80,8 +79,6 @@ genX(graphics_pipeline_create)(
pCreateInfo->pRasterizationState);
emit_3dstate_streamout(pipeline, pCreateInfo->pRasterizationState);
- emit_ms_state(pipeline, pCreateInfo->pMultisampleState);
-
#if 0
/* From gen7_vs_state.c */
@@ -104,8 +101,8 @@ genX(graphics_pipeline_create)(
emit_3dstate_vs(pipeline);
emit_3dstate_gs(pipeline);
emit_3dstate_sbe(pipeline);
- emit_3dstate_ps(pipeline);
emit_3dstate_wm(pipeline, pCreateInfo->pMultisampleState);
+ emit_3dstate_ps(pipeline);
*pPipeline = anv_pipeline_to_handle(pipeline);
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index 186d0401f35..3980be5b55e 100644
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -64,7 +64,6 @@ genX(graphics_pipeline_create)(
assert(pCreateInfo->pVertexInputState);
emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
- emit_3dstate_vf_topology(pipeline);
assert(pCreateInfo->pRasterizationState);
emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
pCreateInfo->pMultisampleState, pass, subpass);
@@ -79,12 +78,13 @@ genX(graphics_pipeline_create)(
pCreateInfo->pRasterizationState);
emit_3dstate_streamout(pipeline, pCreateInfo->pRasterizationState);
- emit_3dstate_wm(pipeline, pCreateInfo->pMultisampleState);
- emit_3dstate_gs(pipeline);
emit_3dstate_vs(pipeline);
+ emit_3dstate_gs(pipeline);
emit_3dstate_sbe(pipeline);
+ emit_3dstate_wm(pipeline, pCreateInfo->pMultisampleState);
emit_3dstate_ps(pipeline);
emit_3dstate_ps_extra(pipeline);
+ emit_3dstate_vf_topology(pipeline);
*pPipeline = anv_pipeline_to_handle(pipeline);