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authorRafael Antognolli <[email protected]>2019-04-30 13:34:20 -0700
committerRafael Antognolli <[email protected]>2019-10-30 19:51:03 +0000
commit3c317e8187271dac7461cd193167b06a61f56bfc (patch)
treee2fd492b640b43e921e9b5c4e4a22c951334d5f1 /src/intel/vulkan/anv_private.h
parenta99c67b690cf7f7b92c25b859719331c8a496f03 (diff)
anv: Add Tile Cache Flush for Unified Cache.
Diffstat (limited to 'src/intel/vulkan/anv_private.h')
-rw-r--r--src/intel/vulkan/anv_private.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index fa62c4e9d1c..5642f03355c 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -2046,6 +2046,7 @@ enum anv_pipe_bits {
ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT = (1 << 3),
ANV_PIPE_VF_CACHE_INVALIDATE_BIT = (1 << 4),
ANV_PIPE_DATA_CACHE_FLUSH_BIT = (1 << 5),
+ ANV_PIPE_TILE_CACHE_FLUSH_BIT = (1 << 6),
ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT = (1 << 10),
ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT = (1 << 11),
ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT = (1 << 12),
@@ -2071,7 +2072,8 @@ enum anv_pipe_bits {
#define ANV_PIPE_FLUSH_BITS ( \
ANV_PIPE_DEPTH_CACHE_FLUSH_BIT | \
ANV_PIPE_DATA_CACHE_FLUSH_BIT | \
- ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT)
+ ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | \
+ ANV_PIPE_TILE_CACHE_FLUSH_BIT)
#define ANV_PIPE_STALL_BITS ( \
ANV_PIPE_STALL_AT_SCOREBOARD_BIT | \