aboutsummaryrefslogtreecommitdiffstats
path: root/src/intel/tools/intel_aub.h
diff options
context:
space:
mode:
authorJason Ekstrand <[email protected]>2017-11-02 14:52:49 -0700
committerJason Ekstrand <[email protected]>2017-11-07 10:37:52 -0800
commite8c9e65185de3e821e1e482e77906d1d51efa3ec (patch)
tree4fb62ea6392217387ed81a6fc7fe63dc98bd5e4c /src/intel/tools/intel_aub.h
parentbd24f4890f7f4b4a2c2c6e92163f655904b8709a (diff)
intel/fs: Use a pure vertical stride for large register strides
Register strides higher than 4 are uncommon but they can happen. For instance, if you have a 64-bit extract_u8 operation, we turn that into UB -> UQ MOV with a source stride of 8. Our previous calculation would try to generate a stride of <32;8,8>:ub which is invalid because the maximum horizontal stride is 4. To solve this problem, we instead use a stride of <8;1,0>. As noted in the comment, this does not work as a destination but that's ok as very few things actually generate that stride. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Cc: [email protected]
Diffstat (limited to 'src/intel/tools/intel_aub.h')
0 files changed, 0 insertions, 0 deletions