diff options
author | Sagar Ghuge <[email protected]> | 2019-10-23 16:24:46 -0700 |
---|---|---|
committer | Sagar Ghuge <[email protected]> | 2019-10-29 14:46:15 -0700 |
commit | c4011867624808c4c51ae1d19dfd09fd1d455670 (patch) | |
tree | 550ecb12999538663b61dd376eb6ef7ae0850331 /src/intel/isl/isl_emit_depth_stencil.c | |
parent | 53d472df24d4bc05359120df0615321318922d6d (diff) |
intel: Track stencil aux usage on Gen12+
Enable stencil compression enable and control surface enable bit if
stencil buffer lossless compression is enabled.
v2: Remove unnecessary GEN_GEN check (Nanley Chery)
v3: (Nanley Chery)
- Change commit subject tag from intel/isl to intel
- Keep assignment order correct
Signed-off-by: Sagar Ghuge <[email protected]>
Reviewed-by: Nanley Chery <[email protected]>
Diffstat (limited to 'src/intel/isl/isl_emit_depth_stencil.c')
-rw-r--r-- | src/intel/isl/isl_emit_depth_stencil.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/intel/isl/isl_emit_depth_stencil.c b/src/intel/isl/isl_emit_depth_stencil.c index fc2cf68ed4c..4906d95a49c 100644 --- a/src/intel/isl/isl_emit_depth_stencil.c +++ b/src/intel/isl/isl_emit_depth_stencil.c @@ -146,6 +146,9 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch, sb.Depth = sb.RenderTargetViewExtent = info->view->array_len - 1; sb.SurfLOD = info->view->base_level; sb.MinimumArrayElement = info->view->base_array_layer; + sb.StencilCompressionEnable = + info->stencil_aux_usage == ISL_AUX_USAGE_CCS_E; + sb.ControlSurfaceEnable = sb.StencilCompressionEnable; #elif GEN_GEN >= 8 || GEN_IS_HASWELL sb.StencilBufferEnable = true; #endif |