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authorLionel Landwerlin <[email protected]>2018-03-14 13:16:01 +0000
committerLionel Landwerlin <[email protected]>2018-03-22 20:14:22 +0000
commitc471716574c951cc332ca1cce1a221befc9f9392 (patch)
tree9f63086d1d22a34f2960e754f346a0073b74777a /src/intel/dev/gen_device_info.h
parent7e2c6147da427df974b673178d7142836bfac6a1 (diff)
intel: devinfo: store slice/subslice/eu masks
We want to store values coming from the kernel but as a first step, we can generate mask values out the numbers already stored in the gen_device_info masks. v2: Add a helper to set EU masks (Lionel/Ken) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel/dev/gen_device_info.h')
-rw-r--r--src/intel/dev/gen_device_info.h39
1 files changed, 38 insertions, 1 deletions
diff --git a/src/intel/dev/gen_device_info.h b/src/intel/dev/gen_device_info.h
index 17285ffed88..793ce094850 100644
--- a/src/intel/dev/gen_device_info.h
+++ b/src/intel/dev/gen_device_info.h
@@ -28,10 +28,16 @@
#include <stdbool.h>
#include <stdint.h>
+#include "util/macros.h"
+
#ifdef __cplusplus
extern "C" {
#endif
+#define GEN_DEVICE_MAX_SLICES (6) /* Maximum on gen10 */
+#define GEN_DEVICE_MAX_SUBSLICES (8) /* Maximum on gen11 */
+#define GEN_DEVICE_MAX_EUS_PER_SUBSLICE (10) /* Maximum on Haswell */
+
/**
* Intel hardware information and quirks
*/
@@ -112,7 +118,7 @@ struct gen_device_info
/**
* Number of subslices for each slice (used to be uniform until CNL).
*/
- unsigned num_subslices[3];
+ unsigned num_subslices[GEN_DEVICE_MAX_SUBSLICES];
/**
* Number of EU per subslice.
@@ -124,6 +130,37 @@ struct gen_device_info
*/
unsigned num_thread_per_eu;
+ /**
+ * A bit mask of the slices available.
+ */
+ uint8_t slice_masks;
+
+ /**
+ * An array of bit mask of the subslices available, use subslice_slice_stride
+ * to access this array.
+ */
+ uint8_t subslice_masks[GEN_DEVICE_MAX_SLICES *
+ DIV_ROUND_UP(GEN_DEVICE_MAX_SUBSLICES, 8)];
+
+ /**
+ * An array of bit mask of EUs available, use eu_slice_stride &
+ * eu_subslice_stride to access this array.
+ */
+ uint8_t eu_masks[GEN_DEVICE_MAX_SLICES *
+ GEN_DEVICE_MAX_SUBSLICES *
+ DIV_ROUND_UP(GEN_DEVICE_MAX_EUS_PER_SUBSLICE, 8)];
+
+ /**
+ * Stride to access subslice_masks[].
+ */
+ uint16_t subslice_slice_stride;
+
+ /**
+ * Strides to access eu_masks[].
+ */
+ uint16_t eu_slice_stride;
+ uint16_t eu_subslice_stride;
+
unsigned l3_banks;
unsigned max_vs_threads; /**< Maximum Vertex Shader threads */
unsigned max_tcs_threads; /**< Maximum Hull Shader threads */