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authorCaio Marcelo de Oliveira Filho <[email protected]>2020-04-28 13:28:02 -0700
committerCaio Marcelo de Oliveira Filho <[email protected]>2020-05-01 12:50:37 -0700
commite645bc6939794a95ecd7b0f5dbd9de07332ef365 (patch)
tree17b5add013d23ff746770ec3fefae01552b4f842 /src/intel/compiler
parent2663759af0edb1ebcee3aa1ff63f846911d16076 (diff)
intel: Let drivers call brw_nir_lower_cs_intrinsics()
The motivating factor is: this lowering may cause nir_intrinsic_load_local_group_size intrinsics to be added to the shader, and by moving this around we make possible for the drivers to lower that intrinsic by themselves. Iris will do just that in a later patch for implementing variable group size. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
Diffstat (limited to 'src/intel/compiler')
-rw-r--r--src/intel/compiler/brw_fs.cpp2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 8725b78a647..089fb15a48e 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -9006,8 +9006,6 @@ compile_cs_to_nir(const struct brw_compiler *compiler,
nir_shader *shader = nir_shader_clone(mem_ctx, src_shader);
brw_nir_apply_key(shader, compiler, &key->base, dispatch_width, true);
- NIR_PASS_V(shader, brw_nir_lower_cs_intrinsics);
-
NIR_PASS_V(shader, brw_nir_lower_simd, dispatch_width);
/* Clean up after the local index and ID calculations. */