diff options
author | Jason Ekstrand <[email protected]> | 2018-11-16 09:23:56 -0600 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2018-11-19 09:57:41 -0600 |
commit | dca35c598d1ac4c6abc27a842b7885f0b05ff1bc (patch) | |
tree | b922af0179b450c3900b729681b36007bdd40b2a /src/intel/compiler | |
parent | 060817b2fa50bd71dc6a9ece605238ba11fc67e9 (diff) |
intel/fs,vec4: Fix a compiler warning
../src/intel/compiler/brw_fs_nir.cpp:3534:46: warning: comparison of integer expressions of different signedness: ‘unsigned int’ and ‘int’ [-Wsign-compare]
assert(nir_intrinsic_write_mask(instr) ==
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~
(1 << instr->num_components) - 1);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This was caused by 6339aba775ecdc which added these completely valid
checks. However clang likes to complain about signedness mismatches.
Fixes: 6339aba775ecdc "intel/compiler: Lower SSBO and shared..."
Reviewed-by: Alejandro Piñeiro <[email protected]>
Diffstat (limited to 'src/intel/compiler')
-rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 4 | ||||
-rw-r--r-- | src/intel/compiler/brw_vec4_nir.cpp | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 84d0c6be6c3..6eb68794f58 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -3514,7 +3514,7 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder &bld, val_reg.type = brw_reg_type_from_bit_size(bit_size, BRW_REGISTER_TYPE_UD); assert(nir_intrinsic_write_mask(instr) == - (1 << instr->num_components) - 1); + (1u << instr->num_components) - 1); if (nir_intrinsic_align(instr) >= 4) { assert(nir_src_bit_size(instr->src[0]) == 32); assert(nir_src_num_components(instr->src[0]) <= 4); @@ -4070,7 +4070,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr val_reg.type = brw_reg_type_from_bit_size(bit_size, BRW_REGISTER_TYPE_UD); assert(nir_intrinsic_write_mask(instr) == - (1 << instr->num_components) - 1); + (1u << instr->num_components) - 1); if (nir_intrinsic_align(instr) >= 4) { assert(nir_src_bit_size(instr->src[0]) == 32); assert(nir_src_num_components(instr->src[0]) <= 4); diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp index 26ca2ddd8dc..4bb4d0d4074 100644 --- a/src/intel/compiler/brw_vec4_nir.cpp +++ b/src/intel/compiler/brw_vec4_nir.cpp @@ -503,7 +503,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) /* brw_nir_lower_mem_access_bit_sizes takes care of this */ assert(nir_src_bit_size(instr->src[0]) == 32); assert(nir_intrinsic_write_mask(instr) == - (1 << instr->num_components) - 1); + (1u << instr->num_components) - 1); src_reg surf_index = get_nir_ssbo_intrinsic_index(instr); src_reg offset_reg = retype(get_nir_src_imm(instr->src[2]), |