diff options
| author | Kevin Rogovin <[email protected]> | 2018-08-27 09:54:24 +0300 |
|---|---|---|
| committer | Plamena Manolova <[email protected]> | 2018-08-28 17:15:10 +0300 |
| commit | 03ecec9ed2099f6e2b62994b33dc948dc731e7b8 (patch) | |
| tree | 69549844e81bb93aee07e3cfc2195c68b2d3c62c /src/intel/compiler | |
| parent | 119435c8778dd26cb7c8bcde9f04b3982239fe60 (diff) | |
i965: Add INTEL_fragment_shader_ordering support.
Adds suppport for INTEL_fragment_shader_ordering. We achieve
the fragment ordering by using the same instruction as for
beginInvocationInterlockARB() which is by issuing a memory
fence via sendc.
Signed-off-by: Kevin Rogovin <[email protected]>
Reviewed-by: Plamena Manolova <[email protected]>
Diffstat (limited to 'src/intel/compiler')
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 9c9df5ac09f..62bff2a323a 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -4836,6 +4836,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr break; } + case nir_intrinsic_begin_fragment_shader_ordering: case nir_intrinsic_begin_invocation_interlock: { const fs_builder ubld = bld.group(8, 0); const fs_reg tmp = ubld.vgrf(BRW_REGISTER_TYPE_UD, 2); |