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authorJason Ekstrand <[email protected]>2020-03-26 17:06:52 -0500
committerMarge Bot <[email protected]>2020-04-03 20:26:54 +0000
commitc6439792287f11f25cb2b62d699f52daefe54a44 (patch)
treecb34945fca6231032e55321b720e5cf05a928e19 /src/intel/compiler/brw_schedule_instructions.cpp
parent6e7645347288c7dd8a4b95d69a4617278aa7b7c3 (diff)
intel/fs: Choose memory message type based on bit size
Thanks to the NIR vectorizing pass, we're about to see alignments that are higher than the bit size. Previously, we could use either and we just happened to choose alignment (probably the wrong choice) so it's harmless to switch to detecting based on bit size. This commit changes things to take both into account which is more accurate to what the messages we're using do. We also beef up the asserts and make them more consistent, more accurate, and more complete. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
Diffstat (limited to 'src/intel/compiler/brw_schedule_instructions.cpp')
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