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authorJason Ekstrand <[email protected]>2019-08-02 15:21:14 -0500
committerJason Ekstrand <[email protected]>2019-08-03 00:35:48 +0000
commitb62b0cfa7141250622229face8a8b338c344f9d2 (patch)
treefa26aaa7abfadc5508a317f8af524eb9d0bbcdab /src/intel/compiler/brw_nir.c
parentc02c3ff6121c5f2c8045900c6b83746344f56b32 (diff)
intel/nir: Add 1-bit opcodes to brw_cmod_for_nir_comparison_op
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_nir.c')
-rw-r--r--src/intel/compiler/brw_nir.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 18cd13ed66e..b331e62f91a 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -1045,17 +1045,25 @@ enum brw_conditional_mod
brw_cmod_for_nir_comparison(nir_op op)
{
switch (op) {
+ case nir_op_flt:
case nir_op_flt32:
+ case nir_op_ilt:
case nir_op_ilt32:
+ case nir_op_ult:
case nir_op_ult32:
return BRW_CONDITIONAL_L;
+ case nir_op_fge:
case nir_op_fge32:
+ case nir_op_ige:
case nir_op_ige32:
+ case nir_op_uge:
case nir_op_uge32:
return BRW_CONDITIONAL_GE;
+ case nir_op_feq:
case nir_op_feq32:
+ case nir_op_ieq:
case nir_op_ieq32:
case nir_op_b32all_fequal2:
case nir_op_b32all_iequal2:
@@ -1065,7 +1073,9 @@ brw_cmod_for_nir_comparison(nir_op op)
case nir_op_b32all_iequal4:
return BRW_CONDITIONAL_Z;
+ case nir_op_fne:
case nir_op_fne32:
+ case nir_op_ine:
case nir_op_ine32:
case nir_op_b32any_fnequal2:
case nir_op_b32any_inequal2: