diff options
| author | Francisco Jerez <[email protected]> | 2018-12-06 14:11:34 -0800 |
|---|---|---|
| committer | Francisco Jerez <[email protected]> | 2019-01-09 12:03:08 -0800 |
| commit | 812ede088f5f6bea4e6fba991bd59d5cce264212 (patch) | |
| tree | dc733a715ae81c8a0bf60c7da6ce4626f2f85573 /src/intel/compiler/brw_fs.h | |
| parent | c5f9c0009d5161e059e54a76fbdb910a6c151f9f (diff) | |
intel/fs: Implement quad swizzles on ICL+.
Align16 is no longer a thing, so a new implementation is provided
using Align1 instead. Not all possible swizzles can be represented as
a single Align1 region, but some fast paths are provided for
frequently used swizzles that can be represented efficiently in Align1
mode.
Fixes ~90 subgroup quad swap Vulkan CTS tests.
Cc: [email protected]
Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_fs.h')
| -rw-r--r-- | src/intel/compiler/brw_fs.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 53d9b6ce7bf..dc36ecc21ac 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -480,6 +480,10 @@ private: struct brw_reg src, struct brw_reg idx); + void generate_quad_swizzle(const fs_inst *inst, + struct brw_reg dst, struct brw_reg src, + unsigned swiz); + bool patch_discard_jumps_to_fb_writes(); const struct brw_compiler *compiler; |