diff options
| author | Jason Ekstrand <[email protected]> | 2018-10-11 15:57:50 -0500 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2018-12-11 21:26:23 -0600 |
| commit | cb98e0755f8d05a5a7f9134e39c625e8933746ea (patch) | |
| tree | 3a012b8beabe86ee713f00f3efdea7ae28fa0935 /src/intel/compiler/brw_eu_defines.h | |
| parent | 4ef8f46fd12876146212e119c0e238c92796226a (diff) | |
intel/fs: Support min_lod parameters on texture instructions
We have to lower some shadow instructions because they don't exist in
hardware and we have to lower txb+offset+clamp because the message gets
too big and we run into the sampler message length limit of 11 regs.
Acked-by: Ian Romanick <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_eu_defines.h')
| -rw-r--r-- | src/intel/compiler/brw_eu_defines.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index 52957882b10..affe977835b 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -811,6 +811,8 @@ enum tex_logical_srcs { TEX_LOGICAL_SRC_LOD, /** dPdy if the operation takes explicit derivatives */ TEX_LOGICAL_SRC_LOD2, + /** Min LOD */ + TEX_LOGICAL_SRC_MIN_LOD, /** Sample index */ TEX_LOGICAL_SRC_SAMPLE_INDEX, /** MCS data */ |