diff options
| author | Francisco Jerez <[email protected]> | 2018-05-18 15:20:43 -0700 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2018-05-29 15:44:50 -0700 |
| commit | d3cd6b7215c11054b587fb0fd621c53c6d62c64b (patch) | |
| tree | 2682bc1472264331c751c9a4c27f5122d48f5911 /src/intel/compiler/brw_eu_defines.h | |
| parent | 39de901a96bd1048b2c0de32a469014b398f38ae (diff) | |
intel/fs: Replace the CINTERP opcode with a simple MOV
The only reason it was it's own opcode was so that we could detect it
and adjust the source register based on the payload setup. Now that
we're using the ATTR file for FS inputs, there's no point in having a
magic opcode for this.
v2 (Jason Ekstrand):
- Break the bit which removes the CINTERP opcode into its own patch
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_eu_defines.h')
| -rw-r--r-- | src/intel/compiler/brw_eu_defines.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index 332d627bc37..36519af63f2 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -499,7 +499,6 @@ enum opcode { */ FS_OPCODE_DDY_COARSE, FS_OPCODE_DDY_FINE, - FS_OPCODE_CINTERP, FS_OPCODE_LINTERP, FS_OPCODE_PIXEL_X, FS_OPCODE_PIXEL_Y, |