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authorCaio Marcelo de Oliveira Filho <[email protected]>2020-01-31 10:20:25 -0800
committerCaio Marcelo de Oliveira Filho <[email protected]>2020-02-18 09:17:51 -0800
commit79788b8f7f07460af8467931501380e47b485e36 (patch)
tree7cc1d7d73f57e08718d1f4fdf80a70a107a33e36 /src/intel/compiler/brw_disasm.c
parentbee5c9b0dc13dbae0ccf124124eaccebf7f2a435 (diff)
intel/gen12: Take into account opcode when decoding SWSB
The interpretation of the fields is different depending whether the instruction is a SEND/MATH or not. This fixes the disassembly output for non-SEND/MATH instructions that have both in-order and out-of-order dependencies. Their dependencies were wrongly represented as `@A $B` when the correct would be `@A $B.dst`. Fixes: 6154cdf924f ("intel/eu/gen12: Add auxiliary type to represent SWSB information during codegen.") Fixes: 83612c01271 ("intel/disasm/gen12: Disassemble software scoreboard information.") Acked-by: Francisco Jerez <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3660> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3660>
Diffstat (limited to 'src/intel/compiler/brw_disasm.c')
-rw-r--r--src/intel/compiler/brw_disasm.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
index 57aa9e51091..ff46cb9549a 100644
--- a/src/intel/compiler/brw_disasm.c
+++ b/src/intel/compiler/brw_disasm.c
@@ -1632,7 +1632,8 @@ qtr_ctrl(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst
static int
swsb(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
{
- const struct tgl_swsb swsb = tgl_swsb_decode(brw_inst_swsb(devinfo, inst));
+ const struct tgl_swsb swsb = tgl_swsb_decode(brw_inst_opcode(devinfo, inst),
+ brw_inst_swsb(devinfo, inst));
if (swsb.regdist)
format(file, " @%d", swsb.regdist);
if (swsb.mode)