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authorAnuj Phogat <[email protected]>2019-01-04 16:06:04 -0800
committerAnuj Phogat <[email protected]>2020-01-31 18:14:54 -0800
commit95831e2f66a16e2334cb1f972c9485b71955900b (patch)
treea02ac21de05eda1ec6092a194ce6a42b6aa546a6 /src/intel/common
parent00a84c170a0a495f21008a80557a1d2b8257ea56 (diff)
intel/gen12+: Set way_size_per_bank to 4
This patch fixes the way_size_per_bank for Gen12+ Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Sagar Ghuge<[email protected]>
Diffstat (limited to 'src/intel/common')
-rw-r--r--src/intel/common/gen_l3_config.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c
index 19ea07eef2d..46926f8bdf4 100644
--- a/src/intel/common/gen_l3_config.c
+++ b/src/intel/common/gen_l3_config.c
@@ -321,7 +321,7 @@ static unsigned
get_l3_way_size(const struct gen_device_info *devinfo)
{
const unsigned way_size_per_bank =
- (devinfo->gen >= 9 && devinfo->l3_banks == 1) || devinfo->gen == 11 ?
+ (devinfo->gen >= 9 && devinfo->l3_banks == 1) || devinfo->gen >= 11 ?
4 : 2;
assert(devinfo->l3_banks);