diff options
author | Jason Ekstrand <[email protected]> | 2019-07-18 09:59:44 -0500 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2019-07-29 23:30:26 +0000 |
commit | 4bb6e6817ec5d627d58e499ca09f1f40641a1acd (patch) | |
tree | c5f65a2aa8cff090908f09d98fefc83041ae8c3e /src/intel/blorp | |
parent | 44268b1c72e327a812678f123000942083407944 (diff) |
intel: Use a system value for gl_FragCoord
It's kind-of an anomaly that the Intel drivers are still treating
gl_FragCoord as an input. It also makes zero sense because we have to
special-case it in the back-end.
Because ANV is the only user of nir_lower_wpos_center, we go ahead and
just update it to look for nir_intrinsic_load_frag_coord as part of this
patch.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel/blorp')
-rw-r--r-- | src/intel/blorp/blorp_blit.c | 9 | ||||
-rw-r--r-- | src/intel/blorp/blorp_clear.c | 9 | ||||
-rw-r--r-- | src/intel/blorp/blorp_nir_builder.h | 12 |
3 files changed, 3 insertions, 27 deletions
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index 78a47c9cbe5..323e94e3d28 100644 --- a/src/intel/blorp/blorp_blit.c +++ b/src/intel/blorp/blorp_blit.c @@ -60,9 +60,6 @@ struct brw_blorp_blit_vars { nir_variable *v_dst_offset; nir_variable *v_src_inv_size; - /* gl_FragCoord */ - nir_variable *frag_coord; - /* gl_FragColor */ nir_variable *color_out; }; @@ -84,10 +81,6 @@ brw_blorp_blit_vars_init(nir_builder *b, struct brw_blorp_blit_vars *v, #undef LOAD_INPUT - v->frag_coord = nir_variable_create(b->shader, nir_var_shader_in, - glsl_vec4_type(), "gl_FragCoord"); - v->frag_coord->data.location = VARYING_SLOT_POS; - v->color_out = nir_variable_create(b->shader, nir_var_shader_out, glsl_vec4_type(), "gl_FragColor"); v->color_out->data.location = FRAG_RESULT_COLOR; @@ -98,7 +91,7 @@ blorp_blit_get_frag_coords(nir_builder *b, const struct brw_blorp_blit_prog_key *key, struct brw_blorp_blit_vars *v) { - nir_ssa_def *coord = nir_f2i32(b, nir_load_var(b, v->frag_coord)); + nir_ssa_def *coord = nir_f2i32(b, nir_load_frag_coord(b)); /* Account for destination surface intratile offset * diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c index 7e77e80565f..af7c0d506f3 100644 --- a/src/intel/blorp/blorp_clear.c +++ b/src/intel/blorp/blorp_clear.c @@ -70,12 +70,7 @@ blorp_params_get_clear_kernel(struct blorp_batch *batch, nir_ssa_def *color = nir_load_var(&b, v_color); if (clear_rgb_as_red) { - nir_variable *frag_coord = - nir_variable_create(b.shader, nir_var_shader_in, - glsl_vec4_type(), "gl_FragCoord"); - frag_coord->data.location = VARYING_SLOT_POS; - - nir_ssa_def *pos = nir_f2i32(&b, nir_load_var(&b, frag_coord)); + nir_ssa_def *pos = nir_f2i32(&b, nir_load_frag_coord(&b)); nir_ssa_def *comp = nir_umod(&b, nir_channel(&b, pos, 0), nir_imm_int(&b, 3)); nir_ssa_def *color_component = @@ -976,7 +971,7 @@ blorp_params_get_mcs_partial_resolve_kernel(struct blorp_batch *batch, /* Do an MCS fetch and check if it is equal to the magic clear value */ nir_ssa_def *mcs = - blorp_nir_txf_ms_mcs(&b, nir_f2i32(&b, blorp_nir_frag_coord(&b)), + blorp_nir_txf_ms_mcs(&b, nir_f2i32(&b, nir_load_frag_coord(&b)), nir_load_layer_id(&b)); nir_ssa_def *is_clear = blorp_nir_mcs_is_clear_color(&b, mcs, blorp_key.num_samples); diff --git a/src/intel/blorp/blorp_nir_builder.h b/src/intel/blorp/blorp_nir_builder.h index 9664bdbcd27..0ba855fcd66 100644 --- a/src/intel/blorp/blorp_nir_builder.h +++ b/src/intel/blorp/blorp_nir_builder.h @@ -37,18 +37,6 @@ blorp_nir_init_shader(nir_builder *b, } static inline nir_ssa_def * -blorp_nir_frag_coord(nir_builder *b) -{ - nir_variable *frag_coord = - nir_variable_create(b->shader, nir_var_shader_in, - glsl_vec4_type(), "gl_FragCoord"); - - frag_coord->data.location = VARYING_SLOT_POS; - - return nir_load_var(b, frag_coord); -} - -static inline nir_ssa_def * blorp_nir_txf_ms_mcs(nir_builder *b, nir_ssa_def *xy_pos, nir_ssa_def *layer) { nir_tex_instr *tex = nir_tex_instr_create(b->shader, 1); |