diff options
| author | Jonathan Marek <[email protected]> | 2019-09-12 16:12:02 -0400 |
|---|---|---|
| committer | Jonathan Marek <[email protected]> | 2019-09-28 00:34:44 -0400 |
| commit | b38fcaa22141b217eb693f79e1d6c60faa9a0658 (patch) | |
| tree | 0b877528d6ef0db4585209c587ef7fc1319cc376 /src/gallium | |
| parent | d4e35e62d279be2c49985a9733ad1bf4c4237603 (diff) | |
etnaviv: nir: fix gl_FragDepth
Fixes the following piglit test: fragdepth_gles2 (for ETNA_MESA_DEBUG=nir)
Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/etnaviv/etnaviv_compiler_nir_emit.h | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir_emit.h b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir_emit.h index 725ac481920..93e7c5170c7 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir_emit.h +++ b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir_emit.h @@ -289,10 +289,15 @@ static inline int reg_get_base(struct state *state, int virt_reg) { /* offset by 1 to avoid reserved position register */ if (state->shader->info.stage == MESA_SHADER_FRAGMENT) - return virt_reg / NUM_REG_TYPES + 1; + return (virt_reg / NUM_REG_TYPES + 1) % ETNA_MAX_TEMPS; return virt_reg / NUM_REG_TYPES; } +/* use "r63.z" for depth reg, it will wrap around to r0.z by reg_get_base + * (fs registers are offset by 1 to avoid reserving r0) + */ +#define REG_FRAG_DEPTH ((ETNA_MAX_TEMPS - 1) * NUM_REG_TYPES + REG_TYPE_VIRT_SCALAR_Z) + static inline int reg_get_class(int virt_reg) { switch (reg_get_type(virt_reg)) { @@ -921,10 +926,19 @@ ra_assign(struct state *state, nir_shader *shader) switch (intr->intrinsic) { case nir_intrinsic_store_deref: { - /* don't want output to be swizzled + /* don't want outputs to be swizzled * TODO: better would be to set the type to X/XY/XYZ/XYZW + * TODO: what if fragcoord.z is read after writing fragdepth? */ - ra_set_node_class(g, live_map[src_index(impl, &intr->src[1])], REG_CLASS_VEC4); + nir_deref_instr *deref = nir_src_as_deref(intr->src[0]); + unsigned index = live_map[src_index(impl, &intr->src[1])]; + + if (shader->info.stage == MESA_SHADER_FRAGMENT && + deref->var->data.location == FRAG_RESULT_DEPTH) { + ra_set_node_reg(g, index, REG_FRAG_DEPTH); + } else { + ra_set_node_class(g, index, REG_CLASS_VEC4); + } } continue; case nir_intrinsic_load_input: reg = nir_intrinsic_base(intr) * NUM_REG_TYPES + (unsigned[]) { |