diff options
| author | Marek Olšák <[email protected]> | 2016-08-19 01:40:29 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2016-08-26 15:50:10 +0200 |
| commit | a6869e7c06e362749219c83bc9b106cda89b9bc0 (patch) | |
| tree | 04532f7b81e8752e2a38810ec8bb5e2dadc873e0 /src/gallium | |
| parent | 97b55243fbea9b5d0e76217e986e85b96fd09f93 (diff) | |
winsys/amdgpu: finish up SI addrlib integration
Reviewed-by: Edward O'Callaghan <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 30 |
1 files changed, 25 insertions, 5 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c index 9466e7c4f01..8bfea457e45 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c @@ -369,7 +369,8 @@ static int amdgpu_surface_init(struct radeon_winsys *rws, * - Mipmapped array textures have low performance (discovered by a closed * driver team). */ - AddrSurfInfoIn.flags.dccCompatible = !(surf->flags & RADEON_SURF_Z_OR_SBUFFER) && + AddrSurfInfoIn.flags.dccCompatible = ws->info.chip_class >= VI && + !(surf->flags & RADEON_SURF_Z_OR_SBUFFER) && !(surf->flags & RADEON_SURF_DISABLE_DCC) && !compressed && AddrDccIn.numSamples <= 1 && ((surf->array_size == 1 && surf->npix_z == 1) || @@ -414,10 +415,29 @@ static int amdgpu_surface_init(struct radeon_winsys *rws, assert(!(surf->flags & RADEON_SURF_Z_OR_SBUFFER)); assert(AddrSurfInfoIn.tileMode == ADDR_TM_2D_TILED_THIN1); - if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE) - AddrSurfInfoIn.tileIndex = 10; /* 2D displayable */ - else - AddrSurfInfoIn.tileIndex = 14; /* 2D non-displayable */ + if (ws->info.chip_class == SI) { + if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE) { + if (surf->bpe == 2) + AddrSurfInfoIn.tileIndex = 11; /* 16bpp */ + else + AddrSurfInfoIn.tileIndex = 12; /* 32bpp */ + } else { + if (surf->bpe == 1) + AddrSurfInfoIn.tileIndex = 14; /* 8bpp */ + else if (surf->bpe == 2) + AddrSurfInfoIn.tileIndex = 15; /* 16bpp */ + else if (surf->bpe == 4) + AddrSurfInfoIn.tileIndex = 16; /* 32bpp */ + else + AddrSurfInfoIn.tileIndex = 17; /* 64bpp (and 128bpp) */ + } + } else { + /* CIK - VI */ + if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE) + AddrSurfInfoIn.tileIndex = 10; /* 2D displayable */ + else + AddrSurfInfoIn.tileIndex = 14; /* 2D non-displayable */ + } } surf->bo_size = 0; |