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authorRafael Antognolli <[email protected]>2019-02-13 11:32:17 -0800
committerRafael Antognolli <[email protected]>2020-04-20 10:59:06 -0700
commit5bc3f52dd8c2b5acaae959ccae2e1fb7c769bb22 (patch)
treeb5eafb64c6ef0c7c55875b5b556e9591e5937ee6 /src/gallium
parenta42d7157849832485e63850abaf341b10c952ea0 (diff)
iris/bufmgr: Factor out GEM_MMAP ioctl from mmap_cpu and mmap_wc.
We want to add a new ioctl for mmap'ing buffers, so let's avoid duplicating that code on both functions by extracting it from them first. [[email protected]: iris port] Signed-off-by: Jordan Justen <[email protected]> v2: Rename helper function names (Ken). Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/iris/iris_bufmgr.c61
1 files changed, 31 insertions, 30 deletions
diff --git a/src/gallium/drivers/iris/iris_bufmgr.c b/src/gallium/drivers/iris/iris_bufmgr.c
index baedf5f0bca..9897acc971f 100644
--- a/src/gallium/drivers/iris/iris_bufmgr.c
+++ b/src/gallium/drivers/iris/iris_bufmgr.c
@@ -902,11 +902,38 @@ print_flags(unsigned flags)
}
static void *
-iris_bo_map_cpu(struct pipe_debug_callback *dbg,
- struct iris_bo *bo, unsigned flags)
+iris_bo_gem_mmap_legacy(struct pipe_debug_callback *dbg,
+ struct iris_bo *bo, bool wc)
{
struct iris_bufmgr *bufmgr = bo->bufmgr;
+ struct drm_i915_gem_mmap mmap_arg = {
+ .handle = bo->gem_handle,
+ .size = bo->size,
+ .flags = wc ? I915_MMAP_WC : 0,
+ };
+
+ int ret = gen_ioctl(bufmgr->fd, DRM_IOCTL_I915_GEM_MMAP, &mmap_arg);
+ if (ret != 0) {
+ DBG("%s:%d: Error mapping buffer %d (%s): %s .\n",
+ __FILE__, __LINE__, bo->gem_handle, bo->name, strerror(errno));
+ return NULL;
+ }
+ void *map = (void *) (uintptr_t) mmap_arg.addr_ptr;
+
+ return map;
+}
+
+static void *
+iris_bo_gem_mmap(struct pipe_debug_callback *dbg, struct iris_bo *bo, bool wc)
+{
+ return iris_bo_gem_mmap_legacy(dbg, bo, wc);
+}
+
+static void *
+iris_bo_map_cpu(struct pipe_debug_callback *dbg,
+ struct iris_bo *bo, unsigned flags)
+{
/* We disallow CPU maps for writing to non-coherent buffers, as the
* CPU map can become invalidated when a batch is flushed out, which
* can happen at unpredictable times. You should use WC maps instead.
@@ -915,18 +942,7 @@ iris_bo_map_cpu(struct pipe_debug_callback *dbg,
if (!bo->map_cpu) {
DBG("iris_bo_map_cpu: %d (%s)\n", bo->gem_handle, bo->name);
-
- struct drm_i915_gem_mmap mmap_arg = {
- .handle = bo->gem_handle,
- .size = bo->size,
- };
- int ret = gen_ioctl(bufmgr->fd, DRM_IOCTL_I915_GEM_MMAP, &mmap_arg);
- if (ret != 0) {
- DBG("%s:%d: Error mapping buffer %d (%s): %s .\n",
- __FILE__, __LINE__, bo->gem_handle, bo->name, strerror(errno));
- return NULL;
- }
- void *map = (void *) (uintptr_t) mmap_arg.addr_ptr;
+ void *map = iris_bo_gem_mmap(dbg, bo, false);
VG_DEFINED(map, bo->size);
if (p_atomic_cmpxchg(&bo->map_cpu, NULL, map)) {
@@ -971,24 +987,9 @@ static void *
iris_bo_map_wc(struct pipe_debug_callback *dbg,
struct iris_bo *bo, unsigned flags)
{
- struct iris_bufmgr *bufmgr = bo->bufmgr;
-
if (!bo->map_wc) {
DBG("iris_bo_map_wc: %d (%s)\n", bo->gem_handle, bo->name);
-
- struct drm_i915_gem_mmap mmap_arg = {
- .handle = bo->gem_handle,
- .size = bo->size,
- .flags = I915_MMAP_WC,
- };
- int ret = gen_ioctl(bufmgr->fd, DRM_IOCTL_I915_GEM_MMAP, &mmap_arg);
- if (ret != 0) {
- DBG("%s:%d: Error mapping buffer %d (%s): %s .\n",
- __FILE__, __LINE__, bo->gem_handle, bo->name, strerror(errno));
- return NULL;
- }
-
- void *map = (void *) (uintptr_t) mmap_arg.addr_ptr;
+ void *map = iris_bo_gem_mmap(dbg, bo, true);
VG_DEFINED(map, bo->size);
if (p_atomic_cmpxchg(&bo->map_wc, NULL, map)) {