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authorRob Clark <[email protected]>2018-10-13 13:56:05 -0400
committerRob Clark <[email protected]>2018-10-17 12:44:49 -0400
commit24d57a6d8f72156aa81dce89683bd16e771c7ea2 (patch)
tree1425874cdb6c8d349d8f7a9312358becf39b92fe /src/gallium
parent72f6164fefd796f6b0ffdc86b22e02de61835709 (diff)
freedreno/a6xx: single cmdstream for draw+binning
Now that state which is different for draw vs binning pass is split out into different state-groups with appropriate enable_mask (so the appropriate one is chosen for draw vs binning), switch over to using a single cmdstream for both passes. This should significantly lower draw overhead for CPU bound benchmarks. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_draw.c15
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_emit.h1
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_gmem.c2
3 files changed, 3 insertions, 15 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
index 518168e51bc..c0670d3a11c 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
@@ -229,14 +229,13 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
fixup_shader_state(ctx, &emit.key.key);
- unsigned dirty = ctx->dirty;
-
- if (!(dirty & FD_DIRTY_PROG)) {
+ if (!(ctx->dirty & FD_DIRTY_PROG)) {
emit.prog = fd6_ctx->prog;
} else {
fd6_ctx->prog = fd6_emit_get_prog(&emit);
}
+ emit.dirty = ctx->dirty; /* *after* fixup_shader_state() */
emit.bs = fd6_emit_get_prog(&emit)->bs;
emit.vs = fd6_emit_get_prog(&emit)->vs;
emit.fs = fd6_emit_get_prog(&emit)->fs;
@@ -257,18 +256,8 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
*/
emit.no_lrz_write = fp->writes_pos || fp->has_kill;
- emit.binning_pass = false;
- emit.dirty = dirty;
-
draw_impl(ctx, ctx->batch->draw, &emit, index_offset);
- /* and now binning pass: */
- emit.binning_pass = true;
- emit.dirty = dirty & ~(FD_DIRTY_BLEND);
- emit.vs = fd6_emit_get_prog(&emit)->bs;
-
- draw_impl(ctx, ctx->batch->binning, &emit, index_offset);
-
if (emit.streamout_mask) {
struct fd_ringbuffer *ring = ctx->batch->draw;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
index 0b5aa56de51..d7ab80ae7a4 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
@@ -66,7 +66,6 @@ struct fd6_emit {
struct fd_context *ctx;
const struct fd_vertex_state *vtx;
const struct pipe_draw_info *info;
- bool binning_pass;
struct ir3_cache_key key;
enum fd_dirty_3d_state dirty;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index 279f02ba549..c2f2a03d18a 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -408,7 +408,7 @@ emit_binning_pass(struct fd_batch *batch)
A6XX_SP_TP_WINDOW_OFFSET_Y(0));
/* emit IB to binning drawcmds: */
- ctx->emit_ib(ring, batch->binning);
+ ctx->emit_ib(ring, batch->draw);
fd_reset_wfi(batch);