Merge remote-tracking branch 'origin/master' into pipe-video

Conflicts:
	src/gallium/drivers/r600/r600_pipe.c
	src/gallium/drivers/r600/r600_state_inlines.h

3 files changed, 31 insertions, 15 deletions

diff --git a/src/gallium/winsys/i915/drm/i915_drm_buffer.c b/src/gallium/winsys/i915/drm/i915_drm_buffer.c
index 01dd4bf062f..89d8e89e6a7 100644
--- a/src/gallium/winsys/i915/drm/i915_drm_buffer.c
+++ b/src/gallium/winsys/i915/drm/i915_drm_buffer.c
@@ -213,6 +213,15 @@ i915_drm_buffer_destroy(struct i915_winsys *iws,
    FREE(buffer);
 }
 
+static boolean
+i915_drm_buffer_is_busy(struct i915_winsys *iws,
+                        struct i915_winsys_buffer *buffer)
+{
+   struct i915_drm_buffer* i915_buffer = i915_drm_buffer(buffer);
+   return drm_intel_bo_busy(i915_buffer->bo);
+}
+
+
 void
 i915_drm_winsys_init_buffer_functions(struct i915_drm_winsys *idws)
 {
@@ -224,4 +233,5 @@ i915_drm_winsys_init_buffer_functions(struct i915_drm_winsys *idws)
    idws->base.buffer_unmap = i915_drm_buffer_unmap;
    idws->base.buffer_write = i915_drm_buffer_write;
    idws->base.buffer_destroy = i915_drm_buffer_destroy;
+   idws->base.buffer_is_busy = i915_drm_buffer_is_busy;
 }
diff --git a/src/gallium/winsys/r600/drm/r600_drm.c b/src/gallium/winsys/r600/drm/r600_drm.c
index 4602f7f2a4b..b5a4d928bf5 100644
--- a/src/gallium/winsys/r600/drm/r600_drm.c
+++ b/src/gallium/winsys/r600/drm/r600_drm.c
@@ -186,7 +186,7 @@ static int eg_interpret_tiling(struct radeon *radeon, uint32_t tiling_config)
 
 static int radeon_drm_get_tiling(struct radeon *radeon)
 {
-	struct drm_radeon_info info;
+	struct drm_radeon_info info = {};
 	int r;
 	uint32_t tiling_config = 0;
 
@@ -208,8 +208,8 @@ static int radeon_drm_get_tiling(struct radeon *radeon)
 
 static int radeon_get_clock_crystal_freq(struct radeon *radeon)
 {
-	struct drm_radeon_info info;
-	uint32_t clock_crystal_freq;
+	struct drm_radeon_info info = {};
+	uint32_t clock_crystal_freq = 0;
 	int r;
 
 	info.request = RADEON_INFO_CLOCK_CRYSTAL_FREQ;
@@ -226,8 +226,8 @@ static int radeon_get_clock_crystal_freq(struct radeon *radeon)
 
 static int radeon_get_num_backends(struct radeon *radeon)
 {
-	struct drm_radeon_info info;
-	uint32_t num_backends;
+	struct drm_radeon_info info = {};
+	uint32_t num_backends = 0;
 	int r;
 
 	info.request = RADEON_INFO_NUM_BACKENDS;
diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c
index a21beeeba3c..69f7884f823 100644
--- a/src/gallium/winsys/r600/drm/r600_hw_context.c
+++ b/src/gallium/winsys/r600/drm/r600_hw_context.c
@@ -1506,7 +1506,7 @@ void r600_context_flush(struct r600_context *ctx)
 	/* suspend queries */
 	r600_context_queries_suspend(ctx);
 
-	if (ctx->radeon->family >= CHIP_CEDAR)
+	if (ctx->radeon->chip_class >= EVERGREEN)
 		evergreen_context_flush_dest_caches(ctx);
 	else
 		r600_context_flush_dest_caches(ctx);
@@ -1567,7 +1567,7 @@ void r600_context_flush(struct r600_context *ctx)
 	r600_init_cs(ctx);
 
 	/* resume queries */
-	r600_context_queries_resume(ctx);
+	r600_context_queries_resume(ctx, TRUE);
 
 	/* set all valid group as dirty so they get reemited on
 	 * next draw command
@@ -1727,7 +1727,7 @@ static boolean r600_query_result(struct r600_context *ctx, struct r600_query *qu
 
 void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
 {
-	unsigned required_space;
+	unsigned required_space, required_buffer;
 	int num_backends = r600_get_num_backends(ctx->radeon);
 
 	/* query request needs 6/8 dwords for begin + 6/8 dwords for end */
@@ -1741,9 +1741,13 @@ void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
 		r600_context_flush(ctx);
 	}
 
+	required_buffer = query->num_results +
+		4 * (query->type == PIPE_QUERY_OCCLUSION_COUNTER ? ctx->max_db : 1);
+
 	/* if query buffer is full force a flush */
-	if (query->num_results*4 >= query->buffer_size - 16) {
-		r600_context_flush(ctx);
+	if (required_buffer*4 > query->buffer_size) {
+		if (!(query->state & R600_QUERY_STATE_FLUSHED))
+			r600_context_flush(ctx);
 		r600_query_result(ctx, query, TRUE);
 	}
 
@@ -1753,9 +1757,9 @@ void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
 		u32 *results;
 		int i;
 
-		results = r600_bo_map(ctx->radeon, query->buffer, PB_USAGE_DONTBLOCK | PB_USAGE_CPU_WRITE, NULL);
+		results = r600_bo_map(ctx->radeon, query->buffer, PB_USAGE_CPU_WRITE, NULL);
 		if (results) {
-			memset(results + (query->num_results * 4), 0, ctx->max_db * 4 * 4);
+			memset(results + query->num_results, 0, ctx->max_db * 4 * 4);
 
 			for (i = num_backends; i < ctx->max_db; i++) {
 				results[(i * 4)+1] = 0x80000000;
@@ -1811,6 +1815,7 @@ void r600_query_end(struct r600_context *ctx, struct r600_query *query)
 	query->num_results += 4 * (query->type == PIPE_QUERY_OCCLUSION_COUNTER ? ctx->max_db : 1);
 	query->state ^= R600_QUERY_STATE_STARTED;
 	query->state |= R600_QUERY_STATE_ENDED;
+	query->state &= ~R600_QUERY_STATE_FLUSHED;
 	ctx->num_query_running--;
 }
 
@@ -1879,7 +1884,7 @@ boolean r600_context_query_result(struct r600_context *ctx,
 {
 	uint64_t *result = (uint64_t*)vresult;
 
-	if (query->num_results) {
+	if (query->num_results && !(query->state & R600_QUERY_STATE_FLUSHED)) {
 		r600_context_flush(ctx);
 	}
 	if (!r600_query_result(ctx, query, wait))
@@ -1904,7 +1909,7 @@ void r600_context_queries_suspend(struct r600_context *ctx)
 	}
 }
 
-void r600_context_queries_resume(struct r600_context *ctx)
+void r600_context_queries_resume(struct r600_context *ctx, boolean flushed)
 {
 	struct r600_query *query;
 
@@ -1912,6 +1917,7 @@ void r600_context_queries_resume(struct r600_context *ctx)
 		if (query->state & R600_QUERY_STATE_SUSPENDED) {
 			r600_query_begin(ctx, query);
 			query->state ^= R600_QUERY_STATE_SUSPENDED;
-		}
+		} else if (flushed && query->state==R600_QUERY_STATE_ENDED)
+			query->state |= R600_QUERY_STATE_FLUSHED;
 	}
 }