Merge branch 'master' of git://anongit.freedesktop.org/mesa/mesa

31 files changed, 1073 insertions, 4277 deletions

diff --git a/src/gallium/winsys/r600/drm/Android.mk b/src/gallium/winsys/r600/drm/Android.mk
new file mode 100644
index 00000000000..eb79caa19ca
--- /dev/null
+++ b/src/gallium/winsys/r600/drm/Android.mk
@@ -0,0 +1,43 @@
+# Mesa 3-D graphics library
+#
+# Copyright (C) 2010-2011 Chia-I Wu <[email protected]>
+# Copyright (C) 2010-2011 LunarG Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+
+LOCAL_PATH := $(call my-dir)
+
+# get C_SOURCES
+include $(LOCAL_PATH)/Makefile.sources
+
+include $(CLEAR_VARS)
+
+LOCAL_SRC_FILES := $(C_SOURCES)
+
+LOCAL_CFLAGS := -std=c99
+
+LOCAL_C_INCLUDES := \
+	$(GALLIUM_TOP)/drivers/r600 \
+	$(DRM_TOP) \
+	$(DRM_TOP)/include/drm
+
+LOCAL_MODULE := libmesa_winsys_r600
+
+include $(GALLIUM_COMMON_MK)
+include $(BUILD_STATIC_LIBRARY)
diff --git a/src/gallium/winsys/r600/drm/Makefile b/src/gallium/winsys/r600/drm/Makefile
index fb7b09b3a0d..c23286c8197 100644
--- a/src/gallium/winsys/r600/drm/Makefile
+++ b/src/gallium/winsys/r600/drm/Makefile
@@ -4,15 +4,8 @@ include $(TOP)/configs/current
 
 LIBNAME = r600winsys
 
-C_SOURCES = \
-	bof.c \
-	evergreen_hw_context.c \
-	radeon_bo.c \
-	radeon_pciid.c \
-	r600_bo.c \
-	r600_drm.c \
-	r600_hw_context.c \
-	r600_bomgr.c
+# get C_SOURCES
+include Makefile.sources
 
 LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/r600 \
 		   -I$(TOP)/include \
diff --git a/src/gallium/winsys/r600/drm/Makefile.sources b/src/gallium/winsys/r600/drm/Makefile.sources
new file mode 100644
index 00000000000..97980170e6b
--- /dev/null
+++ b/src/gallium/winsys/r600/drm/Makefile.sources
@@ -0,0 +1,7 @@
+C_SOURCES := \
+	evergreen_hw_context.c \
+	radeon_pciid.c \
+	r600_bo.c \
+	r600_drm.c \
+	r600_hw_context.c
+
diff --git a/src/gallium/winsys/r600/drm/SConscript b/src/gallium/winsys/r600/drm/SConscript
index f55bb265226..2d0d80e8bb9 100644
--- a/src/gallium/winsys/r600/drm/SConscript
+++ b/src/gallium/winsys/r600/drm/SConscript
@@ -2,16 +2,7 @@ Import('*')
 
 env = env.Clone()
 
-r600_sources = [
-    'bof.c',
-    'evergreen_hw_context.c',
-    'radeon_bo.c',
-    'radeon_pciid.c',
-    'r600_bo.c',
-    'r600_drm.c',
-    'r600_hw_context.c',
-    'r600_bomgr.c',
-]
+r600_sources = env.ParseSourceList('Makefile.sources', 'C_SOURCES')
 
 env.PkgUseModules('DRM_RADEON')
 
diff --git a/src/gallium/winsys/r600/drm/bof.c b/src/gallium/winsys/r600/drm/bof.c
deleted file mode 100644
index 5c923ad38d6..00000000000
--- a/src/gallium/winsys/r600/drm/bof.c
+++ /dev/null
@@ -1,477 +0,0 @@
-/*
- * Copyright 2010 Jerome Glisse <[email protected]>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *      Jerome Glisse
- */
-#include <errno.h>
-#include <stdlib.h>
-#include <string.h>
-#include "bof.h"
-
-/*
- * helpers
- */
-static int bof_entry_grow(bof_t *bof)
-{
-	bof_t **array;
-
-	if (bof->array_size < bof->nentry)
-		return 0;
-	array = realloc(bof->array, (bof->nentry + 16) * sizeof(void*));
-	if (array == NULL)
-		return -ENOMEM;
-	bof->array = array;
-	bof->nentry += 16;
-	return 0;
-}
-
-/*
- * object
- */
-bof_t *bof_object(void)
-{
-	bof_t *object;
-
-	object = calloc(1, sizeof(bof_t));
-	if (object == NULL)
-		return NULL;
-	object->refcount = 1;
-	object->type = BOF_TYPE_OBJECT;
-	object->size = 12;
-	return object;
-}
-
-bof_t *bof_object_get(bof_t *object, const char *keyname)
-{
-	unsigned i;
-
-	for (i = 0; i < object->array_size; i += 2) {
-		if (!strcmp(object->array[i]->value, keyname)) {
-			return object->array[i + 1];
-		}
-	}
-	return NULL;
-}
-
-int bof_object_set(bof_t *object, const char *keyname, bof_t *value)
-{
-	bof_t *key;
-	int r;
-
-	if (object->type != BOF_TYPE_OBJECT)
-		return -EINVAL;
-	r = bof_entry_grow(object);
-	if (r)
-		return r;
-	key = bof_string(keyname);
-	if (key == NULL)
-		return -ENOMEM;
-	object->array[object->array_size++] = key;
-	object->array[object->array_size++] = value;
-	object->size += value->size;
-	object->size += key->size;
-	bof_incref(value);
-	return 0;
-}
-
-/*
- * array
- */
-bof_t *bof_array(void)
-{
-	bof_t *array = bof_object();
-
-	if (array == NULL)
-		return NULL;
-	array->type = BOF_TYPE_ARRAY;
-	array->size = 12;
-	return array;
-}
-
-int bof_array_append(bof_t *array, bof_t *value)
-{
-	int r;
-	if (array->type != BOF_TYPE_ARRAY)
-		return -EINVAL;
-	r = bof_entry_grow(array);
-	if (r)
-		return r;
-	array->array[array->array_size++] = value;
-	array->size += value->size;
-	bof_incref(value);
-	return 0;
-}
-
-bof_t *bof_array_get(bof_t *bof, unsigned i)
-{
-	if (!bof_is_array(bof) || i >= bof->array_size)
-		return NULL;
-	return bof->array[i];
-}
-
-unsigned bof_array_size(bof_t *bof)
-{
-	if (!bof_is_array(bof))
-		return 0;
-	return bof->array_size;
-}
-
-/*
- * blob
- */
-bof_t *bof_blob(unsigned size, void *value)
-{
-	bof_t *blob = bof_object();
-
-	if (blob == NULL)
-		return NULL;
-	blob->type = BOF_TYPE_BLOB;
-	blob->value = calloc(1, size);
-	if (blob->value == NULL) {
-		bof_decref(blob);
-		return NULL;
-	}
-	blob->size = size;
-	memcpy(blob->value, value, size);
-	blob->size += 12;
-	return blob;
-}
-
-unsigned bof_blob_size(bof_t *bof)
-{
-	if (!bof_is_blob(bof))
-		return 0;
-	return bof->size - 12;
-}
-
-void *bof_blob_value(bof_t *bof)
-{
-	if (!bof_is_blob(bof))
-		return NULL;
-	return bof->value;
-}
-
-/*
- * string
- */
-bof_t *bof_string(const char *value)
-{
-	bof_t *string = bof_object();
-
-	if (string == NULL)
-		return NULL;
-	string->type = BOF_TYPE_STRING;
-	string->size = strlen(value) + 1;
-	string->value = calloc(1, string->size);
-	if (string->value == NULL) {
-		bof_decref(string);
-		return NULL;
-	}
-	strcpy(string->value, value);
-	string->size += 12;
-	return string;
-}
-
-/*
- *  int32
- */
-bof_t *bof_int32(int32_t value)
-{
-	bof_t *int32 = bof_object();
-
-	if (int32 == NULL)
-		return NULL;
-	int32->type = BOF_TYPE_INT32;
-	int32->size = 4;
-	int32->value = calloc(1, int32->size);
-	if (int32->value == NULL) {
-		bof_decref(int32);
-		return NULL;
-	}
-	memcpy(int32->value, &value, 4);
-	int32->size += 12;
-	return int32;
-}
-
-int32_t bof_int32_value(bof_t *bof)
-{
-	return *((uint32_t*)bof->value);
-}
-
-/*
- *  common
- */
-static void bof_indent(int level)
-{
-	int i;
-
-	for (i = 0; i < level; i++)
-		fprintf(stderr, " ");
-}
-
-static void bof_print_bof(bof_t *bof, int level, int entry)
-{
-	bof_indent(level);
-	if (bof == NULL) {
-		fprintf(stderr, "--NULL-- for entry %d\n", entry);
-		return;
-	}
-	switch (bof->type) {
-	case BOF_TYPE_STRING:
-		fprintf(stderr, "%p string [%s %d]\n", bof, (char*)bof->value, bof->size);
-		break;
-	case BOF_TYPE_INT32:
-		fprintf(stderr, "%p int32 [%d %d]\n", bof, *(int*)bof->value, bof->size);
-		break;
-	case BOF_TYPE_BLOB:
-		fprintf(stderr, "%p blob [%d]\n", bof, bof->size);
-		break;
-	case BOF_TYPE_NULL:
-		fprintf(stderr, "%p null [%d]\n", bof, bof->size);
-		break;
-	case BOF_TYPE_OBJECT:
-		fprintf(stderr, "%p object [%d %d]\n", bof, bof->array_size / 2, bof->size);
-		break;
-	case BOF_TYPE_ARRAY:
-		fprintf(stderr, "%p array [%d %d]\n", bof, bof->array_size, bof->size);
-		break;
-	default:
-		fprintf(stderr, "%p unknown [%d]\n", bof, bof->type);
-		return;
-	}
-}
-
-static void bof_print_rec(bof_t *bof, int level, int entry)
-{
-	unsigned i;
-
-	bof_print_bof(bof, level, entry);
-	for (i = 0; i < bof->array_size; i++) {
-		bof_print_rec(bof->array[i], level + 2, i);
-	}
-}
-
-void bof_print(bof_t *bof)
-{
-	bof_print_rec(bof, 0, 0);
-}
-
-static int bof_read(bof_t *root, FILE *file, long end, int level)
-{
-	bof_t *bof = NULL;
-	int r;
-
-	if (ftell(file) >= end) {
-		return 0;
-	}
-	r = bof_entry_grow(root);
-	if (r)
-		return r;
-	bof = bof_object();
-	if (bof == NULL)
-		return -ENOMEM;
-	bof->offset = ftell(file);
-	r = fread(&bof->type, 4, 1, file);
-	if (r != 1)
-		goto out_err;
-	r = fread(&bof->size, 4, 1, file);
-	if (r != 1)
-		goto out_err;
-	r = fread(&bof->array_size, 4, 1, file);
-	if (r != 1)
-		goto out_err;
-	switch (bof->type) {
-	case BOF_TYPE_STRING:
-	case BOF_TYPE_INT32:
-	case BOF_TYPE_BLOB:
-		bof->value = calloc(1, bof->size - 12);
-		if (bof->value == NULL) {
-			goto out_err;
-		}
-		r = fread(bof->value, bof->size - 12, 1, file);
-		if (r != 1) {
-			fprintf(stderr, "error reading %d\n", bof->size - 12);
-			goto out_err;
-		}
-		break;
-	case BOF_TYPE_NULL:
-		return 0;
-	case BOF_TYPE_OBJECT:
-	case BOF_TYPE_ARRAY:
-		r = bof_read(bof, file, bof->offset + bof->size, level + 2);
-		if (r)
-			goto out_err;
-		break;
-	default:
-		fprintf(stderr, "invalid type %d\n", bof->type);
-		goto out_err;
-	}
-	root->array[root->centry++] = bof;
-	return bof_read(root, file, end, level);
-out_err:
-	bof_decref(bof);
-	return -EINVAL;
-}
-
-bof_t *bof_load_file(const char *filename)
-{
-	bof_t *root = bof_object();
-	int r;
-
-	if (root == NULL) {
-		fprintf(stderr, "%s failed to create root object\n", __func__);
-		return NULL;
-	}
-	root->file = fopen(filename, "r");
-	if (root->file == NULL)
-		goto out_err;
-	r = fseek(root->file, 0L, SEEK_SET);
-	if (r) {
-		fprintf(stderr, "%s failed to seek into file %s\n", __func__, filename);
-		goto out_err;
-	}
-	root->offset = ftell(root->file);
-	r = fread(&root->type, 4, 1, root->file);
-	if (r != 1)
-		goto out_err;
-	r = fread(&root->size, 4, 1, root->file);
-	if (r != 1)
-		goto out_err;
-	r = fread(&root->array_size, 4, 1, root->file);
-	if (r != 1)
-		goto out_err;
-	r = bof_read(root, root->file, root->offset + root->size, 2);
-	if (r)
-		goto out_err;
-	return root;
-out_err:
-	bof_decref(root);
-	return NULL;
-}
-
-void bof_incref(bof_t *bof)
-{
-	bof->refcount++;
-}
-
-void bof_decref(bof_t *bof)
-{
-	unsigned i;
-
-	if (bof == NULL)
-		return;
-	if (--bof->refcount > 0)
-		return;
-	for (i = 0; i < bof->array_size; i++) {
-		bof_decref(bof->array[i]);
-		bof->array[i] = NULL;
-	}
-	bof->array_size = 0;
-	if (bof->file) {
-		fclose(bof->file);
-		bof->file = NULL;
-	}
-	free(bof->array);
-	free(bof->value);
-	free(bof);
-}
-
-static int bof_file_write(bof_t *bof, FILE *file)
-{
-	unsigned i;
-	int r;
-
-	r = fwrite(&bof->type, 4, 1, file);
-	if (r != 1)
-		return -EINVAL;
-	r = fwrite(&bof->size, 4, 1, file);
-	if (r != 1)
-		return -EINVAL;
-	r = fwrite(&bof->array_size, 4, 1, file);
-	if (r != 1)
-		return -EINVAL;
-	switch (bof->type) {
-	case BOF_TYPE_NULL:
-		if (bof->size)
-			return -EINVAL;
-		break;
-	case BOF_TYPE_STRING:
-	case BOF_TYPE_INT32:
-	case BOF_TYPE_BLOB:
-		r = fwrite(bof->value, bof->size - 12, 1, file);
-		if (r != 1)
-			return -EINVAL;
-		break;
-	case BOF_TYPE_OBJECT:
-	case BOF_TYPE_ARRAY:
-		for (i = 0; i < bof->array_size; i++) {
-			r = bof_file_write(bof->array[i], file);
-			if (r)
-				return r;
-		}
-		break;
-	default:
-		return -EINVAL;
-	}
-	return 0;
-}
-
-int bof_dump_file(bof_t *bof, const char *filename)
-{
-	unsigned i;
-	int r = 0;
-
-	if (bof->file) {
-		fclose(bof->file);
-		bof->file = NULL;
-	}
-	bof->file = fopen(filename, "w");
-	if (bof->file == NULL) {
-		fprintf(stderr, "%s failed to open file %s\n", __func__, filename);
-		r = -EINVAL;
-		goto out_err;
-	}
-	r = fseek(bof->file, 0L, SEEK_SET);
-	if (r) {
-		fprintf(stderr, "%s failed to seek into file %s\n", __func__, filename);
-		goto out_err;
-	}
-	r = fwrite(&bof->type, 4, 1, bof->file);
-	if (r != 1)
-		goto out_err;
-	r = fwrite(&bof->size, 4, 1, bof->file);
-	if (r != 1)
-		goto out_err;
-	r = fwrite(&bof->array_size, 4, 1, bof->file);
-	if (r != 1)
-		goto out_err;
-	for (i = 0; i < bof->array_size; i++) {
-		r = bof_file_write(bof->array[i], bof->file);
-		if (r)
-			return r;
-	}
-out_err:
-	fclose(bof->file);
-	bof->file = NULL;
-	return r;
-}
diff --git a/src/gallium/winsys/r600/drm/bof.h b/src/gallium/winsys/r600/drm/bof.h
deleted file mode 100644
index 014affb74f1..00000000000
--- a/src/gallium/winsys/r600/drm/bof.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright 2010 Jerome Glisse <[email protected]>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *      Jerome Glisse
- */
-#ifndef BOF_H
-#define BOF_H
-
-#include <stdio.h>
-#include <stdint.h>
-
-#define BOF_TYPE_STRING		0
-#define BOF_TYPE_NULL		1
-#define BOF_TYPE_BLOB		2
-#define BOF_TYPE_OBJECT		3
-#define BOF_TYPE_ARRAY		4
-#define BOF_TYPE_INT32		5
-
-struct bof;
-
-typedef struct bof {
-	struct bof	**array;
-	unsigned	centry;
-	unsigned	nentry;
-	unsigned	refcount;
-	FILE		*file;
-	uint32_t	type;
-	uint32_t	size;
-	uint32_t	array_size;
-	void		*value;
-	long		offset;
-} bof_t;
-
-extern int bof_file_flush(bof_t *root);
-extern bof_t *bof_file_new(const char *filename);
-extern int bof_object_dump(bof_t *object, const char *filename);
-
-/* object */
-extern bof_t *bof_object(void);
-extern bof_t *bof_object_get(bof_t *object, const char *keyname);
-extern int bof_object_set(bof_t *object, const char *keyname, bof_t *value);
-/* array */
-extern bof_t *bof_array(void);
-extern int bof_array_append(bof_t *array, bof_t *value);
-extern bof_t *bof_array_get(bof_t *bof, unsigned i);
-extern unsigned bof_array_size(bof_t *bof);
-/* blob */
-extern bof_t *bof_blob(unsigned size, void *value);
-extern unsigned bof_blob_size(bof_t *bof);
-extern void *bof_blob_value(bof_t *bof);
-/* string */
-extern bof_t *bof_string(const char *value);
-/* int32 */
-extern bof_t *bof_int32(int32_t value);
-extern int32_t bof_int32_value(bof_t *bof);
-/* common functions */
-extern void bof_decref(bof_t *bof);
-extern void bof_incref(bof_t *bof);
-extern bof_t *bof_load_file(const char *filename);
-extern int bof_dump_file(bof_t *bof, const char *filename);
-extern void bof_print(bof_t *bof);
-
-static inline int bof_is_object(bof_t *bof){return (bof->type == BOF_TYPE_OBJECT);}
-static inline int bof_is_blob(bof_t *bof){return (bof->type == BOF_TYPE_BLOB);}
-static inline int bof_is_null(bof_t *bof){return (bof->type == BOF_TYPE_NULL);}
-static inline int bof_is_int32(bof_t *bof){return (bof->type == BOF_TYPE_INT32);}
-static inline int bof_is_array(bof_t *bof){return (bof->type == BOF_TYPE_ARRAY);}
-static inline int bof_is_string(bof_t *bof){return (bof->type == BOF_TYPE_STRING);}
-
-#endif
diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
index 60d2e289396..3417eb39192 100644
--- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c
+++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
@@ -23,20 +23,11 @@
  * Authors:
  *      Jerome Glisse
  */
-#include <errno.h>
-#include <stdint.h>
-#include <string.h>
-#include <stdlib.h>
-#include <assert.h>
-#include "xf86drm.h"
 #include "r600.h"
+#include "r600_priv.h"
 #include "evergreend.h"
-#include "radeon_drm.h"
-#include "bof.h"
-#include "pipe/p_compiler.h"
-#include "util/u_inlines.h"
 #include "util/u_memory.h"
-#include "r600_priv.h"
+#include <errno.h>
 
 #define GROUP_FORCE_NEW_BLOCK	0
 
@@ -168,6 +159,7 @@ static const struct r600_reg evergreen_context_reg_list[] = {
 	{R_028404_VGT_MIN_VTX_INDX, 0, 0, 0},
 	{R_028408_VGT_INDX_OFFSET, 0, 0, 0},
 	{R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0, 0},
+	{R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0, 0},
 	{GROUP_FORCE_NEW_BLOCK, 0, 0, 0},
 	{R_028410_SX_ALPHA_TEST_CONTROL, 0, 0, 0},
 	{R_028414_CB_BLEND_RED, 0, 0, 0},
@@ -532,6 +524,7 @@ static const struct r600_reg cayman_context_reg_list[] = {
 	{R_028404_VGT_MIN_VTX_INDX, 0, 0, 0},
 	{R_028408_VGT_INDX_OFFSET, 0, 0, 0},
 	{R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0, 0},
+	{R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0, 0},
 	{GROUP_FORCE_NEW_BLOCK, 0, 0, 0},
 	{R_028410_SX_ALPHA_TEST_CONTROL, 0, 0, 0},
 	{R_028414_CB_BLEND_RED, 0, 0, 0},
@@ -909,6 +902,7 @@ int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon)
 
 	memset(ctx, 0, sizeof(struct r600_context));
 	ctx->radeon = radeon;
+
 	LIST_INITHEAD(&ctx->query_list);
 
 	/* init dirty list */
@@ -992,33 +986,23 @@ int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon)
 	if (r)
 		goto out_err;
 
+	ctx->cs = radeon->ws->cs_create(radeon->ws);
+
 	/* allocate cs variables */
-	ctx->nreloc = RADEON_CTX_MAX_PM4;
-	ctx->reloc = calloc(ctx->nreloc, sizeof(struct r600_reloc));
-	if (ctx->reloc == NULL) {
-		r = -ENOMEM;
-		goto out_err;
-	}
-	ctx->bo = calloc(ctx->nreloc, sizeof(void *));
+	ctx->bo = calloc(RADEON_MAX_CMDBUF_DWORDS, sizeof(void *));
 	if (ctx->bo == NULL) {
 		r = -ENOMEM;
 		goto out_err;
 	}
-	ctx->pm4_ndwords = RADEON_CTX_MAX_PM4;
-	ctx->pm4 = calloc(ctx->pm4_ndwords, 4);
-	if (ctx->pm4 == NULL) {
-		r = -ENOMEM;
-		goto out_err;
-	}
+	ctx->pm4_ndwords = RADEON_MAX_CMDBUF_DWORDS;
+	ctx->pm4 = ctx->cs->buf;
 
 	r600_init_cs(ctx);
 	/* save 16dwords space for fence mecanism */
 	ctx->pm4_ndwords -= 16;
-
 	ctx->max_db = 8;
 
-	LIST_INITHEAD(&ctx->fenced_bo);
-
+	r600_get_backend_mask(ctx);
 	return 0;
 out_err:
 	r600_context_fini(ctx);
@@ -1154,10 +1138,6 @@ void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *dr
 
 	if (draw->indices) {
 		ndwords = 11;
-		/* make sure there is enough relocation space before scheduling draw */
-		if (ctx->creloc >= (ctx->nreloc - 1)) {
-			r600_context_flush(ctx);
-		}
 	}
 
 	/* queries need some special values */
@@ -1174,11 +1154,11 @@ void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *dr
 
 	/* update the max dword count to make sure we have enough space
 	 * reserved for flushing the destination caches */
-	ctx->pm4_ndwords = RADEON_CTX_MAX_PM4 - ctx->num_dest_buffers * 7 - 16;
+	ctx->pm4_ndwords = RADEON_MAX_CMDBUF_DWORDS - ctx->num_dest_buffers * 7 - 16;
 
 	if ((ctx->pm4_dirty_cdwords + ndwords + ctx->pm4_cdwords) > ctx->pm4_ndwords) {
 		/* need to flush */
-		r600_context_flush(ctx);
+		r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
 	}
 	/* at that point everythings is flushed and ctx->pm4_cdwords = 0 */
 	if ((ctx->pm4_dirty_cdwords + ndwords) > ctx->pm4_ndwords) {
@@ -1203,13 +1183,12 @@ void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *dr
 	pm4[3] = draw->vgt_num_instances;
 	if (draw->indices) {
 	        pm4[4] = PKT3(PKT3_DRAW_INDEX, 3, ctx->predicate_drawing);
-		pm4[5] = draw->indices_bo_offset + r600_bo_offset(draw->indices);
+		pm4[5] = draw->indices_bo_offset;
 		pm4[6] = 0;
 		pm4[7] = draw->vgt_num_indices;
 		pm4[8] = draw->vgt_draw_initiator;
 		pm4[9] = PKT3(PKT3_NOP, 0, ctx->predicate_drawing);
-		pm4[10] = 0;
-		r600_context_bo_reloc(ctx, &pm4[10], draw->indices);
+		pm4[10] = r600_context_bo_reloc(ctx, draw->indices, RADEON_USAGE_READ);
 	} else {
 		pm4[4] = PKT3(PKT3_DRAW_INDEX_AUTO, 1, ctx->predicate_drawing);
 		pm4[5] = draw->vgt_num_indices;
@@ -1270,4 +1249,3 @@ void evergreen_context_flush_dest_caches(struct r600_context *ctx)
 
 	ctx->flags &= ~R600_CONTEXT_DST_CACHES_DIRTY;
 }
-
diff --git a/src/gallium/winsys/r600/drm/r600_bo.c b/src/gallium/winsys/r600/drm/r600_bo.c
index 0f5b063cf5a..4beedad233e 100644
--- a/src/gallium/winsys/r600/drm/r600_bo.c
+++ b/src/gallium/winsys/r600/drm/r600_bo.c
@@ -23,176 +23,109 @@
  * Authors:
  *      Dave Airlie
  */
-#include <pipe/p_compiler.h>
-#include <pipe/p_screen.h>
-#include <pipebuffer/pb_bufmgr.h>
-#include "state_tracker/drm_driver.h"
 #include "r600_priv.h"
 #include "r600d.h"
-#include "drm.h"
-#include "radeon_drm.h"
+#include "state_tracker/drm_driver.h"
 
 struct r600_bo *r600_bo(struct radeon *radeon,
 			unsigned size, unsigned alignment,
 			unsigned binding, unsigned usage)
 {
 	struct r600_bo *bo;
-	struct radeon_bo *rbo;
+	struct pb_buffer *pb;
 	uint32_t initial_domain, domains;
 	  
 	/* Staging resources particpate in transfers and blits only
 	 * and are used for uploads and downloads from regular
 	 * resources.  We generate them internally for some transfers.
 	 */
-	if (usage == PIPE_USAGE_STAGING)
-		domains = RADEON_GEM_DOMAIN_CPU | RADEON_GEM_DOMAIN_GTT;
-	else
-		domains = (RADEON_GEM_DOMAIN_CPU |
-				RADEON_GEM_DOMAIN_GTT |
-				RADEON_GEM_DOMAIN_VRAM);
-
-	if (binding & (PIPE_BIND_CONSTANT_BUFFER | PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) {
-		bo = r600_bomgr_bo_create(radeon->bomgr, size, alignment, *radeon->cfence);
-		if (bo) {
-			bo->domains = domains;
-			return bo;
+	if (usage == PIPE_USAGE_STAGING) {
+		domains = RADEON_DOMAIN_GTT;
+		initial_domain = RADEON_DOMAIN_GTT;
+	} else {
+		domains = RADEON_DOMAIN_GTT | RADEON_DOMAIN_VRAM;
+
+		switch(usage) {
+		case PIPE_USAGE_DYNAMIC:
+		case PIPE_USAGE_STREAM:
+		case PIPE_USAGE_STAGING:
+			initial_domain = RADEON_DOMAIN_GTT;
+			break;
+		case PIPE_USAGE_DEFAULT:
+		case PIPE_USAGE_STATIC:
+		case PIPE_USAGE_IMMUTABLE:
+		default:
+			initial_domain = RADEON_DOMAIN_VRAM;
+			break;
 		}
 	}
 
-	switch(usage) {
-	case PIPE_USAGE_DYNAMIC:
-	case PIPE_USAGE_STREAM:
-	case PIPE_USAGE_STAGING:
-		initial_domain = RADEON_GEM_DOMAIN_GTT;
-		break;
-	case PIPE_USAGE_DEFAULT:
-	case PIPE_USAGE_STATIC:
-	case PIPE_USAGE_IMMUTABLE:
-	default:
-		initial_domain = RADEON_GEM_DOMAIN_VRAM;
-		break;
-	}
-	rbo = radeon_bo(radeon, 0, size, alignment, initial_domain);
-	if (rbo == NULL) {
+	pb = radeon->ws->buffer_create(radeon->ws, size, alignment, binding, initial_domain);
+	if (!pb) {
 		return NULL;
 	}
 
 	bo = calloc(1, sizeof(struct r600_bo));
-	bo->size = size;
-	bo->alignment = alignment;
 	bo->domains = domains;
-	bo->bo = rbo;
-	if (binding & (PIPE_BIND_CONSTANT_BUFFER | PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) {
-		r600_bomgr_bo_init(radeon->bomgr, bo);
-	}
+	bo->buf = pb;
+	bo->cs_buf = radeon->ws->buffer_get_cs_handle(pb);
 
 	pipe_reference_init(&bo->reference, 1);
 	return bo;
 }
 
-struct r600_bo *r600_bo_handle(struct radeon *radeon,
-			       unsigned handle, unsigned *array_mode)
+struct r600_bo *r600_bo_handle(struct radeon *radeon, struct winsys_handle *whandle,
+			       unsigned *stride, unsigned *array_mode)
 {
+	struct pb_buffer *pb;
 	struct r600_bo *bo = calloc(1, sizeof(struct r600_bo));
-	struct radeon_bo *rbo;
 
-	rbo = bo->bo = radeon_bo(radeon, handle, 0, 0, 0);
-	if (rbo == NULL) {
+	pb = bo->buf = radeon->ws->buffer_from_handle(radeon->ws, whandle, stride, NULL);
+	if (!pb) {
 		free(bo);
 		return NULL;
 	}
-	bo->size = rbo->size;
-	bo->domains = (RADEON_GEM_DOMAIN_CPU |
-			RADEON_GEM_DOMAIN_GTT |
-			RADEON_GEM_DOMAIN_VRAM);
 
 	pipe_reference_init(&bo->reference, 1);
+	bo->domains = RADEON_DOMAIN_GTT | RADEON_DOMAIN_VRAM;
+	bo->cs_buf = radeon->ws->buffer_get_cs_handle(pb);
+
+	if (stride)
+		*stride = whandle->stride;
 
-	radeon_bo_get_tiling_flags(radeon, rbo, &bo->tiling_flags, &bo->kernel_pitch);
 	if (array_mode) {
-		if (bo->tiling_flags) {
-			if (bo->tiling_flags & RADEON_TILING_MACRO)
-				*array_mode = V_0280A0_ARRAY_2D_TILED_THIN1;
-			else if (bo->tiling_flags & RADEON_TILING_MICRO)
-				*array_mode = V_0280A0_ARRAY_1D_TILED_THIN1;
-		} else {
+		enum radeon_bo_layout micro, macro;
+
+		radeon->ws->buffer_get_tiling(bo->buf, &micro, &macro);
+
+		if (macro == RADEON_LAYOUT_TILED)
+			*array_mode = V_0280A0_ARRAY_2D_TILED_THIN1;
+		else if (micro == RADEON_LAYOUT_TILED)
+			*array_mode = V_0280A0_ARRAY_1D_TILED_THIN1;
+		else
 			*array_mode = 0;
-		}
 	}
 	return bo;
 }
 
-void *r600_bo_map(struct radeon *radeon, struct r600_bo *bo, unsigned usage, void *ctx)
+void *r600_bo_map(struct radeon *radeon, struct r600_bo *bo, struct radeon_winsys_cs *cs, unsigned usage)
 {
-	struct pipe_context *pctx = ctx;
-
-	if (usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
-		radeon_bo_map(radeon, bo->bo);
-		return (uint8_t *) bo->bo->data + bo->offset;
-	}
-
-	if (p_atomic_read(&bo->bo->reference.count) > 1) {
-		if (usage & PIPE_TRANSFER_DONTBLOCK) {
-			return NULL;
-		}
-		if (ctx) {
-                        pctx->flush(pctx, NULL);
-		}
-	}
-
-	if (usage & PIPE_TRANSFER_DONTBLOCK) {
-		uint32_t domain;
-
-		if (radeon_bo_busy(radeon, bo->bo, &domain))
-			return NULL;
-		if (radeon_bo_map(radeon, bo->bo)) {
-			return NULL;
-		}
-		goto out;
-	}
-
-	radeon_bo_map(radeon, bo->bo);
-	if (radeon_bo_wait(radeon, bo->bo)) {
-		radeon_bo_unmap(radeon, bo->bo);
-		return NULL;
-	}
-
-out:
-	return (uint8_t *) bo->bo->data + bo->offset;
+	return radeon->ws->buffer_map(bo->buf, cs, usage);
 }
 
 void r600_bo_unmap(struct radeon *radeon, struct r600_bo *bo)
 {
-	radeon_bo_unmap(radeon, bo->bo);
+	radeon->ws->buffer_unmap(bo->buf);
 }
 
-void r600_bo_destroy(struct radeon *radeon, struct r600_bo *bo)
+void r600_bo_destroy(struct r600_bo *bo)
 {
-	if (bo->manager_id) {
-		if (!r600_bomgr_bo_destroy(radeon->bomgr, bo)) {
-			/* destroy is delayed by buffer manager */
-			return;
-		}
-	}
-	radeon_bo_reference(radeon, &bo->bo, NULL);
+	pb_reference(&bo->buf, NULL);
 	free(bo);
 }
 
 boolean r600_bo_get_winsys_handle(struct radeon *radeon, struct r600_bo *bo,
-				unsigned stride, struct winsys_handle *whandle)
+				  unsigned stride, struct winsys_handle *whandle)
 {
-	whandle->stride = stride;
-	switch(whandle->type) {
-	case DRM_API_HANDLE_TYPE_KMS:
-		whandle->handle = bo->bo->handle;
-		break;
-	case DRM_API_HANDLE_TYPE_SHARED:
-		if (radeon_bo_get_name(radeon, bo->bo, &whandle->handle))
-			return FALSE;
-		break;
-	default:
-		return FALSE;
-	}
-
-	return TRUE;
+	return radeon->ws->buffer_get_handle(bo->buf, stride, whandle);
 }
diff --git a/src/gallium/winsys/r600/drm/r600_bomgr.c b/src/gallium/winsys/r600/drm/r600_bomgr.c
deleted file mode 100644
index 4918d5eb0b1..00000000000
--- a/src/gallium/winsys/r600/drm/r600_bomgr.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- * Copyright 2010 VMWare.
- * Copyright 2010 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *      Jose Fonseca <jrfonseca-at-vmware-dot-com>
- *      Thomas Hellström <thomas-at-vmware-dot-com>
- *      Jerome Glisse <[email protected]>
- */
-#include <util/u_memory.h>
-#include <util/u_double_list.h>
-#include <util/u_time.h>
-#include <pipebuffer/pb_bufmgr.h>
-#include "r600_priv.h"
-
-static void r600_bomgr_timeout_flush(struct r600_bomgr *mgr)
-{
-	struct r600_bo *bo, *tmp;
-	int64_t now;
-
-	now = os_time_get();
-	LIST_FOR_EACH_ENTRY_SAFE(bo, tmp, &mgr->delayed, list) {
-		if(!os_time_timeout(bo->start, bo->end, now))
-			break;
-
-		mgr->num_delayed--;
-		bo->manager_id = 0;
-		LIST_DEL(&bo->list);
-		r600_bo_destroy(mgr->radeon, bo);
-	}
-}
-
-static INLINE int r600_bo_is_compat(struct r600_bomgr *mgr,
-					struct r600_bo *bo,
-					unsigned size,
-					unsigned alignment,
-					unsigned cfence)
-{
-	if(bo->size < size) {
-		return 0;
-	}
-
-	/* be lenient with size */
-	if(bo->size >= 2*size) {
-		return 0;
-	}
-
-	if(!pb_check_alignment(alignment, bo->alignment)) {
-		return 0;
-	}
-
-	if (!fence_is_after(cfence, bo->fence)) {
-		return 0;
-	}
-
-	return 1;
-}
-
-struct r600_bo *r600_bomgr_bo_create(struct r600_bomgr *mgr,
-					unsigned size,
-					unsigned alignment,
-					unsigned cfence)
-{
-	struct r600_bo *bo, *tmp;
-	int64_t now;
-
-
-	pipe_mutex_lock(mgr->mutex);
-
-	now = os_time_get();
-	LIST_FOR_EACH_ENTRY_SAFE(bo, tmp, &mgr->delayed, list) {
-		if(r600_bo_is_compat(mgr, bo, size, alignment, cfence)) {
-			LIST_DEL(&bo->list);
-			--mgr->num_delayed;
-			r600_bomgr_timeout_flush(mgr);
-			pipe_mutex_unlock(mgr->mutex);
-			LIST_INITHEAD(&bo->list);
-			pipe_reference_init(&bo->reference, 1);
-			return bo;
-		}
-
-		if(os_time_timeout(bo->start, bo->end, now)) {
-			mgr->num_delayed--;
-			bo->manager_id = 0;
-			LIST_DEL(&bo->list);
-			r600_bo_destroy(mgr->radeon, bo);
-		}
-	}
-
-	pipe_mutex_unlock(mgr->mutex);
-	return NULL;
-}
-
-void r600_bomgr_bo_init(struct r600_bomgr *mgr, struct r600_bo *bo)
-{
-	LIST_INITHEAD(&bo->list);
-	bo->manager_id = 1;
-}
-
-boolean r600_bomgr_bo_destroy(struct r600_bomgr *mgr, struct r600_bo *bo)
-{
-	bo->start = os_time_get();
-	bo->end = bo->start + mgr->usecs;
-	pipe_mutex_lock(mgr->mutex);
-	LIST_ADDTAIL(&bo->list, &mgr->delayed);
-	++mgr->num_delayed;
-	pipe_mutex_unlock(mgr->mutex);
-	return FALSE;
-}
-
-void r600_bomgr_destroy(struct r600_bomgr *mgr)
-{
-	struct r600_bo *bo, *tmp;
-
-	pipe_mutex_lock(mgr->mutex);
-	LIST_FOR_EACH_ENTRY_SAFE(bo, tmp, &mgr->delayed, list) {
-		mgr->num_delayed--;
-		bo->manager_id = 0;
-		LIST_DEL(&bo->list);
-		r600_bo_destroy(mgr->radeon, bo);
-	}
-	pipe_mutex_unlock(mgr->mutex);
-
-	FREE(mgr);
-}
-
-struct r600_bomgr *r600_bomgr_create(struct radeon *radeon, unsigned usecs)
-{
-	struct r600_bomgr *mgr;
-
-	mgr = CALLOC_STRUCT(r600_bomgr);
-	if (mgr == NULL)
-		return NULL;
-
-	mgr->radeon = radeon;
-	mgr->usecs = usecs;
-	LIST_INITHEAD(&mgr->delayed);
-	mgr->num_delayed = 0;
-	pipe_mutex_init(mgr->mutex);
-
-	return mgr;
-}
diff --git a/src/gallium/winsys/r600/drm/r600_drm.c b/src/gallium/winsys/r600/drm/r600_drm.c
index ab0afea5bf5..7d5583fd287 100644
--- a/src/gallium/winsys/r600/drm/r600_drm.c
+++ b/src/gallium/winsys/r600/drm/r600_drm.c
@@ -25,29 +25,18 @@
  *      Corbin Simpson <[email protected]>
  *      Joakim Sindholt <[email protected]>
  */
-#include <stdio.h>
-#include <errno.h>
-#include <sys/ioctl.h>
-#include "util/u_inlines.h"
-#include "util/u_debug.h"
-#include "util/u_hash_table.h"
-#include <pipebuffer/pb_bufmgr.h>
-#include "r600.h"
+
 #include "r600_priv.h"
 #include "r600_drm_public.h"
-#include "xf86drm.h"
-#include "radeon_drm.h"
-
-#ifndef RADEON_INFO_TILING_CONFIG
-#define RADEON_INFO_TILING_CONFIG 0x6
-#endif
+#include "util/u_memory.h"
+#include <errno.h>
 
-#ifndef RADEON_INFO_CLOCK_CRYSTAL_FREQ
-#define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x9
+#ifndef RADEON_INFO_NUM_TILE_PIPES
+#define RADEON_INFO_NUM_TILE_PIPES 0xb
 #endif
 
-#ifndef RADEON_INFO_NUM_BACKENDS
-#define RADEON_INFO_NUM_BACKENDS 0xa
+#ifndef RADEON_INFO_BACKEND_MAP
+#define RADEON_INFO_BACKEND_MAP 0xd
 #endif
 
 enum radeon_family r600_get_family(struct radeon *r600)
@@ -67,31 +56,27 @@ struct r600_tiling_info *r600_get_tiling_info(struct radeon *radeon)
 
 unsigned r600_get_clock_crystal_freq(struct radeon *radeon)
 {
-	return radeon->clock_crystal_freq;
+	return radeon->info.r600_clock_crystal_freq;
 }
 
 unsigned r600_get_num_backends(struct radeon *radeon)
 {
-	return radeon->num_backends;
+	return radeon->info.r600_num_backends;
 }
 
-unsigned r600_get_minor_version(struct radeon *radeon)
+unsigned r600_get_num_tile_pipes(struct radeon *radeon)
 {
-	return radeon->minor_version;
+	return radeon->info.r600_num_tile_pipes;
 }
 
-
-static int radeon_get_device(struct radeon *radeon)
+unsigned r600_get_backend_map(struct radeon *radeon)
 {
-	struct drm_radeon_info info = {};
-	int r;
+	return radeon->info.r600_backend_map;
+}
 
-	radeon->device = 0;
-	info.request = RADEON_INFO_DEVICE_ID;
-	info.value = (uintptr_t)&radeon->device;
-	r = drmCommandWriteRead(radeon->fd, DRM_RADEON_INFO, &info,
-			sizeof(struct drm_radeon_info));
-	return r;
+unsigned r600_get_minor_version(struct radeon *radeon)
+{
+	return radeon->info.drm_minor;
 }
 
 static int r600_interpret_tiling(struct radeon *radeon, uint32_t tiling_config)
@@ -186,124 +171,32 @@ static int eg_interpret_tiling(struct radeon *radeon, uint32_t tiling_config)
 
 static int radeon_drm_get_tiling(struct radeon *radeon)
 {
-	struct drm_radeon_info info = {};
-	int r;
-	uint32_t tiling_config = 0;
+	uint32_t tiling_config = radeon->info.r600_tiling_config;
 
-	info.request = RADEON_INFO_TILING_CONFIG;
-	info.value = (uintptr_t)&tiling_config;
-	r = drmCommandWriteRead(radeon->fd, DRM_RADEON_INFO, &info,
-				sizeof(struct drm_radeon_info));
-
-	if (r)
+	if (!tiling_config)
 		return 0;
 
 	if (radeon->chip_class == R600 || radeon->chip_class == R700) {
-		r = r600_interpret_tiling(radeon, tiling_config);
+		return r600_interpret_tiling(radeon, tiling_config);
 	} else {
-		r = eg_interpret_tiling(radeon, tiling_config);
-	}
-	return r;
-}
-
-static int radeon_get_clock_crystal_freq(struct radeon *radeon)
-{
-	struct drm_radeon_info info = {};
-	uint32_t clock_crystal_freq = 0;
-	int r;
-
-	info.request = RADEON_INFO_CLOCK_CRYSTAL_FREQ;
-	info.value = (uintptr_t)&clock_crystal_freq;
-	r = drmCommandWriteRead(radeon->fd, DRM_RADEON_INFO, &info,
-			sizeof(struct drm_radeon_info));
-	if (r)
-		return r;
-
-	radeon->clock_crystal_freq = clock_crystal_freq;
-	return 0;
-}
-
-
-static int radeon_get_num_backends(struct radeon *radeon)
-{
-	struct drm_radeon_info info = {};
-	uint32_t num_backends = 0;
-	int r;
-
-	info.request = RADEON_INFO_NUM_BACKENDS;
-	info.value = (uintptr_t)&num_backends;
-	r = drmCommandWriteRead(radeon->fd, DRM_RADEON_INFO, &info,
-			sizeof(struct drm_radeon_info));
-	if (r)
-		return r;
-
-	radeon->num_backends = num_backends;
-	return 0;
-}
-
-
-static int radeon_init_fence(struct radeon *radeon)
-{
-	radeon->fence = 1;
-	radeon->fence_bo = r600_bo(radeon, 4096, 0, 0, 0);
-	if (radeon->fence_bo == NULL) {
-		return -ENOMEM;
+		return eg_interpret_tiling(radeon, tiling_config);
 	}
-	radeon->cfence = r600_bo_map(radeon, radeon->fence_bo, PIPE_TRANSFER_UNSYNCHRONIZED, NULL);
-	*radeon->cfence = 0;
-	return 0;
-}
-
-#define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
-
-static unsigned handle_hash(void *key)
-{
-    return PTR_TO_UINT(key);
-}
-
-static int handle_compare(void *key1, void *key2)
-{
-    return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
 }
 
-static struct radeon *radeon_new(int fd, unsigned device)
+struct radeon *radeon_create(struct radeon_winsys *ws)
 {
-	struct radeon *radeon;
-	int r;
-	drmVersionPtr version;
-
-	radeon = calloc(1, sizeof(*radeon));
+	struct radeon *radeon = CALLOC_STRUCT(radeon);
 	if (radeon == NULL) {
 		return NULL;
 	}
-	radeon->fd = fd;
-	radeon->device = device;
-	radeon->refcount = 1;
-
-	version = drmGetVersion(radeon->fd);
-	if (version->version_major != 2) {
-		fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is "
-			"only compatible with 2.x.x\n", __FUNCTION__,
-			version->version_major, version->version_minor,
-			version->version_patchlevel);
-		drmFreeVersion(version);
-		exit(1);
-	}
-
-	radeon->minor_version = version->version_minor;
 
-	drmFreeVersion(version);
+	radeon->ws = ws;
+	ws->query_info(ws, &radeon->info);
 
-	r = radeon_get_device(radeon);
-	if (r) {
-		fprintf(stderr, "Failed to get device id\n");
-		return radeon_decref(radeon);
-	}
-
-	radeon->family = radeon_family_from_device(radeon->device);
+	radeon->family = radeon_family_from_device(radeon->info.pci_id);
 	if (radeon->family == CHIP_UNKNOWN) {
-		fprintf(stderr, "Unknown chipset 0x%04X\n", radeon->device);
-		return radeon_decref(radeon);
+		fprintf(stderr, "Unknown chipset 0x%04X\n", radeon->info.pci_id);
+		return radeon_destroy(radeon);
 	}
 	/* setup class */
 	switch (radeon->family) {
@@ -349,56 +242,21 @@ static struct radeon *radeon_new(int fd, unsigned device)
 		break;
 	default:
 		fprintf(stderr, "%s unknown or unsupported chipset 0x%04X\n",
-			__func__, radeon->device);
+			__func__, radeon->info.pci_id);
 		break;
 	}
 
 	if (radeon_drm_get_tiling(radeon))
 		return NULL;
 
-	/* get the GPU counter frequency, failure is non fatal */
-	radeon_get_clock_crystal_freq(radeon);
-
-	if (radeon->minor_version >= 9)
-		radeon_get_num_backends(radeon);
-
-	radeon->bomgr = r600_bomgr_create(radeon, 1000000);
-	if (radeon->bomgr == NULL) {
-		return NULL;
-	}
-	r = radeon_init_fence(radeon);
-	if (r) {
-		radeon_decref(radeon);
-		return NULL;
-	}
-
-	radeon->bo_handles = util_hash_table_create(handle_hash, handle_compare);
-	pipe_mutex_init(radeon->bo_handles_mutex);
 	return radeon;
 }
 
-struct radeon *r600_drm_winsys_create(int drmfd)
-{
-	return radeon_new(drmfd, 0);
-}
-
-struct radeon *radeon_decref(struct radeon *radeon)
+struct radeon *radeon_destroy(struct radeon *radeon)
 {
 	if (radeon == NULL)
 		return NULL;
-	if (--radeon->refcount > 0) {
-		return NULL;
-	}
-
-	util_hash_table_destroy(radeon->bo_handles);
-	pipe_mutex_destroy(radeon->bo_handles_mutex);
-	if (radeon->fence_bo) {
-		r600_bo_reference(radeon, &radeon->fence_bo, NULL);
-	}
-
-	if (radeon->bomgr)
-		r600_bomgr_destroy(radeon->bomgr);
 
-	free(radeon);
+	FREE(radeon);
 	return NULL;
 }
diff --git a/src/gallium/winsys/r600/drm/r600_drm_public.h b/src/gallium/winsys/r600/drm/r600_drm_public.h
index cfce8df9c2c..b8a37c7574f 100644
--- a/src/gallium/winsys/r600/drm/r600_drm_public.h
+++ b/src/gallium/winsys/r600/drm/r600_drm_public.h
@@ -26,8 +26,8 @@
 #ifndef R600_DRM_PUBLIC_H
 #define R600_DRM_PUBLIC_H
 
-struct radeon;
+struct radeon_winsys;
 
-struct radeon *r600_drm_winsys_create(int drmFD);
+struct radeon *radeon_create(struct radeon_winsys *ws);
 
 #endif
diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c
index 07bd544d1a0..6c5b4b8953a 100644
--- a/src/gallium/winsys/r600/drm/r600_hw_context.c
+++ b/src/gallium/winsys/r600/drm/r600_hw_context.c
@@ -23,23 +23,97 @@
  * Authors:
  *      Jerome Glisse
  */
-#include <errno.h>
-#include <stdint.h>
-#include <string.h>
-#include <stdlib.h>
-#include <assert.h>
-#include <pipe/p_compiler.h>
-#include <util/u_inlines.h>
-#include <util/u_memory.h>
-#include <pipebuffer/pb_bufmgr.h>
-#include "xf86drm.h"
-#include "radeon_drm.h"
 #include "r600_priv.h"
-#include "bof.h"
 #include "r600d.h"
+#include "util/u_memory.h"
+#include <errno.h>
 
 #define GROUP_FORCE_NEW_BLOCK	0
 
+/* Get backends mask */
+void r600_get_backend_mask(struct r600_context *ctx)
+{
+	struct r600_bo * buffer;
+	u32 * results;
+	unsigned num_backends = r600_get_num_backends(ctx->radeon);
+	unsigned i, mask = 0;
+
+	/* if backend_map query is supported by the kernel */
+	if (ctx->radeon->info.r600_backend_map_valid) {
+		unsigned num_tile_pipes = r600_get_num_tile_pipes(ctx->radeon);
+		unsigned backend_map = r600_get_backend_map(ctx->radeon);
+		unsigned item_width, item_mask;
+
+		if (ctx->radeon->chip_class >= EVERGREEN) {
+			item_width = 4;
+			item_mask = 0x7;
+		} else {
+			item_width = 2;
+			item_mask = 0x3;
+		}
+
+		while(num_tile_pipes--) {
+			i = backend_map & item_mask;
+			mask |= (1<<i);
+			backend_map >>= item_width;
+		}
+		if (mask != 0) {
+			ctx->backend_mask = mask;
+			return;
+		}
+	}
+
+	/* otherwise backup path for older kernels */
+
+	/* create buffer for event data */
+	buffer = r600_bo(ctx->radeon, ctx->max_db*16, 1, 0,
+				PIPE_USAGE_STAGING);
+	if (!buffer)
+		goto err;
+
+	/* initialize buffer with zeroes */
+	results = r600_bo_map(ctx->radeon, buffer, ctx->cs, PIPE_TRANSFER_WRITE);
+	if (results) {
+		memset(results, 0, ctx->max_db * 4 * 4);
+		r600_bo_unmap(ctx->radeon, buffer);
+
+		/* emit EVENT_WRITE for ZPASS_DONE */
+		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE, 2, 0);
+		ctx->pm4[ctx->pm4_cdwords++] = EVENT_TYPE(EVENT_TYPE_ZPASS_DONE) | EVENT_INDEX(1);
+		ctx->pm4[ctx->pm4_cdwords++] = 0;
+		ctx->pm4[ctx->pm4_cdwords++] = 0;
+
+		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0, 0);
+		ctx->pm4[ctx->pm4_cdwords++] = r600_context_bo_reloc(ctx, buffer, RADEON_USAGE_WRITE);
+
+		/* execute */
+		r600_context_flush(ctx, 0);
+
+		/* analyze results */
+		results = r600_bo_map(ctx->radeon, buffer, ctx->cs, PIPE_TRANSFER_READ);
+		if (results) {
+			for(i = 0; i < ctx->max_db; i++) {
+				/* at least highest bit will be set if backend is used */
+				if (results[i*4 + 1])
+					mask |= (1<<i);
+			}
+			r600_bo_unmap(ctx->radeon, buffer);
+		}
+	}
+
+	r600_bo_reference(&buffer, NULL);
+
+	if (mask != 0) {
+		ctx->backend_mask = mask;
+		return;
+	}
+
+err:
+	/* fallback to old method - set num_backends lower bits to 1 */
+	ctx->backend_mask = (~((u32)0))>>(32-num_backends);
+	return;
+}
+
 static inline void r600_context_ps_partial_flush(struct r600_context *ctx)
 {
 	if (!(ctx->flags & R600_CONTEXT_DRAW_PENDING))
@@ -66,32 +140,6 @@ void r600_init_cs(struct r600_context *ctx)
 	ctx->init_dwords = ctx->pm4_cdwords;
 }
 
-static void INLINE r600_context_update_fenced_list(struct r600_context *ctx)
-{
-	for (int i = 0; i < ctx->creloc; i++) {
-		if (!LIST_IS_EMPTY(&ctx->bo[i]->fencedlist))
-			LIST_DELINIT(&ctx->bo[i]->fencedlist);
-		LIST_ADDTAIL(&ctx->bo[i]->fencedlist, &ctx->fenced_bo);
-		ctx->bo[i]->fence = ctx->radeon->fence;
-		ctx->bo[i]->ctx = ctx;
-	}
-}
-
-static void INLINE r600_context_fence_wraparound(struct r600_context *ctx, unsigned fence)
-{
-	struct radeon_bo *bo = NULL;
-	struct radeon_bo *tmp;
-
-	LIST_FOR_EACH_ENTRY_SAFE(bo, tmp, &ctx->fenced_bo, fencedlist) {
-		if (bo->fence <= *ctx->radeon->cfence) {
-			LIST_DELINIT(&bo->fencedlist);
-			bo->fence = 0;
-		} else {
-			bo->fence = fence;
-		}
-	}
-}
-
 static void r600_init_block(struct r600_context *ctx,
 			    struct r600_block *block,
 			    const struct r600_reg *reg, int index, int nreg,
@@ -680,17 +728,6 @@ static int r600_loop_const_init(struct r600_context *ctx, u32 offset)
 	return r600_context_add_block(ctx, r600_loop_consts, nreg, PKT3_SET_LOOP_CONST, R600_LOOP_CONST_OFFSET);
 }
 
-static void r600_context_clear_fenced_bo(struct r600_context *ctx)
-{
-	struct radeon_bo *bo, *tmp;
-
-	LIST_FOR_EACH_ENTRY_SAFE(bo, tmp, &ctx->fenced_bo, fencedlist) {
-		LIST_DELINIT(&bo->fencedlist);
-		bo->fence = 0;
-		bo->ctx = NULL;
-	}
-}
-
 static void r600_free_resource_range(struct r600_context *ctx, struct r600_range *range, int nblocks)
 {
 	struct r600_block *block;
@@ -699,7 +736,7 @@ static void r600_free_resource_range(struct r600_context *ctx, struct r600_range
 		block = range->blocks[i];
 		if (block) {
 			for (int k = 1; k <= block->nbo; k++)
-				r600_bo_reference(ctx->radeon, &block->reloc[k].bo, NULL);
+				r600_bo_reference(&block->reloc[k].bo, NULL);
 			free(block);
 		}
 	}
@@ -724,7 +761,7 @@ void r600_context_fini(struct r600_context *ctx)
 					range->blocks[CTX_BLOCK_ID(offset)] = NULL;
 				}
 				for (int k = 1; k <= block->nbo; k++) {
-					r600_bo_reference(ctx->radeon, &block->reloc[k].bo, NULL);
+					r600_bo_reference(&block->reloc[k].bo, NULL);
 				}
 				free(block);
 			}
@@ -736,11 +773,9 @@ void r600_context_fini(struct r600_context *ctx)
 	r600_free_resource_range(ctx, &ctx->fs_resources, ctx->num_fs_resources);
 	free(ctx->range);
 	free(ctx->blocks);
-	free(ctx->reloc);
 	free(ctx->bo);
-	free(ctx->pm4);
+	ctx->radeon->ws->cs_destroy(ctx->cs);
 
-	r600_context_clear_fenced_bo(ctx);
 	memset(ctx, 0, sizeof(struct r600_context));
 }
 
@@ -797,6 +832,7 @@ int r600_context_init(struct r600_context *ctx, struct radeon *radeon)
 
 	memset(ctx, 0, sizeof(struct r600_context));
 	ctx->radeon = radeon;
+
 	LIST_INITHEAD(&ctx->query_list);
 
 	/* init dirty list */
@@ -872,33 +908,23 @@ int r600_context_init(struct r600_context *ctx, struct radeon *radeon)
 	if (r)
 		goto out_err;
 
+	ctx->cs = radeon->ws->cs_create(radeon->ws);
+
 	/* allocate cs variables */
-	ctx->nreloc = RADEON_CTX_MAX_PM4;
-	ctx->reloc = calloc(ctx->nreloc, sizeof(struct r600_reloc));
-	if (ctx->reloc == NULL) {
-		r = -ENOMEM;
-		goto out_err;
-	}
-	ctx->bo = calloc(ctx->nreloc, sizeof(void *));
+	ctx->bo = calloc(RADEON_MAX_CMDBUF_DWORDS, sizeof(void *));
 	if (ctx->bo == NULL) {
 		r = -ENOMEM;
 		goto out_err;
 	}
-	ctx->pm4_ndwords = RADEON_CTX_MAX_PM4;
-	ctx->pm4 = calloc(ctx->pm4_ndwords, 4);
-	if (ctx->pm4 == NULL) {
-		r = -ENOMEM;
-		goto out_err;
-	}
+	ctx->pm4_ndwords = RADEON_MAX_CMDBUF_DWORDS;
+	ctx->pm4 = ctx->cs->buf;
 
 	r600_init_cs(ctx);
 	/* save 16dwords space for fence mecanism */
 	ctx->pm4_ndwords -= 16;
-
-	LIST_INITHEAD(&ctx->fenced_bo);
-
 	ctx->max_db = 4;
 
+	r600_get_backend_mask(ctx);
 	return 0;
 out_err:
 	r600_context_fini(ctx);
@@ -912,7 +938,7 @@ void r600_context_flush_all(struct r600_context *ctx, unsigned flush_flags)
 
 	if ((ctx->pm4_dirty_cdwords + ndwords + ctx->pm4_cdwords) > ctx->pm4_ndwords) {
 		/* need to flush */
-		r600_context_flush(ctx);
+		r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
 	}
 
 	ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_SURFACE_SYNC, 3, ctx->predicate_drawing);
@@ -923,11 +949,8 @@ void r600_context_flush_all(struct r600_context *ctx, unsigned flush_flags)
 }
 
 void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags,
-				unsigned flush_mask, struct r600_bo *rbo)
+				unsigned flush_mask, struct r600_bo *bo)
 {
-	struct radeon_bo *bo;
-
-	bo = rbo->bo;
 	/* if bo has already been flushed */
 	if (!(~bo->last_flush & flush_flags)) {
 		bo->last_flush &= flush_mask;
@@ -959,29 +982,15 @@ void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags,
 	} else {
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_SURFACE_SYNC, 3, ctx->predicate_drawing);
 		ctx->pm4[ctx->pm4_cdwords++] = flush_flags;
-		ctx->pm4[ctx->pm4_cdwords++] = (bo->size + 255) >> 8;
+		ctx->pm4[ctx->pm4_cdwords++] = (bo->buf->base.size + 255) >> 8;
 		ctx->pm4[ctx->pm4_cdwords++] = 0x00000000;
 		ctx->pm4[ctx->pm4_cdwords++] = 0x0000000A;
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0, ctx->predicate_drawing);
-		ctx->pm4[ctx->pm4_cdwords++] = bo->reloc_id;
+		ctx->pm4[ctx->pm4_cdwords++] = r600_context_bo_reloc(ctx, bo, RADEON_USAGE_WRITE);
 	}
 	bo->last_flush = (bo->last_flush | flush_flags) & flush_mask;
 }
 
-void r600_context_get_reloc(struct r600_context *ctx, struct r600_bo *rbo)
-{
-	struct radeon_bo *bo = rbo->bo;
-	bo->reloc = &ctx->reloc[ctx->creloc];
-	bo->reloc_id = ctx->creloc * sizeof(struct r600_reloc) / 4;
-	ctx->reloc[ctx->creloc].handle = bo->handle;
-	ctx->reloc[ctx->creloc].read_domain = rbo->domains & (RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM);
-	ctx->reloc[ctx->creloc].write_domain = rbo->domains & (RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM);
-	ctx->reloc[ctx->creloc].flags = 0;
-	radeon_bo_reference(ctx->radeon, &ctx->bo[ctx->creloc], bo);
-	rbo->fence = ctx->radeon->fence;
-	ctx->creloc++;
-}
-
 void r600_context_reg(struct r600_context *ctx,
 		      unsigned offset, unsigned value,
 		      unsigned mask)
@@ -1057,8 +1066,8 @@ void r600_context_pipe_state_set(struct r600_context *ctx, struct r600_pipe_stat
 		if (block->pm4_bo_index[id]) {
 			/* find relocation */
 			reloc_id = block->pm4_bo_index[id];
-			r600_bo_reference(ctx->radeon, &block->reloc[reloc_id].bo, reg->bo);
-			reg->bo->fence = ctx->radeon->fence;
+			r600_bo_reference(&block->reloc[reloc_id].bo, reg->bo);
+			block->reloc[reloc_id].bo_usage = reg->bo_usage;
 			/* always force dirty for relocs for now */
 			dirty |= R600_BLOCK_STATUS_DIRTY;
 		}
@@ -1094,10 +1103,10 @@ void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_
 	if (state == NULL) {
 		block->status &= ~(R600_BLOCK_STATUS_ENABLED | R600_BLOCK_STATUS_RESOURCE_DIRTY);
 		if (block->reloc[1].bo)
-			block->reloc[1].bo->bo->binding &= ~BO_BOUND_TEXTURE;
+			block->reloc[1].bo->binding &= ~BO_BOUND_TEXTURE;
 
-		r600_bo_reference(ctx->radeon, &block->reloc[1].bo, NULL);
-		r600_bo_reference(ctx->radeon, &block->reloc[2].bo, NULL);
+		r600_bo_reference(&block->reloc[1].bo, NULL);
+		r600_bo_reference(&block->reloc[2].bo, NULL);
 		LIST_DELINIT(&block->list);
 		LIST_DELINIT(&block->enable_list);
 		return;
@@ -1117,39 +1126,32 @@ void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_
 
 	if (!dirty) {
 		if (is_vertex) {
-			if (block->reloc[1].bo->bo->handle != state->bo[0]->bo->handle)
+			if (block->reloc[1].bo->buf != state->bo[0]->buf)
 				dirty |= R600_BLOCK_STATUS_RESOURCE_DIRTY;
 		} else {
-			if ((block->reloc[1].bo->bo->handle != state->bo[0]->bo->handle) ||
-			    (block->reloc[2].bo->bo->handle != state->bo[1]->bo->handle))
+			if ((block->reloc[1].bo->buf != state->bo[0]->buf) ||
+			    (block->reloc[2].bo->buf != state->bo[1]->buf))
 				dirty |= R600_BLOCK_STATUS_RESOURCE_DIRTY;
 		}
 	}
-	if (!dirty) {
-		if (is_vertex)
-			state->bo[0]->fence = ctx->radeon->fence;
-		else {
-			state->bo[0]->fence = ctx->radeon->fence;
-			state->bo[1]->fence = ctx->radeon->fence;
-		}
-	} else {
+
+	if (dirty) {
 		if (is_vertex) {
 			/* VERTEX RESOURCE, we preted there is 2 bo to relocate so
 			 * we have single case btw VERTEX & TEXTURE resource
 			 */
-			r600_bo_reference(ctx->radeon, &block->reloc[1].bo, state->bo[0]);
-			r600_bo_reference(ctx->radeon, &block->reloc[2].bo, NULL);
-			state->bo[0]->fence = ctx->radeon->fence;
+			r600_bo_reference(&block->reloc[1].bo, state->bo[0]);
+			block->reloc[1].bo_usage = state->bo_usage[0];
+			r600_bo_reference(&block->reloc[2].bo, NULL);
 		} else {
 			/* TEXTURE RESOURCE */
-			r600_bo_reference(ctx->radeon, &block->reloc[1].bo, state->bo[0]);
-			r600_bo_reference(ctx->radeon, &block->reloc[2].bo, state->bo[1]);
-			state->bo[0]->fence = ctx->radeon->fence;
-			state->bo[1]->fence = ctx->radeon->fence;
-			state->bo[0]->bo->binding |= BO_BOUND_TEXTURE;
+			r600_bo_reference(&block->reloc[1].bo, state->bo[0]);
+			block->reloc[1].bo_usage = state->bo_usage[0];
+			r600_bo_reference(&block->reloc[2].bo, state->bo[1]);
+			block->reloc[2].bo_usage = state->bo_usage[1];
+			state->bo[0]->binding |= BO_BOUND_TEXTURE;
 		}
-	}
-	if (dirty) {
+
 		if (is_vertex)
 			block->status |= R600_BLOCK_STATUS_RESOURCE_VERTEX;
 		else
@@ -1281,7 +1283,6 @@ struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset)
 
 void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block)
 {
-	int id;
 	int optional = block->nbo == 0 && !(block->flags & REG_FLAG_DIRTY_ALWAYS);
 	int cp_dwords = block->pm4_ndwords, start_dword = 0;
 	int new_dwords = 0;
@@ -1297,14 +1298,13 @@ void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *
 		for (int j = 0; j < block->nreg; j++) {
 			if (block->pm4_bo_index[j]) {
 				/* find relocation */
-				id = block->pm4_bo_index[j];
-				r600_context_bo_reloc(ctx,
-						      &block->pm4[block->reloc[id].bo_pm4_index],
-						      block->reloc[id].bo);
+				struct r600_block_reloc *reloc = &block->reloc[block->pm4_bo_index[j]];
+				block->pm4[reloc->bo_pm4_index] =
+					r600_context_bo_reloc(ctx, reloc->bo, reloc->bo_usage);
 				r600_context_bo_flush(ctx,
-						      block->reloc[id].flush_flags,
-						      block->reloc[id].flush_mask,
-						      block->reloc[id].bo);
+						      reloc->flush_flags,
+						      reloc->flush_mask,
+						      reloc->bo);
 				nbo--;
 				if (nbo == 0)
 					break;
@@ -1338,7 +1338,6 @@ out:
 
 void r600_context_block_resource_emit_dirty(struct r600_context *ctx, struct r600_block *block)
 {
-	int id;
 	int cp_dwords = block->pm4_ndwords;
 	int nbo = block->nbo;
 
@@ -1352,14 +1351,13 @@ void r600_context_block_resource_emit_dirty(struct r600_context *ctx, struct r60
 	for (int j = 0; j < nbo; j++) {
 		if (block->pm4_bo_index[j]) {
 			/* find relocation */
-			id = block->pm4_bo_index[j];
-			r600_context_bo_reloc(ctx,
-					      &block->pm4[block->reloc[id].bo_pm4_index],
-					      block->reloc[id].bo);
+			struct r600_block_reloc *reloc = &block->reloc[block->pm4_bo_index[j]];
+			block->pm4[reloc->bo_pm4_index] =
+				r600_context_bo_reloc(ctx, reloc->bo, reloc->bo_usage);
 			r600_context_bo_flush(ctx,
-					      block->reloc[id].flush_flags,
-					      block->reloc[id].flush_mask,
-					      block->reloc[id].bo);
+					      reloc->flush_flags,
+					      reloc->flush_mask,
+					      reloc->bo);
 		}
 	}
 	ctx->flags &= ~R600_CONTEXT_CHECK_EVENT_FLUSH;
@@ -1418,10 +1416,6 @@ void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw)
 
 	if (draw->indices) {
 		ndwords = 11;
-		/* make sure there is enough relocation space before scheduling draw */
-		if (ctx->creloc >= (ctx->nreloc - 1)) {
-			r600_context_flush(ctx);
-		}
 	}
 
 	/* queries need some special values */
@@ -1440,11 +1434,11 @@ void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw)
 
 	/* update the max dword count to make sure we have enough space
 	 * reserved for flushing the destination caches */
-	ctx->pm4_ndwords = RADEON_CTX_MAX_PM4 - ctx->num_dest_buffers * 7 - 16;
+	ctx->pm4_ndwords = RADEON_MAX_CMDBUF_DWORDS - ctx->num_dest_buffers * 7 - 16;
 
 	if ((ctx->pm4_dirty_cdwords + ndwords + ctx->pm4_cdwords) > ctx->pm4_ndwords) {
 		/* need to flush */
-		r600_context_flush(ctx);
+		r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
 	}
 	/* at that point everythings is flushed and ctx->pm4_cdwords = 0 */
 	if ((ctx->pm4_dirty_cdwords + ndwords) > ctx->pm4_ndwords) {
@@ -1469,13 +1463,12 @@ void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw)
 	pm4[3] = draw->vgt_num_instances;
 	if (draw->indices) {
 		pm4[4] = PKT3(PKT3_DRAW_INDEX, 3, ctx->predicate_drawing);
-		pm4[5] = draw->indices_bo_offset + r600_bo_offset(draw->indices);
+		pm4[5] = draw->indices_bo_offset;
 		pm4[6] = 0;
 		pm4[7] = draw->vgt_num_indices;
 		pm4[8] = draw->vgt_draw_initiator;
 		pm4[9] = PKT3(PKT3_NOP, 0, ctx->predicate_drawing);
-		pm4[10] = 0;
-		r600_context_bo_reloc(ctx, &pm4[10], draw->indices);
+		pm4[10] = r600_context_bo_reloc(ctx, draw->indices, RADEON_USAGE_READ);
 	} else {
 		pm4[4] = PKT3(PKT3_DRAW_INDEX_AUTO, 1, ctx->predicate_drawing);
 		pm4[5] = draw->vgt_num_indices;
@@ -1489,13 +1482,8 @@ void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw)
 	ctx->pm4_dirty_cdwords = 0;
 }
 
-void r600_context_flush(struct r600_context *ctx)
+void r600_context_flush(struct r600_context *ctx, unsigned flags)
 {
-	struct drm_radeon_cs drmib = {};
-	struct drm_radeon_cs_chunk chunks[2];
-	uint64_t chunk_array[2];
-	unsigned fence;
-	int r;
 	struct r600_block *enable_block = NULL;
 
 	if (ctx->pm4_cdwords == ctx->init_dwords)
@@ -1512,54 +1500,19 @@ void r600_context_flush(struct r600_context *ctx)
 	/* partial flush is needed to avoid lockups on some chips with user fences */
 	ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE, 0, 0);
 	ctx->pm4[ctx->pm4_cdwords++] = EVENT_TYPE(EVENT_TYPE_PS_PARTIAL_FLUSH) | EVENT_INDEX(4);
-	/* emit fence */
-	ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE_EOP, 4, 0);
-	ctx->pm4[ctx->pm4_cdwords++] = EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT) | EVENT_INDEX(5);
-	ctx->pm4[ctx->pm4_cdwords++] = 0;
-	ctx->pm4[ctx->pm4_cdwords++] = (1 << 29) | (0 << 24);
-	ctx->pm4[ctx->pm4_cdwords++] = ctx->radeon->fence;
-	ctx->pm4[ctx->pm4_cdwords++] = 0;
-	ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0, 0);
-	ctx->pm4[ctx->pm4_cdwords++] = 0;
-	r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], ctx->radeon->fence_bo);
-
-#if 1
-	/* emit cs */
-	drmib.num_chunks = 2;
-	drmib.chunks = (uint64_t)(uintptr_t)chunk_array;
-	chunks[0].chunk_id = RADEON_CHUNK_ID_IB;
-	chunks[0].length_dw = ctx->pm4_cdwords;
-	chunks[0].chunk_data = (uint64_t)(uintptr_t)ctx->pm4;
-	chunks[1].chunk_id = RADEON_CHUNK_ID_RELOCS;
-	chunks[1].length_dw = ctx->creloc * sizeof(struct r600_reloc) / 4;
-	chunks[1].chunk_data = (uint64_t)(uintptr_t)ctx->reloc;
-	chunk_array[0] = (uint64_t)(uintptr_t)&chunks[0];
-	chunk_array[1] = (uint64_t)(uintptr_t)&chunks[1];
-	r = drmCommandWriteRead(ctx->radeon->fd, DRM_RADEON_CS, &drmib,
-				sizeof(struct drm_radeon_cs));
-	if (r) {
-		fprintf(stderr, "radeon: The kernel rejected CS, "
-			"see dmesg for more information.\n");
-	}
-#else
-	*ctx->radeon->cfence = ctx->radeon->fence;
-#endif
-
-	r600_context_update_fenced_list(ctx);
-
-	fence = ctx->radeon->fence + 1;
-	if (fence < ctx->radeon->fence) {
-		/* wrap around */
-		fence = 1;
-		r600_context_fence_wraparound(ctx, fence);
-	}
-	ctx->radeon->fence = fence;
+
+	/* Flush the CS. */
+	ctx->cs->cdw = ctx->pm4_cdwords;
+	ctx->radeon->ws->cs_flush(ctx->cs, flags);
+
+	/* We need to get the pointer to the other CS,
+	 * the command streams are double-buffered. */
+	ctx->pm4 = ctx->cs->buf;
 
 	/* restart */
 	for (int i = 0; i < ctx->creloc; i++) {
-		ctx->bo[i]->reloc = NULL;
 		ctx->bo[i]->last_flush = 0;
-		radeon_bo_reference(ctx->radeon, &ctx->bo[i], NULL);
+		r600_bo_reference(&ctx->bo[i], NULL);
 	}
 	ctx->creloc = 0;
 	ctx->pm4_dirty_cdwords = 0;
@@ -1596,10 +1549,9 @@ void r600_context_emit_fence(struct r600_context *ctx, struct r600_bo *fence_bo,
 {
 	unsigned ndwords = 10;
 
-	if (((ctx->pm4_dirty_cdwords + ndwords + ctx->pm4_cdwords) > ctx->pm4_ndwords) ||
-	    (ctx->creloc >= (ctx->nreloc - 1))) {
+	if ((ctx->pm4_dirty_cdwords + ndwords + ctx->pm4_cdwords) > ctx->pm4_ndwords) {
 		/* need to flush */
-		r600_context_flush(ctx);
+		r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
 	}
 
 	ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE, 0, 0);
@@ -1611,90 +1563,7 @@ void r600_context_emit_fence(struct r600_context *ctx, struct r600_bo *fence_bo,
 	ctx->pm4[ctx->pm4_cdwords++] = value;                   /* DATA_LO */
 	ctx->pm4[ctx->pm4_cdwords++] = 0;                       /* DATA_HI */
 	ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0, 0);
-	ctx->pm4[ctx->pm4_cdwords++] = 0;
-	r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], fence_bo);
-}
-
-void r600_context_dump_bof(struct r600_context *ctx, const char *file)
-{
-	bof_t *bcs, *blob, *array, *bo, *size, *handle, *device_id, *root;
-	unsigned i;
-
-	root = device_id = bcs = blob = array = bo = size = handle = NULL;
-	root = bof_object();
-	if (root == NULL)
-		goto out_err;
-	device_id = bof_int32(ctx->radeon->device);
-	if (device_id == NULL)
-		goto out_err;
-	if (bof_object_set(root, "device_id", device_id))
-		goto out_err;
-	bof_decref(device_id);
-	device_id = NULL;
-	/* dump relocs */
-	blob = bof_blob(ctx->creloc * 16, ctx->reloc);
-	if (blob == NULL)
-		goto out_err;
-	if (bof_object_set(root, "reloc", blob))
-		goto out_err;
-	bof_decref(blob);
-	blob = NULL;
-	/* dump cs */
-	blob = bof_blob(ctx->pm4_cdwords * 4, ctx->pm4);
-	if (blob == NULL)
-		goto out_err;
-	if (bof_object_set(root, "pm4", blob))
-		goto out_err;
-	bof_decref(blob);
-	blob = NULL;
-	/* dump bo */
-	array = bof_array();
-	if (array == NULL)
-		goto out_err;
-	for (i = 0; i < ctx->creloc; i++) {
-		struct radeon_bo *rbo = ctx->bo[i];
-		bo = bof_object();
-		if (bo == NULL)
-			goto out_err;
-		size = bof_int32(rbo->size);
-		if (size == NULL)
-			goto out_err;
-		if (bof_object_set(bo, "size", size))
-			goto out_err;
-		bof_decref(size);
-		size = NULL;
-		handle = bof_int32(rbo->handle);
-		if (handle == NULL)
-			goto out_err;
-		if (bof_object_set(bo, "handle", handle))
-			goto out_err;
-		bof_decref(handle);
-		handle = NULL;
-		radeon_bo_map(ctx->radeon, rbo);
-		blob = bof_blob(rbo->size, rbo->data);
-		radeon_bo_unmap(ctx->radeon, rbo);
-		if (blob == NULL)
-			goto out_err;
-		if (bof_object_set(bo, "data", blob))
-			goto out_err;
-		bof_decref(blob);
-		blob = NULL;
-		if (bof_array_append(array, bo))
-			goto out_err;
-		bof_decref(bo);
-		bo = NULL;
-	}
-	if (bof_object_set(root, "bo", array))
-		goto out_err;
-	bof_dump_file(root, file);
-out_err:
-	bof_decref(blob);
-	bof_decref(array);
-	bof_decref(bo);
-	bof_decref(size);
-	bof_decref(handle);
-	bof_decref(device_id);
-	bof_decref(root);
+	ctx->pm4[ctx->pm4_cdwords++] = r600_context_bo_reloc(ctx, fence_bo, RADEON_USAGE_WRITE);
 }
 
 static boolean r600_query_result(struct r600_context *ctx, struct r600_query *query, boolean wait)
@@ -1704,9 +1573,9 @@ static boolean r600_query_result(struct r600_context *ctx, struct r600_query *qu
 	u32 *results, *current_result;
 
 	if (wait)
-		results = r600_bo_map(ctx->radeon, query->buffer, PIPE_TRANSFER_READ, NULL);
+		results = r600_bo_map(ctx->radeon, query->buffer, ctx->cs, PIPE_TRANSFER_READ);
 	else
-		results = r600_bo_map(ctx->radeon, query->buffer, PIPE_TRANSFER_DONTBLOCK | PIPE_TRANSFER_READ, NULL);
+		results = r600_bo_map(ctx->radeon, query->buffer, ctx->cs, PIPE_TRANSFER_DONTBLOCK | PIPE_TRANSFER_READ);
 	if (!results)
 		return FALSE;
 
@@ -1735,7 +1604,6 @@ static boolean r600_query_result(struct r600_context *ctx, struct r600_query *qu
 void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
 {
 	unsigned required_space, new_results_end;
-	int num_backends = r600_get_num_backends(ctx->radeon);
 
 	/* query request needs 6/8 dwords for begin + 6/8 dwords for end */
 	if (query->type == PIPE_QUERY_TIME_ELAPSED)
@@ -1745,7 +1613,7 @@ void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
 
 	if ((required_space + ctx->pm4_cdwords) > ctx->pm4_ndwords) {
 		/* need to flush */
-		r600_context_flush(ctx);
+		r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
 	}
 
 	if (query->type == PIPE_QUERY_OCCLUSION_COUNTER) {
@@ -1756,7 +1624,7 @@ void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
 			query->queries_emitted = 1;
 		} else {
 			if (++query->queries_emitted > query->buffer_size / query->result_size / 2)
-				r600_context_flush(ctx);
+				r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
 		}
 	}
 
@@ -1767,7 +1635,7 @@ void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
 	/* collect current results if query buffer is full */
 	if (new_results_end == query->results_start) {
 		if (!(query->state & R600_QUERY_STATE_FLUSHED))
-			r600_context_flush(ctx);
+			r600_context_flush(ctx, 0);
 		r600_query_result(ctx, query, TRUE);
 	}
 
@@ -1775,15 +1643,17 @@ void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
 		u32 *results;
 		int i;
 
-		results = r600_bo_map(ctx->radeon, query->buffer, PIPE_TRANSFER_WRITE, NULL);
+		results = r600_bo_map(ctx->radeon, query->buffer, ctx->cs, PIPE_TRANSFER_WRITE);
 		if (results) {
 			results = (u32*)((char*)results + query->results_end);
 			memset(results, 0, query->result_size);
 
 			/* Set top bits for unused backends */
-			for (i = num_backends; i < ctx->max_db; i++) {
-				results[(i * 4)+1] = 0x80000000;
-				results[(i * 4)+3] = 0x80000000;
+			for (i = 0; i < ctx->max_db; i++) {
+				if (!(ctx->backend_mask & (1<<i))) {
+					results[(i * 4)+1] = 0x80000000;
+					results[(i * 4)+3] = 0x80000000;
+				}
 			}
 			r600_bo_unmap(ctx->radeon, query->buffer);
 		}
@@ -1793,19 +1663,18 @@ void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
 	if (query->type == PIPE_QUERY_TIME_ELAPSED) {
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE_EOP, 4, 0);
 		ctx->pm4[ctx->pm4_cdwords++] = EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT) | EVENT_INDEX(5);
-		ctx->pm4[ctx->pm4_cdwords++] = query->results_end + r600_bo_offset(query->buffer);
+		ctx->pm4[ctx->pm4_cdwords++] = query->results_end;
 		ctx->pm4[ctx->pm4_cdwords++] = (3 << 29);
 		ctx->pm4[ctx->pm4_cdwords++] = 0;
 		ctx->pm4[ctx->pm4_cdwords++] = 0;
 	} else {
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE, 2, 0);
 		ctx->pm4[ctx->pm4_cdwords++] = EVENT_TYPE(EVENT_TYPE_ZPASS_DONE) | EVENT_INDEX(1);
-		ctx->pm4[ctx->pm4_cdwords++] = query->results_end + r600_bo_offset(query->buffer);
+		ctx->pm4[ctx->pm4_cdwords++] = query->results_end;
 		ctx->pm4[ctx->pm4_cdwords++] = 0;
 	}
 	ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0, 0);
-	ctx->pm4[ctx->pm4_cdwords++] = 0;
-	r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], query->buffer);
+	ctx->pm4[ctx->pm4_cdwords++] = r600_context_bo_reloc(ctx, query->buffer, RADEON_USAGE_WRITE);
 
 	query->state |= R600_QUERY_STATE_STARTED;
 	query->state ^= R600_QUERY_STATE_ENDED;
@@ -1818,19 +1687,18 @@ void r600_query_end(struct r600_context *ctx, struct r600_query *query)
 	if (query->type == PIPE_QUERY_TIME_ELAPSED) {
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE_EOP, 4, 0);
 		ctx->pm4[ctx->pm4_cdwords++] = EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT) | EVENT_INDEX(5);
-		ctx->pm4[ctx->pm4_cdwords++] = query->results_end + 8 + r600_bo_offset(query->buffer);
+		ctx->pm4[ctx->pm4_cdwords++] = query->results_end + 8;
 		ctx->pm4[ctx->pm4_cdwords++] = (3 << 29);
 		ctx->pm4[ctx->pm4_cdwords++] = 0;
 		ctx->pm4[ctx->pm4_cdwords++] = 0;
 	} else {
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE, 2, 0);
 		ctx->pm4[ctx->pm4_cdwords++] = EVENT_TYPE(EVENT_TYPE_ZPASS_DONE) | EVENT_INDEX(1);
-		ctx->pm4[ctx->pm4_cdwords++] = query->results_end + 8 + r600_bo_offset(query->buffer);
+		ctx->pm4[ctx->pm4_cdwords++] = query->results_end + 8;
 		ctx->pm4[ctx->pm4_cdwords++] = 0;
 	}
 	ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0, 0);
-	ctx->pm4[ctx->pm4_cdwords++] = 0;
-	r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], query->buffer);
+	ctx->pm4[ctx->pm4_cdwords++] = r600_context_bo_reloc(ctx, query->buffer, RADEON_USAGE_WRITE);
 
 	query->results_end += query->result_size;
 	if (query->results_end >= query->buffer_size)
@@ -1848,7 +1716,7 @@ void r600_query_predication(struct r600_context *ctx, struct r600_query *query,
 {
 	if (operation == PREDICATION_OP_CLEAR) {
 		if (ctx->pm4_cdwords + 3 > ctx->pm4_ndwords)
-			r600_context_flush(ctx);
+			r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
 
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_SET_PREDICATION, 1, 0);
 		ctx->pm4[ctx->pm4_cdwords++] = 0;
@@ -1864,7 +1732,7 @@ void r600_query_predication(struct r600_context *ctx, struct r600_query *query,
 		count /= query->result_size;
 
 		if (ctx->pm4_cdwords + 5 * count > ctx->pm4_ndwords)
-			r600_context_flush(ctx);
+			r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
 
 		op = PRED_OP(operation) | PREDICATION_DRAW_VISIBLE |
 				(flag_wait ? PREDICATION_HINT_WAIT : PREDICATION_HINT_NOWAIT_DRAW);
@@ -1872,11 +1740,11 @@ void r600_query_predication(struct r600_context *ctx, struct r600_query *query,
 		/* emit predicate packets for all data blocks */
 		while (results_base != query->results_end) {
 			ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_SET_PREDICATION, 1, 0);
-			ctx->pm4[ctx->pm4_cdwords++] = results_base + r600_bo_offset(query->buffer);
+			ctx->pm4[ctx->pm4_cdwords++] = results_base;
 			ctx->pm4[ctx->pm4_cdwords++] = op;
 			ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0, 0);
-			ctx->pm4[ctx->pm4_cdwords++] = 0;
-			r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], query->buffer);
+			ctx->pm4[ctx->pm4_cdwords++] = r600_context_bo_reloc(ctx, query->buffer,
+									     RADEON_USAGE_READ);
 			results_base += query->result_size;
 			if (results_base >= query->buffer_size)
 				results_base = 0;
@@ -1926,7 +1794,7 @@ struct r600_query *r600_context_query_create(struct r600_context *ctx, unsigned
 
 void r600_context_query_destroy(struct r600_context *ctx, struct r600_query *query)
 {
-	r600_bo_reference(ctx->radeon, &query->buffer, NULL);
+	r600_bo_reference(&query->buffer, NULL);
 	LIST_DELINIT(&query->list);
 	free(query);
 }
@@ -1938,7 +1806,7 @@ boolean r600_context_query_result(struct r600_context *ctx,
 	uint64_t *result = (uint64_t*)vresult;
 
 	if (!(query->state & R600_QUERY_STATE_FLUSHED)) {
-		r600_context_flush(ctx);
+		r600_context_flush(ctx, 0);
 	}
 	if (!r600_query_result(ctx, query, wait))
 		return FALSE;
diff --git a/src/gallium/winsys/r600/drm/r600_priv.h b/src/gallium/winsys/r600/drm/r600_priv.h
index 69f7251c043..1e901897efd 100644
--- a/src/gallium/winsys/r600/drm/r600_priv.h
+++ b/src/gallium/winsys/r600/drm/r600_priv.h
@@ -26,40 +26,20 @@
 #ifndef R600_PRIV_H
 #define R600_PRIV_H
 
-#include <errno.h>
-#include <stdint.h>
-#include <stdlib.h>
-#include <assert.h>
-#include <util/u_double_list.h>
-#include <util/u_inlines.h>
-#include "util/u_hash_table.h"
-#include <os/os_thread.h>
 #include "r600.h"
+#include "../../radeon/drm/radeon_winsys.h"
+#include "util/u_hash_table.h"
+#include "os/os_thread.h"
 
 #define PKT_COUNT_C                     0xC000FFFF
 #define PKT_COUNT_S(x)                  (((x) & 0x3FFF) << 16)
 
-struct r600_bomgr;
-struct r600_bo;
-
 struct radeon {
-	int				fd;
-	int				refcount;
-	unsigned			device;
+	struct radeon_winsys		*ws;
+	struct radeon_info		info;
 	unsigned			family;
 	enum chip_class			chip_class;
 	struct r600_tiling_info		tiling_info;
-	struct r600_bomgr		*bomgr;
-	unsigned			fence;
-	unsigned			*cfence;
-	struct r600_bo			*fence_bo;
-	unsigned			clock_crystal_freq;
-	unsigned			num_backends;
-	unsigned                        minor_version;
-
-        /* List of buffer handles and its mutex. */
-	struct util_hash_table          *bo_handles;
-	pipe_mutex bo_handles_mutex;
 };
 
 /* these flags are used in register flags and added into block flags */
@@ -79,85 +59,25 @@ struct r600_reg {
 };
 
 #define BO_BOUND_TEXTURE 1
-struct radeon_bo {
-	struct pipe_reference		reference;
-	unsigned			handle;
-	unsigned			size;
-	unsigned			alignment;
-	int				map_count;
-	void				*data;
-	struct list_head		fencedlist;
-	unsigned			fence;
-	struct r600_context		*ctx;
-	boolean				shared;
-	struct r600_reloc		*reloc;
-	unsigned			reloc_id;
-	unsigned			last_flush;
-	unsigned                        name;
-	unsigned                        binding;
-};
 
 struct r600_bo {
 	struct pipe_reference		reference; /* this must be the first member for the r600_bo_reference inline to work */
 	/* DO NOT MOVE THIS ^ */
-	unsigned			size;
-	unsigned			tiling_flags;
-	unsigned			kernel_pitch;
+	struct pb_buffer		*buf;
+	struct radeon_winsys_cs_handle	*cs_buf;
 	unsigned			domains;
-	struct radeon_bo		*bo;
-	unsigned			fence;
-	/* manager data */
-	struct list_head		list;
-	unsigned			manager_id;
-	unsigned			alignment;
-	unsigned			offset;
-	int64_t				start;
-	int64_t				end;
-};
-
-struct r600_bomgr {
-	struct radeon			*radeon;
-	unsigned			usecs;
-	pipe_mutex			mutex;
-	struct list_head		delayed;
-	unsigned			num_delayed;
+	unsigned			last_flush;
+	unsigned                        binding;
 };
 
 /*
- * r600_drm.c
- */
-struct radeon *r600_new(int fd, unsigned device);
-void r600_delete(struct radeon *r600);
-
-/*
  * radeon_pciid.c
  */
 unsigned radeon_family_from_device(unsigned device);
 
 /*
- * radeon_bo.c
- */
-struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle,
-			    unsigned size, unsigned alignment, unsigned initial_domain);
-void radeon_bo_reference(struct radeon *radeon, struct radeon_bo **dst,
-			 struct radeon_bo *src);
-int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo);
-int radeon_bo_busy(struct radeon *radeon, struct radeon_bo *bo, uint32_t *domain);
-int radeon_bo_fencelist(struct radeon *radeon, struct radeon_bo **bolist, uint32_t num_bo);
-int radeon_bo_get_tiling_flags(struct radeon *radeon,
-			       struct radeon_bo *bo,
-			       uint32_t *tiling_flags,
-			       uint32_t *pitch);
-int radeon_bo_get_name(struct radeon *radeon,
-		       struct radeon_bo *bo,
-		       uint32_t *name);
-int radeon_bo_fixed_map(struct radeon *radeon, struct radeon_bo *bo);
-
-/*
  * r600_hw_context.c
  */
-int r600_context_init_fence(struct r600_context *ctx);
-void r600_context_get_reloc(struct r600_context *ctx, struct r600_bo *rbo);
 void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags,
 				unsigned flush_mask, struct r600_bo *rbo);
 struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset);
@@ -175,70 +95,23 @@ void r600_context_reg(struct r600_context *ctx,
 void r600_init_cs(struct r600_context *ctx);
 int r600_resource_init(struct r600_context *ctx, struct r600_range *range, unsigned offset, unsigned nblocks, unsigned stride, struct r600_reg *reg, int nreg, unsigned offset_base);
 
-static INLINE void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct r600_bo *rbo)
+static INLINE unsigned r600_context_bo_reloc(struct r600_context *ctx, struct r600_bo *rbo,
+					     enum radeon_bo_usage usage)
 {
-	struct radeon_bo *bo = rbo->bo;
+	enum radeon_bo_domain rd = usage & RADEON_USAGE_READ ? rbo->domains : 0;
+	enum radeon_bo_domain wd = usage & RADEON_USAGE_WRITE ? rbo->domains : 0;
 
-	assert(bo != NULL);
+	assert(usage);
 
-	if (!bo->reloc)
-		r600_context_get_reloc(ctx, rbo);
+	unsigned reloc_index =
+		ctx->radeon->ws->cs_add_reloc(ctx->cs, rbo->cs_buf,
+					      rd, wd);
 
-	/* set PKT3 to point to proper reloc */
-	*pm4 = bo->reloc_id;
-}
+	if (reloc_index >= ctx->creloc)
+		ctx->creloc = reloc_index+1;
 
-/*
- * r600_bo.c
- */
-void r600_bo_destroy(struct radeon *radeon, struct r600_bo *bo);
-
-/*
- * r600_bomgr.c
- */
-struct r600_bomgr *r600_bomgr_create(struct radeon *radeon, unsigned usecs);
-void r600_bomgr_destroy(struct r600_bomgr *mgr);
-boolean r600_bomgr_bo_destroy(struct r600_bomgr *mgr, struct r600_bo *bo);
-void r600_bomgr_bo_init(struct r600_bomgr *mgr, struct r600_bo *bo);
-struct r600_bo *r600_bomgr_bo_create(struct r600_bomgr *mgr,
-					unsigned size,
-					unsigned alignment,
-					unsigned cfence);
-
-
-/*
- * helpers
- */
-
-
-/*
- * radeon_bo.c
- */
-static inline int radeon_bo_map(struct radeon *radeon, struct radeon_bo *bo)
-{
-	if (bo->map_count == 0 && !bo->data)
-		return radeon_bo_fixed_map(radeon, bo);
-	bo->map_count++;
-	return 0;
-}
-
-static inline void radeon_bo_unmap(struct radeon *radeon, struct radeon_bo *bo)
-{
-	bo->map_count--;
-	assert(bo->map_count >= 0);
-}
-
-/*
- * fence
- */
-static inline boolean fence_is_after(unsigned fence, unsigned ofence)
-{
-	/* handle wrap around */
-	if (fence < 0x80000000 && ofence > 0x80000000)
-		return TRUE;
-	if (fence > ofence)
-		return TRUE;
-	return FALSE;
+	r600_bo_reference(&ctx->bo[reloc_index], rbo);
+	return reloc_index * 4;
 }
 
 #endif
diff --git a/src/gallium/winsys/r600/drm/r600d.h b/src/gallium/winsys/r600/drm/r600d.h
deleted file mode 100644
index 4a19dcf8ddf..00000000000
--- a/src/gallium/winsys/r600/drm/r600d.h
+++ /dev/null
@@ -1,2241 +0,0 @@
-/*
- * Copyright 2010 Jerome Glisse <[email protected]>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *      Jerome Glisse
- */
-#ifndef R600D_H
-#define R600D_H
-
-/* evergreen values */
-#define EG_RESOURCE_OFFSET                 0x00030000
-#define EG_RESOURCE_END                    0x00034000
-#define EG_LOOP_CONST_OFFSET               0x0003A200
-#define EG_LOOP_CONST_END                  0x0003A26C
-#define EG_BOOL_CONST_OFFSET               0x0003A500
-#define EG_BOOL_CONST_END                  0x0003A506
-
-
-#define R600_CONFIG_REG_OFFSET                 0X00008000
-#define R600_CONFIG_REG_END                    0X0000AC00
-#define R600_CONTEXT_REG_OFFSET                0X00028000
-#define R600_CONTEXT_REG_END                   0X00029000
-#define R600_ALU_CONST_OFFSET                  0X00030000
-#define R600_ALU_CONST_END                     0X00032000
-#define R600_RESOURCE_OFFSET                   0X00038000
-#define R600_RESOURCE_END                      0X0003C000
-#define R600_SAMPLER_OFFSET                    0X0003C000
-#define R600_SAMPLER_END                       0X0003CFF0
-#define R600_CTL_CONST_OFFSET                  0X0003CFF0
-#define R600_CTL_CONST_END                     0X0003E200
-#define R600_LOOP_CONST_OFFSET                 0X0003E200
-#define R600_LOOP_CONST_END                    0X0003E380
-#define R600_BOOL_CONST_OFFSET                 0X0003E380
-#define R600_BOOL_CONST_END                    0X00040000
-
-#define PKT3_NOP                               0x10
-#define PKT3_INDIRECT_BUFFER_END               0x17
-#define PKT3_SET_PREDICATION                   0x20
-#define PKT3_REG_RMW                           0x21
-#define PKT3_COND_EXEC                         0x22
-#define PKT3_PRED_EXEC                         0x23
-#define PKT3_START_3D_CMDBUF                   0x24
-#define PKT3_DRAW_INDEX_2                      0x27
-#define PKT3_CONTEXT_CONTROL                   0x28
-#define PKT3_DRAW_INDEX_IMMD_BE                0x29
-#define PKT3_INDEX_TYPE                        0x2A
-#define PKT3_DRAW_INDEX                        0x2B
-#define PKT3_DRAW_INDEX_AUTO                   0x2D
-#define PKT3_DRAW_INDEX_IMMD                   0x2E
-#define PKT3_NUM_INSTANCES                     0x2F
-#define PKT3_STRMOUT_BUFFER_UPDATE             0x34
-#define PKT3_INDIRECT_BUFFER_MP                0x38
-#define PKT3_MEM_SEMAPHORE                     0x39
-#define PKT3_MPEG_INDEX                        0x3A
-#define PKT3_WAIT_REG_MEM                      0x3C
-#define PKT3_MEM_WRITE                         0x3D
-#define PKT3_INDIRECT_BUFFER                   0x32
-#define PKT3_CP_INTERRUPT                      0x40
-#define PKT3_SURFACE_SYNC                      0x43
-#define PKT3_ME_INITIALIZE                     0x44
-#define PKT3_COND_WRITE                        0x45
-#define PKT3_EVENT_WRITE                       0x46
-#define PKT3_EVENT_WRITE_EOP                   0x47
-#define PKT3_ONE_REG_WRITE                     0x57
-#define PKT3_SET_CONFIG_REG                    0x68
-#define PKT3_SET_CONTEXT_REG                   0x69
-#define PKT3_SET_ALU_CONST                     0x6A
-#define PKT3_SET_BOOL_CONST                    0x6B
-#define PKT3_SET_LOOP_CONST                    0x6C
-#define PKT3_SET_RESOURCE                      0x6D
-#define PKT3_SET_SAMPLER                       0x6E
-#define PKT3_SET_CTL_CONST                     0x6F
-#define PKT3_SURFACE_BASE_UPDATE               0x73
-#define		SURFACE_BASE_UPDATE_DEPTH      (1 << 0)
-#define		SURFACE_BASE_UPDATE_COLOR(x)   (2 << (x))
-#define		SURFACE_BASE_UPDATE_STRMOUT(x) (0x200 << (x))
-
-#define EVENT_TYPE_PS_PARTIAL_FLUSH            0x10
-#define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14
-#define EVENT_TYPE_ZPASS_DONE                  0x15
-#define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT   0x16
-#define		EVENT_TYPE(x)                           ((x) << 0)
-#define		EVENT_INDEX(x)                          ((x) << 8)
-                /* 0 - any non-TS event
-		 * 1 - ZPASS_DONE
-		 * 2 - SAMPLE_PIPELINESTAT
-		 * 3 - SAMPLE_STREAMOUTSTAT*
-		 * 4 - *S_PARTIAL_FLUSH
-		 * 5 - TS events
-		 */
-
-#define PREDICATION_OP_CLEAR 0x0
-#define PREDICATION_OP_ZPASS 0x1
-#define PREDICATION_OP_PRIMCOUNT 0x2
-
-#define PRED_OP(x) ((x) << 16)
-
-#define PREDICATION_CONTINUE (1 << 31)
-
-#define PREDICATION_HINT_WAIT (0 << 12)
-#define PREDICATION_HINT_NOWAIT_DRAW (1 << 12)
-
-#define PREDICATION_DRAW_NOT_VISIBLE (0 << 8)
-#define PREDICATION_DRAW_VISIBLE (1 << 8)
-
-#define PKT_TYPE_S(x)                   (((x) & 0x3) << 30)
-#define PKT_TYPE_G(x)                   (((x) >> 30) & 0x3)
-#define PKT_TYPE_C                      0x3FFFFFFF
-#define PKT_COUNT_S(x)                  (((x) & 0x3FFF) << 16)
-#define PKT_COUNT_G(x)                  (((x) >> 16) & 0x3FFF)
-#define PKT_COUNT_C                     0xC000FFFF
-#define PKT0_BASE_INDEX_S(x)            (((x) & 0xFFFF) << 0)
-#define PKT0_BASE_INDEX_G(x)            (((x) >> 0) & 0xFFFF)
-#define PKT0_BASE_INDEX_C               0xFFFF0000
-#define PKT3_IT_OPCODE_S(x)             (((x) & 0xFF) << 8)
-#define PKT3_IT_OPCODE_G(x)             (((x) >> 8) & 0xFF)
-#define PKT3_IT_OPCODE_C                0xFFFF00FF
-#define PKT3_PRED_S(x)               (((x) >> 0) & 0x1)
-#define PKT0(index, count) (PKT_TYPE_S(0) | PKT0_BASE_INDEX_S(index) | PKT_COUNT_S(count))
-#define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT3_IT_OPCODE_S(op) | PKT_COUNT_S(count) | PKT3_PRED_S(predicate))
-
-/* Registers */
-#define R_0280A0_CB_COLOR0_INFO                      0x0280A0
-#define   S_0280A0_ENDIAN(x)                           (((x) & 0x3) << 0)
-#define   G_0280A0_ENDIAN(x)                           (((x) >> 0) & 0x3)
-#define   C_0280A0_ENDIAN                              0xFFFFFFFC
-#define   S_0280A0_FORMAT(x)                           (((x) & 0x3F) << 2)
-#define   G_0280A0_FORMAT(x)                           (((x) >> 2) & 0x3F)
-#define   C_0280A0_FORMAT                              0xFFFFFF03
-#define     V_0280A0_COLOR_INVALID                     0x00000000
-#define     V_0280A0_COLOR_8                           0x00000001
-#define     V_0280A0_COLOR_4_4                         0x00000002
-#define     V_0280A0_COLOR_3_3_2                       0x00000003
-#define     V_0280A0_COLOR_16                          0x00000005
-#define     V_0280A0_COLOR_16_FLOAT                    0x00000006
-#define     V_0280A0_COLOR_8_8                         0x00000007
-#define     V_0280A0_COLOR_5_6_5                       0x00000008
-#define     V_0280A0_COLOR_6_5_5                       0x00000009
-#define     V_0280A0_COLOR_1_5_5_5                     0x0000000A
-#define     V_0280A0_COLOR_4_4_4_4                     0x0000000B
-#define     V_0280A0_COLOR_5_5_5_1                     0x0000000C
-#define     V_0280A0_COLOR_32                          0x0000000D
-#define     V_0280A0_COLOR_32_FLOAT                    0x0000000E
-#define     V_0280A0_COLOR_16_16                       0x0000000F
-#define     V_0280A0_COLOR_16_16_FLOAT                 0x00000010
-#define     V_0280A0_COLOR_8_24                        0x00000011
-#define     V_0280A0_COLOR_8_24_FLOAT                  0x00000012
-#define     V_0280A0_COLOR_24_8                        0x00000013
-#define     V_0280A0_COLOR_24_8_FLOAT                  0x00000014
-#define     V_0280A0_COLOR_10_11_11                    0x00000015
-#define     V_0280A0_COLOR_10_11_11_FLOAT              0x00000016
-#define     V_0280A0_COLOR_11_11_10                    0x00000017
-#define     V_0280A0_COLOR_11_11_10_FLOAT              0x00000018
-#define     V_0280A0_COLOR_2_10_10_10                  0x00000019
-#define     V_0280A0_COLOR_8_8_8_8                     0x0000001A
-#define     V_0280A0_COLOR_10_10_10_2                  0x0000001B
-#define     V_0280A0_COLOR_X24_8_32_FLOAT              0x0000001C
-#define     V_0280A0_COLOR_32_32                       0x0000001D
-#define     V_0280A0_COLOR_32_32_FLOAT                 0x0000001E
-#define     V_0280A0_COLOR_16_16_16_16                 0x0000001F
-#define     V_0280A0_COLOR_16_16_16_16_FLOAT           0x00000020
-#define     V_0280A0_COLOR_32_32_32_32                 0x00000022
-#define     V_0280A0_COLOR_32_32_32_32_FLOAT           0x00000023
-#define   S_0280A0_ARRAY_MODE(x)                       (((x) & 0xF) << 8)
-#define   G_0280A0_ARRAY_MODE(x)                       (((x) >> 8) & 0xF)
-#define   C_0280A0_ARRAY_MODE                          0xFFFFF0FF
-#define     V_0280A0_ARRAY_LINEAR_GENERAL              0x00000000
-#define     V_0280A0_ARRAY_LINEAR_ALIGNED              0x00000001
-#define     V_0280A0_ARRAY_1D_TILED_THIN1              0x00000002
-#define     V_0280A0_ARRAY_2D_TILED_THIN1              0x00000004
-#define   S_0280A0_NUMBER_TYPE(x)                      (((x) & 0x7) << 12)
-#define   G_0280A0_NUMBER_TYPE(x)                      (((x) >> 12) & 0x7)
-#define   C_0280A0_NUMBER_TYPE                         0xFFFF8FFF
-#define   S_0280A0_READ_SIZE(x)                        (((x) & 0x1) << 15)
-#define   G_0280A0_READ_SIZE(x)                        (((x) >> 15) & 0x1)
-#define   C_0280A0_READ_SIZE                           0xFFFF7FFF
-#define   S_0280A0_COMP_SWAP(x)                        (((x) & 0x3) << 16)
-#define   G_0280A0_COMP_SWAP(x)                        (((x) >> 16) & 0x3)
-#define   C_0280A0_COMP_SWAP                           0xFFFCFFFF
-#define   S_0280A0_TILE_MODE(x)                        (((x) & 0x3) << 18)
-#define   G_0280A0_TILE_MODE(x)                        (((x) >> 18) & 0x3)
-#define   C_0280A0_TILE_MODE                           0xFFF3FFFF
-#define   S_0280A0_BLEND_CLAMP(x)                      (((x) & 0x1) << 20)
-#define   G_0280A0_BLEND_CLAMP(x)                      (((x) >> 20) & 0x1)
-#define   C_0280A0_BLEND_CLAMP                         0xFFEFFFFF
-#define   S_0280A0_CLEAR_COLOR(x)                      (((x) & 0x1) << 21)
-#define   G_0280A0_CLEAR_COLOR(x)                      (((x) >> 21) & 0x1)
-#define   C_0280A0_CLEAR_COLOR                         0xFFDFFFFF
-#define   S_0280A0_BLEND_BYPASS(x)                     (((x) & 0x1) << 22)
-#define   G_0280A0_BLEND_BYPASS(x)                     (((x) >> 22) & 0x1)
-#define   C_0280A0_BLEND_BYPASS                        0xFFBFFFFF
-#define   S_0280A0_BLEND_FLOAT32(x)                    (((x) & 0x1) << 23)
-#define   G_0280A0_BLEND_FLOAT32(x)                    (((x) >> 23) & 0x1)
-#define   C_0280A0_BLEND_FLOAT32                       0xFF7FFFFF
-#define   S_0280A0_SIMPLE_FLOAT(x)                     (((x) & 0x1) << 24)
-#define   G_0280A0_SIMPLE_FLOAT(x)                     (((x) >> 24) & 0x1)
-#define   C_0280A0_SIMPLE_FLOAT                        0xFEFFFFFF
-#define   S_0280A0_ROUND_MODE(x)                       (((x) & 0x1) << 25)
-#define   G_0280A0_ROUND_MODE(x)                       (((x) >> 25) & 0x1)
-#define   C_0280A0_ROUND_MODE                          0xFDFFFFFF
-#define   S_0280A0_TILE_COMPACT(x)                     (((x) & 0x1) << 26)
-#define   G_0280A0_TILE_COMPACT(x)                     (((x) >> 26) & 0x1)
-#define   C_0280A0_TILE_COMPACT                        0xFBFFFFFF
-#define   S_0280A0_SOURCE_FORMAT(x)                    (((x) & 0x1) << 27)
-#define   G_0280A0_SOURCE_FORMAT(x)                    (((x) >> 27) & 0x1)
-#define   C_0280A0_SOURCE_FORMAT                       0xF7FFFFFF
-#define R_028060_CB_COLOR0_SIZE                      0x028060
-#define   S_028060_PITCH_TILE_MAX(x)                   (((x) & 0x3FF) << 0)
-#define   G_028060_PITCH_TILE_MAX(x)                   (((x) >> 0) & 0x3FF)
-#define   C_028060_PITCH_TILE_MAX                      0xFFFFFC00
-#define   S_028060_SLICE_TILE_MAX(x)                   (((x) & 0xFFFFF) << 10)
-#define   G_028060_SLICE_TILE_MAX(x)                   (((x) >> 10) & 0xFFFFF)
-#define   C_028060_SLICE_TILE_MAX                      0xC00003FF
-#define R_028800_DB_DEPTH_CONTROL                    0x028800
-#define   S_028800_STENCIL_ENABLE(x)                   (((x) & 0x1) << 0)
-#define   G_028800_STENCIL_ENABLE(x)                   (((x) >> 0) & 0x1)
-#define   C_028800_STENCIL_ENABLE                      0xFFFFFFFE
-#define   S_028800_Z_ENABLE(x)                         (((x) & 0x1) << 1)
-#define   G_028800_Z_ENABLE(x)                         (((x) >> 1) & 0x1)
-#define   C_028800_Z_ENABLE                            0xFFFFFFFD
-#define   S_028800_Z_WRITE_ENABLE(x)                   (((x) & 0x1) << 2)
-#define   G_028800_Z_WRITE_ENABLE(x)                   (((x) >> 2) & 0x1)
-#define   C_028800_Z_WRITE_ENABLE                      0xFFFFFFFB
-#define   S_028800_ZFUNC(x)                            (((x) & 0x7) << 4)
-#define   G_028800_ZFUNC(x)                            (((x) >> 4) & 0x7)
-#define   C_028800_ZFUNC                               0xFFFFFF8F
-#define   S_028800_BACKFACE_ENABLE(x)                  (((x) & 0x1) << 7)
-#define   G_028800_BACKFACE_ENABLE(x)                  (((x) >> 7) & 0x1)
-#define   C_028800_BACKFACE_ENABLE                     0xFFFFFF7F
-#define   S_028800_STENCILFUNC(x)                      (((x) & 0x7) << 8)
-#define   G_028800_STENCILFUNC(x)                      (((x) >> 8) & 0x7)
-#define   C_028800_STENCILFUNC                         0xFFFFF8FF
-#define   S_028800_STENCILFAIL(x)                      (((x) & 0x7) << 11)
-#define   G_028800_STENCILFAIL(x)                      (((x) >> 11) & 0x7)
-#define   C_028800_STENCILFAIL                         0xFFFFC7FF
-#define   S_028800_STENCILZPASS(x)                     (((x) & 0x7) << 14)
-#define   G_028800_STENCILZPASS(x)                     (((x) >> 14) & 0x7)
-#define   C_028800_STENCILZPASS                        0xFFFE3FFF
-#define   S_028800_STENCILZFAIL(x)                     (((x) & 0x7) << 17)
-#define   G_028800_STENCILZFAIL(x)                     (((x) >> 17) & 0x7)
-#define   C_028800_STENCILZFAIL                        0xFFF1FFFF
-#define   S_028800_STENCILFUNC_BF(x)                   (((x) & 0x7) << 20)
-#define   G_028800_STENCILFUNC_BF(x)                   (((x) >> 20) & 0x7)
-#define   C_028800_STENCILFUNC_BF                      0xFF8FFFFF
-#define   S_028800_STENCILFAIL_BF(x)                   (((x) & 0x7) << 23)
-#define   G_028800_STENCILFAIL_BF(x)                   (((x) >> 23) & 0x7)
-#define   C_028800_STENCILFAIL_BF                      0xFC7FFFFF
-#define   S_028800_STENCILZPASS_BF(x)                  (((x) & 0x7) << 26)
-#define   G_028800_STENCILZPASS_BF(x)                  (((x) >> 26) & 0x7)
-#define   C_028800_STENCILZPASS_BF                     0xE3FFFFFF
-#define   S_028800_STENCILZFAIL_BF(x)                  (((x) & 0x7) << 29)
-#define   G_028800_STENCILZFAIL_BF(x)                  (((x) >> 29) & 0x7)
-#define   C_028800_STENCILZFAIL_BF                     0x1FFFFFFF
-#define R_028010_DB_DEPTH_INFO                       0x028010
-#define   S_028010_FORMAT(x)                           (((x) & 0x7) << 0)
-#define   G_028010_FORMAT(x)                           (((x) >> 0) & 0x7)
-#define   C_028010_FORMAT                              0xFFFFFFF8
-#define     V_028010_DEPTH_INVALID                     0x00000000
-#define     V_028010_DEPTH_16                          0x00000001
-#define     V_028010_DEPTH_X8_24                       0x00000002
-#define     V_028010_DEPTH_8_24                        0x00000003
-#define     V_028010_DEPTH_X8_24_FLOAT                 0x00000004
-#define     V_028010_DEPTH_8_24_FLOAT                  0x00000005
-#define     V_028010_DEPTH_32_FLOAT                    0x00000006
-#define     V_028010_DEPTH_X24_8_32_FLOAT              0x00000007
-#define   S_028010_READ_SIZE(x)                        (((x) & 0x1) << 3)
-#define   G_028010_READ_SIZE(x)                        (((x) >> 3) & 0x1)
-#define   C_028010_READ_SIZE                           0xFFFFFFF7
-#define   S_028010_ARRAY_MODE(x)                       (((x) & 0xF) << 15)
-#define   G_028010_ARRAY_MODE(x)                       (((x) >> 15) & 0xF)
-#define   C_028010_ARRAY_MODE                          0xFFF87FFF
-#define   S_028010_TILE_SURFACE_ENABLE(x)              (((x) & 0x1) << 25)
-#define   G_028010_TILE_SURFACE_ENABLE(x)              (((x) >> 25) & 0x1)
-#define   C_028010_TILE_SURFACE_ENABLE                 0xFDFFFFFF
-#define   S_028010_TILE_COMPACT(x)                     (((x) & 0x1) << 26)
-#define   G_028010_TILE_COMPACT(x)                     (((x) >> 26) & 0x1)
-#define   C_028010_TILE_COMPACT                        0xFBFFFFFF
-#define   S_028010_ZRANGE_PRECISION(x)                 (((x) & 0x1) << 31)
-#define   G_028010_ZRANGE_PRECISION(x)                 (((x) >> 31) & 0x1)
-#define   C_028010_ZRANGE_PRECISION                    0x7FFFFFFF
-#define R_028000_DB_DEPTH_SIZE                       0x028000
-#define   S_028000_PITCH_TILE_MAX(x)                   (((x) & 0x3FF) << 0)
-#define   G_028000_PITCH_TILE_MAX(x)                   (((x) >> 0) & 0x3FF)
-#define   C_028000_PITCH_TILE_MAX                      0xFFFFFC00
-#define   S_028000_SLICE_TILE_MAX(x)                   (((x) & 0xFFFFF) << 10)
-#define   G_028000_SLICE_TILE_MAX(x)                   (((x) >> 10) & 0xFFFFF)
-#define   C_028000_SLICE_TILE_MAX                      0xC00003FF
-#define R_028004_DB_DEPTH_VIEW                       0x028004
-#define   S_028004_SLICE_START(x)                      (((x) & 0x7FF) << 0)
-#define   G_028004_SLICE_START(x)                      (((x) >> 0) & 0x7FF)
-#define   C_028004_SLICE_START                         0xFFFFF800
-#define   S_028004_SLICE_MAX(x)                        (((x) & 0x7FF) << 13)
-#define   G_028004_SLICE_MAX(x)                        (((x) >> 13) & 0x7FF)
-#define   C_028004_SLICE_MAX                           0xFF001FFF
-#define R_028D24_DB_HTILE_SURFACE                    0x028D24
-#define   S_028D24_HTILE_WIDTH(x)                      (((x) & 0x1) << 0)
-#define   G_028D24_HTILE_WIDTH(x)                      (((x) >> 0) & 0x1)
-#define   C_028D24_HTILE_WIDTH                         0xFFFFFFFE
-#define   S_028D24_HTILE_HEIGHT(x)                     (((x) & 0x1) << 1)
-#define   G_028D24_HTILE_HEIGHT(x)                     (((x) >> 1) & 0x1)
-#define   C_028D24_HTILE_HEIGHT                        0xFFFFFFFD
-#define   S_028D24_LINEAR(x)                           (((x) & 0x1) << 2)
-#define   G_028D24_LINEAR(x)                           (((x) >> 2) & 0x1)
-#define   C_028D24_LINEAR                              0xFFFFFFFB
-#define   S_028D24_FULL_CACHE(x)                       (((x) & 0x1) << 3)
-#define   G_028D24_FULL_CACHE(x)                       (((x) >> 3) & 0x1)
-#define   C_028D24_FULL_CACHE                          0xFFFFFFF7
-#define   S_028D24_HTILE_USES_PRELOAD_WIN(x)           (((x) & 0x1) << 4)
-#define   G_028D24_HTILE_USES_PRELOAD_WIN(x)           (((x) >> 4) & 0x1)
-#define   C_028D24_HTILE_USES_PRELOAD_WIN              0xFFFFFFEF
-#define   S_028D24_PRELOAD(x)                          (((x) & 0x1) << 5)
-#define   G_028D24_PRELOAD(x)                          (((x) >> 5) & 0x1)
-#define   C_028D24_PRELOAD                             0xFFFFFFDF
-#define   S_028D24_PREFETCH_WIDTH(x)                   (((x) & 0x3F) << 6)
-#define   G_028D24_PREFETCH_WIDTH(x)                   (((x) >> 6) & 0x3F)
-#define   C_028D24_PREFETCH_WIDTH                      0xFFFFF03F
-#define   S_028D24_PREFETCH_HEIGHT(x)                  (((x) & 0x3F) << 12)
-#define   G_028D24_PREFETCH_HEIGHT(x)                  (((x) >> 12) & 0x3F)
-#define   C_028D24_PREFETCH_HEIGHT                     0xFFFC0FFF
-#define R_028D34_DB_PREFETCH_LIMIT                   0x028D34
-#define   S_028D34_DEPTH_HEIGHT_TILE_MAX(x)            (((x) & 0x3FF) << 0)
-#define   G_028D34_DEPTH_HEIGHT_TILE_MAX(x)            (((x) >> 0) & 0x3FF)
-#define   C_028D34_DEPTH_HEIGHT_TILE_MAX               0xFFFFFC00
-#define R_028D10_DB_RENDER_OVERRIDE                  0x028D10
-#define   S_028D10_FORCE_HIZ_ENABLE(x)                 (((x) & 0x3) << 0)
-#define   G_028D10_FORCE_HIZ_ENABLE(x)                 (((x) >> 0) & 0x3)
-#define   C_028D10_FORCE_HIZ_ENABLE                    0xFFFFFFFC
-#define   S_028D10_FORCE_HIS_ENABLE0(x)                (((x) & 0x3) << 2)
-#define   G_028D10_FORCE_HIS_ENABLE0(x)                (((x) >> 2) & 0x3)
-#define   C_028D10_FORCE_HIS_ENABLE0                   0xFFFFFFF3
-#define   S_028D10_FORCE_HIS_ENABLE1(x)                (((x) & 0x3) << 4)
-#define   G_028D10_FORCE_HIS_ENABLE1(x)                (((x) >> 4) & 0x3)
-#define   C_028D10_FORCE_HIS_ENABLE1                   0xFFFFFFCF
-#define   S_028D10_FORCE_SHADER_Z_ORDER(x)             (((x) & 0x1) << 6)
-#define   G_028D10_FORCE_SHADER_Z_ORDER(x)             (((x) >> 6) & 0x1)
-#define   C_028D10_FORCE_SHADER_Z_ORDER                0xFFFFFFBF
-#define   S_028D10_FAST_Z_DISABLE(x)                   (((x) & 0x1) << 7)
-#define   G_028D10_FAST_Z_DISABLE(x)                   (((x) >> 7) & 0x1)
-#define   C_028D10_FAST_Z_DISABLE                      0xFFFFFF7F
-#define   S_028D10_FAST_STENCIL_DISABLE(x)             (((x) & 0x1) << 8)
-#define   G_028D10_FAST_STENCIL_DISABLE(x)             (((x) >> 8) & 0x1)
-#define   C_028D10_FAST_STENCIL_DISABLE                0xFFFFFEFF
-#define   S_028D10_NOOP_CULL_DISABLE(x)                (((x) & 0x1) << 9)
-#define   G_028D10_NOOP_CULL_DISABLE(x)                (((x) >> 9) & 0x1)
-#define   C_028D10_NOOP_CULL_DISABLE                   0xFFFFFDFF
-#define   S_028D10_FORCE_COLOR_KILL(x)                 (((x) & 0x1) << 10)
-#define   G_028D10_FORCE_COLOR_KILL(x)                 (((x) >> 10) & 0x1)
-#define   C_028D10_FORCE_COLOR_KILL                    0xFFFFFBFF
-#define   S_028D10_FORCE_Z_READ(x)                     (((x) & 0x1) << 11)
-#define   G_028D10_FORCE_Z_READ(x)                     (((x) >> 11) & 0x1)
-#define   C_028D10_FORCE_Z_READ                        0xFFFFF7FF
-#define   S_028D10_FORCE_STENCIL_READ(x)               (((x) & 0x1) << 12)
-#define   G_028D10_FORCE_STENCIL_READ(x)               (((x) >> 12) & 0x1)
-#define   C_028D10_FORCE_STENCIL_READ                  0xFFFFEFFF
-#define   S_028D10_FORCE_FULL_Z_RANGE(x)               (((x) & 0x3) << 13)
-#define   G_028D10_FORCE_FULL_Z_RANGE(x)               (((x) >> 13) & 0x3)
-#define   C_028D10_FORCE_FULL_Z_RANGE                  0xFFFF9FFF
-#define   S_028D10_FORCE_QC_SMASK_CONFLICT(x)          (((x) & 0x1) << 15)
-#define   G_028D10_FORCE_QC_SMASK_CONFLICT(x)          (((x) >> 15) & 0x1)
-#define   C_028D10_FORCE_QC_SMASK_CONFLICT             0xFFFF7FFF
-#define   S_028D10_DISABLE_VIEWPORT_CLAMP(x)           (((x) & 0x1) << 16)
-#define   G_028D10_DISABLE_VIEWPORT_CLAMP(x)           (((x) >> 16) & 0x1)
-#define   C_028D10_DISABLE_VIEWPORT_CLAMP              0xFFFEFFFF
-#define   S_028D10_IGNORE_SC_ZRANGE(x)                 (((x) & 0x1) << 17)
-#define   G_028D10_IGNORE_SC_ZRANGE(x)                 (((x) >> 17) & 0x1)
-#define   C_028D10_IGNORE_SC_ZRANGE                    0xFFFDFFFF
-#define R_028A40_VGT_GS_MODE                         0x028A40
-#define   S_028A40_MODE(x)                             (((x) & 0x3) << 0)
-#define   G_028A40_MODE(x)                             (((x) >> 0) & 0x3)
-#define   C_028A40_MODE                                0xFFFFFFFC
-#define   S_028A40_ES_PASSTHRU(x)                      (((x) & 0x1) << 2)
-#define   G_028A40_ES_PASSTHRU(x)                      (((x) >> 2) & 0x1)
-#define   C_028A40_ES_PASSTHRU                         0xFFFFFFFB
-#define   S_028A40_CUT_MODE(x)                         (((x) & 0x3) << 3)
-#define   G_028A40_CUT_MODE(x)                         (((x) >> 3) & 0x3)
-#define   C_028A40_CUT_MODE                            0xFFFFFFE7
-#define R_008DFC_SQ_CF_WORD0                         0x008DFC
-#define   S_008DFC_ADDR(x)                             (((x) & 0xFFFFFFFF) << 0)
-#define   G_008DFC_ADDR(x)                             (((x) >> 0) & 0xFFFFFFFF)
-#define   C_008DFC_ADDR                                0x00000000
-#define R_008DFC_SQ_CF_WORD1                         0x008DFC
-#define   S_008DFC_POP_COUNT(x)                        (((x) & 0x7) << 0)
-#define   G_008DFC_POP_COUNT(x)                        (((x) >> 0) & 0x7)
-#define   C_008DFC_POP_COUNT                           0xFFFFFFF8
-#define   S_008DFC_CF_CONST(x)                         (((x) & 0x1F) << 3)
-#define   G_008DFC_CF_CONST(x)                         (((x) >> 3) & 0x1F)
-#define   C_008DFC_CF_CONST                            0xFFFFFF07
-#define   S_008DFC_COND(x)                             (((x) & 0x3) << 8)
-#define   G_008DFC_COND(x)                             (((x) >> 8) & 0x3)
-#define   C_008DFC_COND                                0xFFFFFCFF
-#define   S_008DFC_COUNT(x)                            (((x) & 0x7) << 10)
-#define   G_008DFC_COUNT(x)                            (((x) >> 10) & 0x7)
-#define   C_008DFC_COUNT                               0xFFFFE3FF
-#define   S_008DFC_CALL_COUNT(x)                       (((x) & 0x3F) << 13)
-#define   G_008DFC_CALL_COUNT(x)                       (((x) >> 13) & 0x3F)
-#define   C_008DFC_CALL_COUNT                          0xFFF81FFF
-#define   S_008DFC_END_OF_PROGRAM(x)                   (((x) & 0x1) << 21)
-#define   G_008DFC_END_OF_PROGRAM(x)                   (((x) >> 21) & 0x1)
-#define   C_008DFC_END_OF_PROGRAM                      0xFFDFFFFF
-#define   S_008DFC_VALID_PIXEL_MODE(x)                 (((x) & 0x1) << 22)
-#define   G_008DFC_VALID_PIXEL_MODE(x)                 (((x) >> 22) & 0x1)
-#define   C_008DFC_VALID_PIXEL_MODE                    0xFFBFFFFF
-#define   S_008DFC_CF_INST(x)                          (((x) & 0x7F) << 23)
-#define   G_008DFC_CF_INST(x)                          (((x) >> 23) & 0x7F)
-#define   C_008DFC_CF_INST                             0xC07FFFFF
-#define     V_008DFC_SQ_CF_INST_NOP                    0x00000000
-#define     V_008DFC_SQ_CF_INST_TEX                    0x00000001
-#define     V_008DFC_SQ_CF_INST_VTX                    0x00000002
-#define     V_008DFC_SQ_CF_INST_VTX_TC                 0x00000003
-#define     V_008DFC_SQ_CF_INST_LOOP_START             0x00000004
-#define     V_008DFC_SQ_CF_INST_LOOP_END               0x00000005
-#define     V_008DFC_SQ_CF_INST_LOOP_START_DX10        0x00000006
-#define     V_008DFC_SQ_CF_INST_LOOP_START_NO_AL       0x00000007
-#define     V_008DFC_SQ_CF_INST_LOOP_CONTINUE          0x00000008
-#define     V_008DFC_SQ_CF_INST_LOOP_BREAK             0x00000009
-#define     V_008DFC_SQ_CF_INST_JUMP                   0x0000000A
-#define     V_008DFC_SQ_CF_INST_PUSH                   0x0000000B
-#define     V_008DFC_SQ_CF_INST_PUSH_ELSE              0x0000000C
-#define     V_008DFC_SQ_CF_INST_ELSE                   0x0000000D
-#define     V_008DFC_SQ_CF_INST_POP                    0x0000000E
-#define     V_008DFC_SQ_CF_INST_POP_JUMP               0x0000000F
-#define     V_008DFC_SQ_CF_INST_POP_PUSH               0x00000010
-#define     V_008DFC_SQ_CF_INST_POP_PUSH_ELSE          0x00000011
-#define     V_008DFC_SQ_CF_INST_CALL                   0x00000012
-#define     V_008DFC_SQ_CF_INST_CALL_FS                0x00000013
-#define     V_008DFC_SQ_CF_INST_RETURN                 0x00000014
-#define     V_008DFC_SQ_CF_INST_EMIT_VERTEX            0x00000015
-#define     V_008DFC_SQ_CF_INST_EMIT_CUT_VERTEX        0x00000016
-#define     V_008DFC_SQ_CF_INST_CUT_VERTEX             0x00000017
-#define     V_008DFC_SQ_CF_INST_KILL                   0x00000018
-#define   S_008DFC_WHOLE_QUAD_MODE(x)                  (((x) & 0x1) << 30)
-#define   G_008DFC_WHOLE_QUAD_MODE(x)                  (((x) >> 30) & 0x1)
-#define   C_008DFC_WHOLE_QUAD_MODE                     0xBFFFFFFF
-#define   S_008DFC_BARRIER(x)                          (((x) & 0x1) << 31)
-#define   G_008DFC_BARRIER(x)                          (((x) >> 31) & 0x1)
-#define   C_008DFC_BARRIER                             0x7FFFFFFF
-#define R_008DFC_SQ_CF_ALU_WORD0                     0x008DFC
-#define   S_008DFC_ALU_ADDR(x)                         (((x) & 0x3FFFFF) << 0)
-#define   G_008DFC_ALU_ADDR(x)                         (((x) >> 0) & 0x3FFFFF)
-#define   C_008DFC_ALU_ADDR                            0xFFC00000
-#define   S_008DFC_KCACHE_BANK0(x)                     (((x) & 0xF) << 22)
-#define   G_008DFC_KCACHE_BANK0(x)                     (((x) >> 22) & 0xF)
-#define   C_008DFC_KCACHE_BANK0                        0xFC3FFFFF
-#define   S_008DFC_KCACHE_BANK1(x)                     (((x) & 0xF) << 26)
-#define   G_008DFC_KCACHE_BANK1(x)                     (((x) >> 26) & 0xF)
-#define   C_008DFC_KCACHE_BANK1                        0xC3FFFFFF
-#define   S_008DFC_KCACHE_MODE0(x)                     (((x) & 0x3) << 30)
-#define   G_008DFC_KCACHE_MODE0(x)                     (((x) >> 30) & 0x3)
-#define   C_008DFC_KCACHE_MODE0                        0x3FFFFFFF
-#define R_008DFC_SQ_CF_ALU_WORD1                     0x008DFC
-#define   S_008DFC_KCACHE_MODE1(x)                     (((x) & 0x3) << 0)
-#define   G_008DFC_KCACHE_MODE1(x)                     (((x) >> 0) & 0x3)
-#define   C_008DFC_KCACHE_MODE1                        0xFFFFFFFC
-#define   S_008DFC_KCACHE_ADDR0(x)                     (((x) & 0xFF) << 2)
-#define   G_008DFC_KCACHE_ADDR0(x)                     (((x) >> 2) & 0xFF)
-#define   C_008DFC_KCACHE_ADDR0                        0xFFFFFC03
-#define   S_008DFC_KCACHE_ADDR1(x)                     (((x) & 0xFF) << 10)
-#define   G_008DFC_KCACHE_ADDR1(x)                     (((x) >> 10) & 0xFF)
-#define   C_008DFC_KCACHE_ADDR1                        0xFFFC03FF
-#define   S_008DFC_ALU_COUNT(x)                        (((x) & 0x7F) << 18)
-#define   G_008DFC_ALU_COUNT(x)                        (((x) >> 18) & 0x7F)
-#define   C_008DFC_ALU_COUNT                           0xFE03FFFF
-#define   S_008DFC_USES_WATERFALL(x)                   (((x) & 0x1) << 25)
-#define   G_008DFC_USES_WATERFALL(x)                   (((x) >> 25) & 0x1)
-#define   C_008DFC_USES_WATERFALL                      0xFDFFFFFF
-#define   S_008DFC_CF_ALU_INST(x)                      (((x) & 0xF) << 26)
-#define   G_008DFC_CF_ALU_INST(x)                      (((x) >> 26) & 0xF)
-#define   C_008DFC_CF_ALU_INST                         0xC3FFFFFF
-#define     V_008DFC_SQ_CF_INST_ALU                    0x00000008
-#define     V_008DFC_SQ_CF_INST_ALU_PUSH_BEFORE        0x00000009
-#define     V_008DFC_SQ_CF_INST_ALU_POP_AFTER          0x0000000A
-#define     V_008DFC_SQ_CF_INST_ALU_POP2_AFTER         0x0000000B
-#define     V_008DFC_SQ_CF_INST_ALU_CONTINUE           0x0000000D
-#define     V_008DFC_SQ_CF_INST_ALU_BREAK              0x0000000E
-#define     V_008DFC_SQ_CF_INST_ALU_ELSE_AFTER         0x0000000F
-#define   S_008DFC_WHOLE_QUAD_MODE(x)                  (((x) & 0x1) << 30)
-#define   G_008DFC_WHOLE_QUAD_MODE(x)                  (((x) >> 30) & 0x1)
-#define   C_008DFC_WHOLE_QUAD_MODE                     0xBFFFFFFF
-#define   S_008DFC_BARRIER(x)                          (((x) & 0x1) << 31)
-#define   G_008DFC_BARRIER(x)                          (((x) >> 31) & 0x1)
-#define   C_008DFC_BARRIER                             0x7FFFFFFF
-#define R_008DFC_SQ_CF_ALLOC_EXPORT_WORD0            0x008DFC
-#define   S_008DFC_ARRAY_BASE(x)                       (((x) & 0x1FFF) << 0)
-#define   G_008DFC_ARRAY_BASE(x)                       (((x) >> 0) & 0x1FFF)
-#define   C_008DFC_ARRAY_BASE                          0xFFFFE000
-#define   S_008DFC_TYPE(x)                             (((x) & 0x3) << 13)
-#define   G_008DFC_TYPE(x)                             (((x) >> 13) & 0x3)
-#define   C_008DFC_TYPE                                0xFFFF9FFF
-#define   S_008DFC_RW_GPR(x)                           (((x) & 0x7F) << 15)
-#define   G_008DFC_RW_GPR(x)                           (((x) >> 15) & 0x7F)
-#define   C_008DFC_RW_GPR                              0xFFC07FFF
-#define   S_008DFC_RW_REL(x)                           (((x) & 0x1) << 22)
-#define   G_008DFC_RW_REL(x)                           (((x) >> 22) & 0x1)
-#define   C_008DFC_RW_REL                              0xFFBFFFFF
-#define   S_008DFC_INDEX_GPR(x)                        (((x) & 0x7F) << 23)
-#define   G_008DFC_INDEX_GPR(x)                        (((x) >> 23) & 0x7F)
-#define   C_008DFC_INDEX_GPR                           0xC07FFFFF
-#define   S_008DFC_ELEM_SIZE(x)                        (((x) & 0x3) << 30)
-#define   G_008DFC_ELEM_SIZE(x)                        (((x) >> 30) & 0x3)
-#define   C_008DFC_ELEM_SIZE                           0x3FFFFFFF
-#define R_008DFC_SQ_CF_ALLOC_EXPORT_WORD1            0x008DFC
-#define   S_008DFC_BURST_COUNT(x)                      (((x) & 0xF) << 17)
-#define   G_008DFC_BURST_COUNT(x)                      (((x) >> 17) & 0xF)
-#define   C_008DFC_BURST_COUNT                         0xFFE1FFFF
-#define   S_008DFC_END_OF_PROGRAM(x)                   (((x) & 0x1) << 21)
-#define   G_008DFC_END_OF_PROGRAM(x)                   (((x) >> 21) & 0x1)
-#define   C_008DFC_END_OF_PROGRAM                      0xFFDFFFFF
-#define   S_008DFC_VALID_PIXEL_MODE(x)                 (((x) & 0x1) << 22)
-#define   G_008DFC_VALID_PIXEL_MODE(x)                 (((x) >> 22) & 0x1)
-#define   C_008DFC_VALID_PIXEL_MODE                    0xFFBFFFFF
-#define   S_008DFC_CF_INST(x)                          (((x) & 0x7F) << 23)
-#define   G_008DFC_CF_INST(x)                          (((x) >> 23) & 0x7F)
-#define   C_008DFC_CF_INST                             0xC07FFFFF
-#define     V_008DFC_SQ_CF_INST_MEM_STREAM0            0x00000020
-#define     V_008DFC_SQ_CF_INST_MEM_STREAM1            0x00000021
-#define     V_008DFC_SQ_CF_INST_MEM_STREAM2            0x00000022
-#define     V_008DFC_SQ_CF_INST_MEM_STREAM3            0x00000023
-#define     V_008DFC_SQ_CF_INST_MEM_SCRATCH            0x00000024
-#define     V_008DFC_SQ_CF_INST_MEM_REDUCTION          0x00000025
-#define     V_008DFC_SQ_CF_INST_MEM_RING               0x00000026
-#define     V_008DFC_SQ_CF_INST_EXPORT                 0x00000027
-#define     V_008DFC_SQ_CF_INST_EXPORT_DONE            0x00000028
-#define   S_008DFC_WHOLE_QUAD_MODE(x)                  (((x) & 0x1) << 30)
-#define   G_008DFC_WHOLE_QUAD_MODE(x)                  (((x) >> 30) & 0x1)
-#define   C_008DFC_WHOLE_QUAD_MODE                     0xBFFFFFFF
-#define   S_008DFC_BARRIER(x)                          (((x) & 0x1) << 31)
-#define   G_008DFC_BARRIER(x)                          (((x) >> 31) & 0x1)
-#define   C_008DFC_BARRIER                             0x7FFFFFFF
-#define R_008DFC_SQ_CF_ALLOC_EXPORT_WORD1_BUF        0x008DFC
-#define   S_008DFC_ARRAY_SIZE(x)                       (((x) & 0xFFF) << 0)
-#define   G_008DFC_ARRAY_SIZE(x)                       (((x) >> 0) & 0xFFF)
-#define   C_008DFC_ARRAY_SIZE                          0xFFFFF000
-#define   S_008DFC_COMP_MASK(x)                        (((x) & 0xF) << 12)
-#define   G_008DFC_COMP_MASK(x)                        (((x) >> 12) & 0xF)
-#define   C_008DFC_COMP_MASK                           0xFFFF0FFF
-#define R_008DFC_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ       0x008DFC
-#define   S_008DFC_SEL_X(x)                            (((x) & 0x7) << 0)
-#define   G_008DFC_SEL_X(x)                            (((x) >> 0) & 0x7)
-#define   C_008DFC_SEL_X                               0xFFFFFFF8
-#define   S_008DFC_SEL_Y(x)                            (((x) & 0x7) << 3)
-#define   G_008DFC_SEL_Y(x)                            (((x) >> 3) & 0x7)
-#define   C_008DFC_SEL_Y                               0xFFFFFFC7
-#define   S_008DFC_SEL_Z(x)                            (((x) & 0x7) << 6)
-#define   G_008DFC_SEL_Z(x)                            (((x) >> 6) & 0x7)
-#define   C_008DFC_SEL_Z                               0xFFFFFE3F
-#define   S_008DFC_SEL_W(x)                            (((x) & 0x7) << 9)
-#define   G_008DFC_SEL_W(x)                            (((x) >> 9) & 0x7)
-#define   C_008DFC_SEL_W                               0xFFFFF1FF
-#define R_008DFC_SQ_VTX_WORD0                        0x008DFC
-#define   S_008DFC_VTX_INST(x)                         (((x) & 0x1F) << 0)
-#define   G_008DFC_VTX_INST(x)                         (((x) >> 0) & 0x1F)
-#define   C_008DFC_VTX_INST                            0xFFFFFFE0
-#define   S_008DFC_FETCH_TYPE(x)                       (((x) & 0x3) << 5)
-#define   G_008DFC_FETCH_TYPE(x)                       (((x) >> 5) & 0x3)
-#define   C_008DFC_FETCH_TYPE                          0xFFFFFF9F
-#define   S_008DFC_FETCH_WHOLE_QUAD(x)                 (((x) & 0x1) << 7)
-#define   G_008DFC_FETCH_WHOLE_QUAD(x)                 (((x) >> 7) & 0x1)
-#define   C_008DFC_FETCH_WHOLE_QUAD                    0xFFFFFF7F
-#define   S_008DFC_BUFFER_ID(x)                        (((x) & 0xFF) << 8)
-#define   G_008DFC_BUFFER_ID(x)                        (((x) >> 8) & 0xFF)
-#define   C_008DFC_BUFFER_ID                           0xFFFF00FF
-#define   S_008DFC_SRC_GPR(x)                          (((x) & 0x7F) << 16)
-#define   G_008DFC_SRC_GPR(x)                          (((x) >> 16) & 0x7F)
-#define   C_008DFC_SRC_GPR                             0xFF80FFFF
-#define   S_008DFC_SRC_REL(x)                          (((x) & 0x1) << 23)
-#define   G_008DFC_SRC_REL(x)                          (((x) >> 23) & 0x1)
-#define   C_008DFC_SRC_REL                             0xFF7FFFFF
-#define   S_008DFC_SRC_SEL_X(x)                        (((x) & 0x3) << 24)
-#define   G_008DFC_SRC_SEL_X(x)                        (((x) >> 24) & 0x3)
-#define   C_008DFC_SRC_SEL_X                           0xFCFFFFFF
-#define   S_008DFC_MEGA_FETCH_COUNT(x)                 (((x) & 0x3F) << 26)
-#define   G_008DFC_MEGA_FETCH_COUNT(x)                 (((x) >> 26) & 0x3F)
-#define   C_008DFC_MEGA_FETCH_COUNT                    0x03FFFFFF
-#define R_008DFC_SQ_VTX_WORD1                        0x008DFC
-#define   S_008DFC_DST_SEL_X(x)                        (((x) & 0x7) << 9)
-#define   G_008DFC_DST_SEL_X(x)                        (((x) >> 9) & 0x7)
-#define   C_008DFC_DST_SEL_X                           0xFFFFF1FF
-#define   S_008DFC_DST_SEL_Y(x)                        (((x) & 0x7) << 12)
-#define   G_008DFC_DST_SEL_Y(x)                        (((x) >> 12) & 0x7)
-#define   C_008DFC_DST_SEL_Y                           0xFFFF8FFF
-#define   S_008DFC_DST_SEL_Z(x)                        (((x) & 0x7) << 15)
-#define   G_008DFC_DST_SEL_Z(x)                        (((x) >> 15) & 0x7)
-#define   C_008DFC_DST_SEL_Z                           0xFFFC7FFF
-#define   S_008DFC_DST_SEL_W(x)                        (((x) & 0x7) << 18)
-#define   G_008DFC_DST_SEL_W(x)                        (((x) >> 18) & 0x7)
-#define   C_008DFC_DST_SEL_W                           0xFFE3FFFF
-#define   S_008DFC_USE_CONST_FIELDS(x)                 (((x) & 0x1) << 21)
-#define   G_008DFC_USE_CONST_FIELDS(x)                 (((x) >> 21) & 0x1)
-#define   C_008DFC_USE_CONST_FIELDS                    0xFFDFFFFF
-#define   S_008DFC_DATA_FORMAT(x)                      (((x) & 0x3F) << 22)
-#define   G_008DFC_DATA_FORMAT(x)                      (((x) >> 22) & 0x3F)
-#define   C_008DFC_DATA_FORMAT                         0xF03FFFFF
-#define   S_008DFC_NUM_FORMAT_ALL(x)                   (((x) & 0x3) << 28)
-#define   G_008DFC_NUM_FORMAT_ALL(x)                   (((x) >> 28) & 0x3)
-#define   C_008DFC_NUM_FORMAT_ALL                      0xCFFFFFFF
-#define   S_008DFC_FORMAT_COMP_ALL(x)                  (((x) & 0x1) << 30)
-#define   G_008DFC_FORMAT_COMP_ALL(x)                  (((x) >> 30) & 0x1)
-#define   C_008DFC_FORMAT_COMP_ALL                     0xBFFFFFFF
-#define   S_008DFC_SRF_MODE_ALL(x)                     (((x) & 0x1) << 31)
-#define   G_008DFC_SRF_MODE_ALL(x)                     (((x) >> 31) & 0x1)
-#define   C_008DFC_SRF_MODE_ALL                        0x7FFFFFFF
-#define R_008DFC_SQ_VTX_WORD1_GPR                    0x008DFC
-#define   S_008DFC_DST_GPR(x)                          (((x) & 0x7F) << 0)
-#define   G_008DFC_DST_GPR(x)                          (((x) >> 0) & 0x7F)
-#define   C_008DFC_DST_GPR                             0xFFFFFF80
-#define   S_008DFC_DST_REL(x)                          (((x) & 0x1) << 7)
-#define   G_008DFC_DST_REL(x)                          (((x) >> 7) & 0x1)
-#define   C_008DFC_DST_REL                             0xFFFFFF7F
-#define R_008DFC_SQ_VTX_WORD2                        0x008DFC
-#define   S_008DFC_OFFSET(x)                           (((x) & 0xFFFF) << 0)
-#define   G_008DFC_OFFSET(x)                           (((x) >> 0) & 0xFFFF)
-#define   C_008DFC_OFFSET                              0xFFFF0000
-#define   S_008DFC_ENDIAN_SWAP(x)                      (((x) & 0x3) << 16)
-#define   G_008DFC_ENDIAN_SWAP(x)                      (((x) >> 16) & 0x3)
-#define   C_008DFC_ENDIAN_SWAP                         0xFFFCFFFF
-#define   S_008DFC_CONST_BUF_NO_STRIDE(x)              (((x) & 0x1) << 18)
-#define   G_008DFC_CONST_BUF_NO_STRIDE(x)              (((x) >> 18) & 0x1)
-#define   C_008DFC_CONST_BUF_NO_STRIDE                 0xFFFBFFFF
-#define   S_008DFC_MEGA_FETCH(x)                       (((x) & 0x1) << 19)
-#define   G_008DFC_MEGA_FETCH(x)                       (((x) >> 19) & 0x1)
-#define   C_008DFC_MEGA_FETCH                          0xFFF7FFFF
-#define   S_008DFC_ALT_CONST(x)                        (((x) & 0x1) << 20)
-#define   G_008DFC_ALT_CONST(x)                        (((x) >> 20) & 0x1)
-#define   C_008DFC_ALT_CONST                           0xFFEFFFFF
-#define R_008040_WAIT_UNTIL                          0x008040
-#define   S_008040_WAIT_CP_DMA_IDLE(x)                 (((x) & 0x1) << 8)
-#define   G_008040_WAIT_CP_DMA_IDLE(x)                 (((x) >> 8) & 0x1)
-#define   C_008040_WAIT_CP_DMA_IDLE                    0xFFFFFEFF
-#define   S_008040_WAIT_CMDFIFO(x)                     (((x) & 0x1) << 10)
-#define   G_008040_WAIT_CMDFIFO(x)                     (((x) >> 10) & 0x1)
-#define   C_008040_WAIT_CMDFIFO                        0xFFFFFBFF
-#define   S_008040_WAIT_2D_IDLE(x)                     (((x) & 0x1) << 14)
-#define   G_008040_WAIT_2D_IDLE(x)                     (((x) >> 14) & 0x1)
-#define   C_008040_WAIT_2D_IDLE                        0xFFFFBFFF
-#define   S_008040_WAIT_3D_IDLE(x)                     (((x) & 0x1) << 15)
-#define   G_008040_WAIT_3D_IDLE(x)                     (((x) >> 15) & 0x1)
-#define   C_008040_WAIT_3D_IDLE                        0xFFFF7FFF
-#define   S_008040_WAIT_2D_IDLECLEAN(x)                (((x) & 0x1) << 16)
-#define   G_008040_WAIT_2D_IDLECLEAN(x)                (((x) >> 16) & 0x1)
-#define   C_008040_WAIT_2D_IDLECLEAN                   0xFFFEFFFF
-#define   S_008040_WAIT_3D_IDLECLEAN(x)                (((x) & 0x1) << 17)
-#define   G_008040_WAIT_3D_IDLECLEAN(x)                (((x) >> 17) & 0x1)
-#define   C_008040_WAIT_3D_IDLECLEAN                   0xFFFDFFFF
-#define   S_008040_WAIT_EXTERN_SIG(x)                  (((x) & 0x1) << 19)
-#define   G_008040_WAIT_EXTERN_SIG(x)                  (((x) >> 19) & 0x1)
-#define   C_008040_WAIT_EXTERN_SIG                     0xFFF7FFFF
-#define   S_008040_CMDFIFO_ENTRIES(x)                  (((x) & 0x1F) << 20)
-#define   G_008040_CMDFIFO_ENTRIES(x)                  (((x) >> 20) & 0x1F)
-#define   C_008040_CMDFIFO_ENTRIES                     0xFE0FFFFF
-#define R_0286CC_SPI_PS_IN_CONTROL_0                 0x0286CC
-#define   S_0286CC_NUM_INTERP(x)                       (((x) & 0x3F) << 0)
-#define   G_0286CC_NUM_INTERP(x)                       (((x) >> 0) & 0x3F)
-#define   C_0286CC_NUM_INTERP                          0xFFFFFFC0
-#define   S_0286CC_POSITION_ENA(x)                     (((x) & 0x1) << 8)
-#define   G_0286CC_POSITION_ENA(x)                     (((x) >> 8) & 0x1)
-#define   C_0286CC_POSITION_ENA                        0xFFFFFEFF
-#define   S_0286CC_POSITION_CENTROID(x)                (((x) & 0x1) << 9)
-#define   G_0286CC_POSITION_CENTROID(x)                (((x) >> 9) & 0x1)
-#define   C_0286CC_POSITION_CENTROID                   0xFFFFFDFF
-#define   S_0286CC_POSITION_ADDR(x)                    (((x) & 0x1F) << 10)
-#define   G_0286CC_POSITION_ADDR(x)                    (((x) >> 10) & 0x1F)
-#define   C_0286CC_POSITION_ADDR                       0xFFFF83FF
-#define   S_0286CC_PARAM_GEN(x)                        (((x) & 0xF) << 15)
-#define   G_0286CC_PARAM_GEN(x)                        (((x) >> 15) & 0xF)
-#define   C_0286CC_PARAM_GEN                           0xFFF87FFF
-#define   S_0286CC_PARAM_GEN_ADDR(x)                   (((x) & 0x7F) << 19)
-#define   G_0286CC_PARAM_GEN_ADDR(x)                   (((x) >> 19) & 0x7F)
-#define   C_0286CC_PARAM_GEN_ADDR                      0xFC07FFFF
-#define   S_0286CC_BARYC_SAMPLE_CNTL(x)                (((x) & 0x3) << 26)
-#define   G_0286CC_BARYC_SAMPLE_CNTL(x)                (((x) >> 26) & 0x3)
-#define   C_0286CC_BARYC_SAMPLE_CNTL                   0xF3FFFFFF
-#define   S_0286CC_PERSP_GRADIENT_ENA(x)               (((x) & 0x1) << 28)
-#define   G_0286CC_PERSP_GRADIENT_ENA(x)               (((x) >> 28) & 0x1)
-#define   C_0286CC_PERSP_GRADIENT_ENA                  0xEFFFFFFF
-#define   S_0286CC_LINEAR_GRADIENT_ENA(x)              (((x) & 0x1) << 29)
-#define   G_0286CC_LINEAR_GRADIENT_ENA(x)              (((x) >> 29) & 0x1)
-#define   C_0286CC_LINEAR_GRADIENT_ENA                 0xDFFFFFFF
-#define   S_0286CC_POSITION_SAMPLE(x)                  (((x) & 0x1) << 30)
-#define   G_0286CC_POSITION_SAMPLE(x)                  (((x) >> 30) & 0x1)
-#define   C_0286CC_POSITION_SAMPLE                     0xBFFFFFFF
-#define   S_0286CC_BARYC_AT_SAMPLE_ENA(x)              (((x) & 0x1) << 31)
-#define   G_0286CC_BARYC_AT_SAMPLE_ENA(x)              (((x) >> 31) & 0x1)
-#define   C_0286CC_BARYC_AT_SAMPLE_ENA                 0x7FFFFFFF
-#define R_0286D0_SPI_PS_IN_CONTROL_1                 0x0286D0
-#define   S_0286D0_GEN_INDEX_PIX(x)                    (((x) & 0x1) << 0)
-#define   G_0286D0_GEN_INDEX_PIX(x)                    (((x) >> 0) & 0x1)
-#define   C_0286D0_GEN_INDEX_PIX                       0xFFFFFFFE
-#define   S_0286D0_GEN_INDEX_PIX_ADDR(x)               (((x) & 0x7F) << 1)
-#define   G_0286D0_GEN_INDEX_PIX_ADDR(x)               (((x) >> 1) & 0x7F)
-#define   C_0286D0_GEN_INDEX_PIX_ADDR                  0xFFFFFF01
-#define   S_0286D0_FRONT_FACE_ENA(x)                   (((x) & 0x1) << 8)
-#define   G_0286D0_FRONT_FACE_ENA(x)                   (((x) >> 8) & 0x1)
-#define   C_0286D0_FRONT_FACE_ENA                      0xFFFFFEFF
-#define   S_0286D0_FRONT_FACE_CHAN(x)                  (((x) & 0x3) << 9)
-#define   G_0286D0_FRONT_FACE_CHAN(x)                  (((x) >> 9) & 0x3)
-#define   C_0286D0_FRONT_FACE_CHAN                     0xFFFFF9FF
-#define   S_0286D0_FRONT_FACE_ALL_BITS(x)              (((x) & 0x1) << 11)
-#define   G_0286D0_FRONT_FACE_ALL_BITS(x)              (((x) >> 11) & 0x1)
-#define   C_0286D0_FRONT_FACE_ALL_BITS                 0xFFFFF7FF
-#define   S_0286D0_FRONT_FACE_ADDR(x)                  (((x) & 0x1F) << 12)
-#define   G_0286D0_FRONT_FACE_ADDR(x)                  (((x) >> 12) & 0x1F)
-#define   C_0286D0_FRONT_FACE_ADDR                     0xFFFE0FFF
-#define   S_0286D0_FOG_ADDR(x)                         (((x) & 0x7F) << 17)
-#define   G_0286D0_FOG_ADDR(x)                         (((x) >> 17) & 0x7F)
-#define   C_0286D0_FOG_ADDR                            0xFF01FFFF
-#define   S_0286D0_FIXED_PT_POSITION_ENA(x)            (((x) & 0x1) << 24)
-#define   G_0286D0_FIXED_PT_POSITION_ENA(x)            (((x) >> 24) & 0x1)
-#define   C_0286D0_FIXED_PT_POSITION_ENA               0xFEFFFFFF
-#define   S_0286D0_FIXED_PT_POSITION_ADDR(x)           (((x) & 0x1F) << 25)
-#define   G_0286D0_FIXED_PT_POSITION_ADDR(x)           (((x) >> 25) & 0x1F)
-#define   C_0286D0_FIXED_PT_POSITION_ADDR              0xC1FFFFFF
-#define R_0286C4_SPI_VS_OUT_CONFIG                   0x0286C4
-#define   S_0286C4_VS_PER_COMPONENT(x)                 (((x) & 0x1) << 0)
-#define   G_0286C4_VS_PER_COMPONENT(x)                 (((x) >> 0) & 0x1)
-#define   C_0286C4_VS_PER_COMPONENT                    0xFFFFFFFE
-#define   S_0286C4_VS_EXPORT_COUNT(x)                  (((x) & 0x1F) << 1)
-#define   G_0286C4_VS_EXPORT_COUNT(x)                  (((x) >> 1) & 0x1F)
-#define   C_0286C4_VS_EXPORT_COUNT                     0xFFFFFFC1
-#define   S_0286C4_VS_EXPORTS_FOG(x)                   (((x) & 0x1) << 8)
-#define   G_0286C4_VS_EXPORTS_FOG(x)                   (((x) >> 8) & 0x1)
-#define   C_0286C4_VS_EXPORTS_FOG                      0xFFFFFEFF
-#define   S_0286C4_VS_OUT_FOG_VEC_ADDR(x)              (((x) & 0x1F) << 9)
-#define   G_0286C4_VS_OUT_FOG_VEC_ADDR(x)              (((x) >> 9) & 0x1F)
-#define   C_0286C4_VS_OUT_FOG_VEC_ADDR                 0xFFFFC1FF
-#define R_028240_PA_SC_GENERIC_SCISSOR_TL            0x028240
-#define   S_028240_TL_X(x)                             (((x) & 0x3FFF) << 0)
-#define   G_028240_TL_X(x)                             (((x) >> 0) & 0x3FFF)
-#define   C_028240_TL_X                                0xFFFFC000
-#define   S_028240_TL_Y(x)                             (((x) & 0x3FFF) << 16)
-#define   G_028240_TL_Y(x)                             (((x) >> 16) & 0x3FFF)
-#define   C_028240_TL_Y                                0xC000FFFF
-#define   S_028240_WINDOW_OFFSET_DISABLE(x)            (((x) & 0x1) << 31)
-#define   G_028240_WINDOW_OFFSET_DISABLE(x)            (((x) >> 31) & 0x1)
-#define   C_028240_WINDOW_OFFSET_DISABLE               0x7FFFFFFF
-#define R_028244_PA_SC_GENERIC_SCISSOR_BR            0x028244
-#define   S_028244_BR_X(x)                             (((x) & 0x3FFF) << 0)
-#define   G_028244_BR_X(x)                             (((x) >> 0) & 0x3FFF)
-#define   C_028244_BR_X                                0xFFFFC000
-#define   S_028244_BR_Y(x)                             (((x) & 0x3FFF) << 16)
-#define   G_028244_BR_Y(x)                             (((x) >> 16) & 0x3FFF)
-#define   C_028244_BR_Y                                0xC000FFFF
-#define R_028030_PA_SC_SCREEN_SCISSOR_TL             0x028030
-#define   S_028030_TL_X(x)                             (((x) & 0x7FFF) << 0)
-#define   G_028030_TL_X(x)                             (((x) >> 0) & 0x7FFF)
-#define   C_028030_TL_X                                0xFFFF8000
-#define   S_028030_TL_Y(x)                             (((x) & 0x7FFF) << 16)
-#define   G_028030_TL_Y(x)                             (((x) >> 16) & 0x7FFF)
-#define   C_028030_TL_Y                                0x8000FFFF
-#define R_028034_PA_SC_SCREEN_SCISSOR_BR             0x028034
-#define   S_028034_BR_X(x)                             (((x) & 0x7FFF) << 0)
-#define   G_028034_BR_X(x)                             (((x) >> 0) & 0x7FFF)
-#define   C_028034_BR_X                                0xFFFF8000
-#define   S_028034_BR_Y(x)                             (((x) & 0x7FFF) << 16)
-#define   G_028034_BR_Y(x)                             (((x) >> 16) & 0x7FFF)
-#define   C_028034_BR_Y                                0x8000FFFF
-#define R_028204_PA_SC_WINDOW_SCISSOR_TL             0x028204
-#define   S_028204_TL_X(x)                             (((x) & 0x3FFF) << 0)
-#define   G_028204_TL_X(x)                             (((x) >> 0) & 0x3FFF)
-#define   C_028204_TL_X                                0xFFFFC000
-#define   S_028204_TL_Y(x)                             (((x) & 0x3FFF) << 16)
-#define   G_028204_TL_Y(x)                             (((x) >> 16) & 0x3FFF)
-#define   C_028204_TL_Y                                0xC000FFFF
-#define   S_028204_WINDOW_OFFSET_DISABLE(x)            (((x) & 0x1) << 31)
-#define   G_028204_WINDOW_OFFSET_DISABLE(x)            (((x) >> 31) & 0x1)
-#define   C_028204_WINDOW_OFFSET_DISABLE               0x7FFFFFFF
-#define R_028208_PA_SC_WINDOW_SCISSOR_BR             0x028208
-#define   S_028208_BR_X(x)                             (((x) & 0x3FFF) << 0)
-#define   G_028208_BR_X(x)                             (((x) >> 0) & 0x3FFF)
-#define   C_028208_BR_X                                0xFFFFC000
-#define   S_028208_BR_Y(x)                             (((x) & 0x3FFF) << 16)
-#define   G_028208_BR_Y(x)                             (((x) >> 16) & 0x3FFF)
-#define   C_028208_BR_Y                                0xC000FFFF
-#define R_0287F0_VGT_DRAW_INITIATOR                  0x0287F0
-#define   S_0287F0_SOURCE_SELECT(x)                    (((x) & 0x3) << 0)
-#define   G_0287F0_SOURCE_SELECT(x)                    (((x) >> 0) & 0x3)
-#define   C_0287F0_SOURCE_SELECT                       0xFFFFFFFC
-#define   S_0287F0_MAJOR_MODE(x)                       (((x) & 0x3) << 2)
-#define   G_0287F0_MAJOR_MODE(x)                       (((x) >> 2) & 0x3)
-#define   C_0287F0_MAJOR_MODE                          0xFFFFFFF3
-#define   S_0287F0_SPRITE_EN(x)                        (((x) & 0x1) << 4)
-#define   G_0287F0_SPRITE_EN(x)                        (((x) >> 4) & 0x1)
-#define   C_0287F0_SPRITE_EN                           0xFFFFFFEF
-#define   S_0287F0_NOT_EOP(x)                          (((x) & 0x1) << 5)
-#define   G_0287F0_NOT_EOP(x)                          (((x) >> 5) & 0x1)
-#define   C_0287F0_NOT_EOP                             0xFFFFFFDF
-#define   S_0287F0_USE_OPAQUE(x)                       (((x) & 0x1) << 6)
-#define   G_0287F0_USE_OPAQUE(x)                       (((x) >> 6) & 0x1)
-#define   C_0287F0_USE_OPAQUE                          0xFFFFFFBF
-#define R_0280A0_CB_COLOR0_INFO                      0x0280A0
-#define R_0280A4_CB_COLOR1_INFO                      0x0280A4
-#define R_0280A8_CB_COLOR2_INFO                      0x0280A8
-#define R_0280AC_CB_COLOR3_INFO                      0x0280AC
-#define R_0280B0_CB_COLOR4_INFO                      0x0280B0
-#define R_0280B4_CB_COLOR5_INFO                      0x0280B4
-#define R_0280B8_CB_COLOR6_INFO                      0x0280B8
-#define R_0280BC_CB_COLOR7_INFO                      0x0280BC
-#define R_02800C_DB_DEPTH_BASE                       0x02800C
-#define R_028000_DB_DEPTH_SIZE                       0x028000
-#define R_028004_DB_DEPTH_VIEW                       0x028004
-#define R_028010_DB_DEPTH_INFO                       0x028010
-#define R_028D24_DB_HTILE_SURFACE                    0x028D24
-#define R_028D34_DB_PREFETCH_LIMIT                   0x028D34
-#define R_0286D4_SPI_INTERP_CONTROL_0                0x0286D4
-#define R_028A48_PA_SC_MPASS_PS_CNTL                 0x028A48
-#define R_028C00_PA_SC_LINE_CNTL                     0x028C00
-#define R_028C04_PA_SC_AA_CONFIG                     0x028C04
-#define R_028C08_PA_SU_VTX_CNTL                      0x028C08
-#define R_028C1C_PA_SC_AA_SAMPLE_LOCS_MCTX           0x028C1C
-#define R_028C48_PA_SC_AA_MASK                       0x028C48
-#define R_028810_PA_CL_CLIP_CNTL                     0x028810
-#define R_02881C_PA_CL_VS_OUT_CNTL                   0x02881C
-#define R_028820_PA_CL_NANINF_CNTL                   0x028820
-#define R_028C0C_PA_CL_GB_VERT_CLIP_ADJ              0x028C0C
-#define R_028C10_PA_CL_GB_VERT_DISC_ADJ              0x028C10
-#define R_028C14_PA_CL_GB_HORZ_CLIP_ADJ              0x028C14
-#define R_028C18_PA_CL_GB_HORZ_DISC_ADJ              0x028C18
-#define R_028814_PA_SU_SC_MODE_CNTL                  0x028814
-#define R_028A00_PA_SU_POINT_SIZE                    0x028A00
-#define R_028A04_PA_SU_POINT_MINMAX                  0x028A04
-#define R_028A08_PA_SU_LINE_CNTL                     0x028A08
-#define R_028A0C_PA_SC_LINE_STIPPLE                  0x028A0C
-#define R_028DF8_PA_SU_POLY_OFFSET_DB_FMT_CNTL       0x028DF8
-#define R_028DFC_PA_SU_POLY_OFFSET_CLAMP             0x028DFC
-#define R_028E00_PA_SU_POLY_OFFSET_FRONT_SCALE       0x028E00
-#define R_028E04_PA_SU_POLY_OFFSET_FRONT_OFFSET      0x028E04
-#define R_028E08_PA_SU_POLY_OFFSET_BACK_SCALE        0x028E08
-#define R_028E0C_PA_SU_POLY_OFFSET_BACK_OFFSET       0x028E0C
-#define R_028818_PA_CL_VTE_CNTL                      0x028818
-#define R_02843C_PA_CL_VPORT_XSCALE_0                0x02843C
-#define R_028444_PA_CL_VPORT_YSCALE_0                0x028444
-#define R_02844C_PA_CL_VPORT_ZSCALE_0                0x02844C
-#define R_028440_PA_CL_VPORT_XOFFSET_0               0x028440
-#define R_028448_PA_CL_VPORT_YOFFSET_0               0x028448
-#define R_028450_PA_CL_VPORT_ZOFFSET_0               0x028450
-#define R_028250_PA_SC_VPORT_SCISSOR_0_TL            0x028250
-#define R_028254_PA_SC_VPORT_SCISSOR_0_BR            0x028254
-#define R_028780_CB_BLEND0_CONTROL                   0x028780
-#define R_028784_CB_BLEND1_CONTROL                   0x028784
-#define R_028788_CB_BLEND2_CONTROL                   0x028788
-#define R_02878C_CB_BLEND3_CONTROL                   0x02878C
-#define R_028790_CB_BLEND4_CONTROL                   0x028790
-#define R_028794_CB_BLEND5_CONTROL                   0x028794
-#define R_028798_CB_BLEND6_CONTROL                   0x028798
-#define R_02879C_CB_BLEND7_CONTROL                   0x02879C
-#define R_028804_CB_BLEND_CONTROL                    0x028804
-#define R_028028_DB_STENCIL_CLEAR                    0x028028
-#define R_02802C_DB_DEPTH_CLEAR                      0x02802C
-#define R_028430_DB_STENCILREFMASK                   0x028430
-#define R_028434_DB_STENCILREFMASK_BF                0x028434
-#define R_028800_DB_DEPTH_CONTROL                    0x028800
-#define R_02880C_DB_SHADER_CONTROL                   0x02880C
-#define R_028D0C_DB_RENDER_CONTROL                   0x028D0C
-#define   S_028D0C_DEPTH_CLEAR_ENABLE(x)               (((x) & 0x1) << 0)
-#define   S_028D0C_STENCIL_CLEAR_ENABLE(x)             (((x) & 0x1) << 1)
-#define   S_028D0C_DEPTH_COPY_ENABLE(x)                (((x) & 0x1) << 2)
-#define   S_028D0C_STENCIL_COPY_ENABLE(x)              (((x) & 0x1) << 3)
-#define   S_028D0C_RESUMMARIZE_ENABLE(x)               (((x) & 0x1) << 4)
-#define   S_028D0C_STENCIL_COMPRESS_DISABLE(x)         (((x) & 0x1) << 5)
-#define   S_028D0C_DEPTH_COMPRESS_DISABLE(x)           (((x) & 0x1) << 6)
-#define   S_028D0C_COPY_CENTROID(x)                    (((x) & 0x1) << 7)
-#define   S_028D0C_COPY_SAMPLE(x)                      (((x) & 0x1) << 8)
-#define   S_028D0C_R700_PERFECT_ZPASS_COUNTS(x)        (((x) & 0x1) << 15)
-#define R_028D10_DB_RENDER_OVERRIDE                  0x028D10
-#define R_028D2C_DB_SRESULTS_COMPARE_STATE1          0x028D2C
-#define R_028D30_DB_PRELOAD_CONTROL                  0x028D30
-#define R_028D44_DB_ALPHA_TO_MASK                    0x028D44
-#define R_028868_SQ_PGM_RESOURCES_VS                 0x028868
-#define R_0286CC_SPI_PS_IN_CONTROL_0                 0x0286CC
-#define R_0286D0_SPI_PS_IN_CONTROL_1                 0x0286D0
-#define R_028644_SPI_PS_INPUT_CNTL_0                 0x028644
-#define R_028648_SPI_PS_INPUT_CNTL_1                 0x028648
-#define R_02864C_SPI_PS_INPUT_CNTL_2                 0x02864C
-#define R_028650_SPI_PS_INPUT_CNTL_3                 0x028650
-#define R_028654_SPI_PS_INPUT_CNTL_4                 0x028654
-#define R_028658_SPI_PS_INPUT_CNTL_5                 0x028658
-#define R_02865C_SPI_PS_INPUT_CNTL_6                 0x02865C
-#define R_028660_SPI_PS_INPUT_CNTL_7                 0x028660
-#define R_028664_SPI_PS_INPUT_CNTL_8                 0x028664
-#define R_028668_SPI_PS_INPUT_CNTL_9                 0x028668
-#define R_02866C_SPI_PS_INPUT_CNTL_10                0x02866C
-#define R_028670_SPI_PS_INPUT_CNTL_11                0x028670
-#define R_028674_SPI_PS_INPUT_CNTL_12                0x028674
-#define R_028678_SPI_PS_INPUT_CNTL_13                0x028678
-#define R_02867C_SPI_PS_INPUT_CNTL_14                0x02867C
-#define R_028680_SPI_PS_INPUT_CNTL_15                0x028680
-#define R_028684_SPI_PS_INPUT_CNTL_16                0x028684
-#define R_028688_SPI_PS_INPUT_CNTL_17                0x028688
-#define R_02868C_SPI_PS_INPUT_CNTL_18                0x02868C
-#define R_028690_SPI_PS_INPUT_CNTL_19                0x028690
-#define R_028694_SPI_PS_INPUT_CNTL_20                0x028694
-#define R_028698_SPI_PS_INPUT_CNTL_21                0x028698
-#define R_02869C_SPI_PS_INPUT_CNTL_22                0x02869C
-#define R_0286A0_SPI_PS_INPUT_CNTL_23                0x0286A0
-#define R_0286A4_SPI_PS_INPUT_CNTL_24                0x0286A4
-#define R_0286A8_SPI_PS_INPUT_CNTL_25                0x0286A8
-#define R_0286AC_SPI_PS_INPUT_CNTL_26                0x0286AC
-#define R_0286B0_SPI_PS_INPUT_CNTL_27                0x0286B0
-#define R_0286B4_SPI_PS_INPUT_CNTL_28                0x0286B4
-#define R_0286B8_SPI_PS_INPUT_CNTL_29                0x0286B8
-#define R_0286BC_SPI_PS_INPUT_CNTL_30                0x0286BC
-#define R_0286C0_SPI_PS_INPUT_CNTL_31                0x0286C0
-#define R_028850_SQ_PGM_RESOURCES_PS                 0x028850
-#define R_028854_SQ_PGM_EXPORTS_PS                   0x028854
-#define R_008958_VGT_PRIMITIVE_TYPE                  0x008958
-#define R_028A7C_VGT_DMA_INDEX_TYPE                  0x028A7C
-#define R_028A88_VGT_DMA_NUM_INSTANCES               0x028A88
-#define R_008970_VGT_NUM_INDICES                     0x008970
-#define R_0287F0_VGT_DRAW_INITIATOR                  0x0287F0
-#define R_028238_CB_TARGET_MASK                      0x028238
-#define R_02823C_CB_SHADER_MASK                      0x02823C
-#define R_028060_CB_COLOR0_SIZE                      0x028060
-#define   S_028060_PITCH_TILE_MAX(x)                   (((x) & 0x3FF) << 0)
-#define   G_028060_PITCH_TILE_MAX(x)                   (((x) >> 0) & 0x3FF)
-#define   C_028060_PITCH_TILE_MAX                      0xFFFFFC00
-#define   S_028060_SLICE_TILE_MAX(x)                   (((x) & 0xFFFFF) << 10)
-#define   G_028060_SLICE_TILE_MAX(x)                   (((x) >> 10) & 0xFFFFF)
-#define   C_028060_SLICE_TILE_MAX                      0xC00003FF
-#define R_028064_CB_COLOR1_SIZE                      0x028064
-#define R_028068_CB_COLOR2_SIZE                      0x028068
-#define R_02806C_CB_COLOR3_SIZE                      0x02806C
-#define R_028070_CB_COLOR4_SIZE                      0x028070
-#define R_028074_CB_COLOR5_SIZE                      0x028074
-#define R_028078_CB_COLOR6_SIZE                      0x028078
-#define R_02807C_CB_COLOR7_SIZE                      0x02807C
-#define R_028040_CB_COLOR0_BASE                      0x028040
-#define R_028044_CB_COLOR1_BASE                      0x028044
-#define R_028048_CB_COLOR2_BASE                      0x028048
-#define R_02804C_CB_COLOR3_BASE                      0x02804C
-#define R_028050_CB_COLOR4_BASE                      0x028050
-#define R_028054_CB_COLOR5_BASE                      0x028054
-#define R_028058_CB_COLOR6_BASE                      0x028058
-#define R_02805C_CB_COLOR7_BASE                      0x02805C
-#define R_028240_PA_SC_GENERIC_SCISSOR_TL            0x028240
-#define   S_028240_TL_X(x)                             (((x) & 0x3FFF) << 0)
-#define   G_028240_TL_X(x)                             (((x) >> 0) & 0x3FFF)
-#define   C_028240_TL_X                                0xFFFFC000
-#define   S_028240_TL_Y(x)                             (((x) & 0x3FFF) << 16)
-#define   G_028240_TL_Y(x)                             (((x) >> 16) & 0x3FFF)
-#define   C_028240_TL_Y                                0xC000FFFF
-#define R_028C04_PA_SC_AA_CONFIG                     0x028C04
-#define   S_028C04_MSAA_NUM_SAMPLES(x)                 (((x) & 0x3) << 0)
-#define   G_028C04_MSAA_NUM_SAMPLES(x)                 (((x) >> 0) & 0x3)
-#define   C_028C04_MSAA_NUM_SAMPLES                    0xFFFFFFFC
-#define   S_028C04_AA_MASK_CENTROID_DTMN(x)            (((x) & 0x1) << 4)
-#define   G_028C04_AA_MASK_CENTROID_DTMN(x)            (((x) >> 4) & 0x1)
-#define   C_028C04_AA_MASK_CENTROID_DTMN               0xFFFFFFEF
-#define   S_028C04_MAX_SAMPLE_DIST(x)                  (((x) & 0xF) << 13)
-#define   G_028C04_MAX_SAMPLE_DIST(x)                  (((x) >> 13) & 0xF)
-#define   C_028C04_MAX_SAMPLE_DIST                     0xFFFE1FFF
-#define R_0288CC_SQ_PGM_CF_OFFSET_PS                 0x0288CC
-#define R_0288DC_SQ_PGM_CF_OFFSET_FS                 0x0288DC
-#define R_0288D0_SQ_PGM_CF_OFFSET_VS                 0x0288D0
-#define R_028840_SQ_PGM_START_PS                     0x028840
-#define R_028894_SQ_PGM_START_FS                     0x028894
-#define R_028858_SQ_PGM_START_VS                     0x028858
-#define R_028080_CB_COLOR0_VIEW                      0x028080
-#define   S_028080_SLICE_START(x)                      (((x) & 0x7FF) << 0)
-#define   G_028080_SLICE_START(x)                      (((x) >> 0) & 0x7FF)
-#define   C_028080_SLICE_START                         0xFFFFF800
-#define   S_028080_SLICE_MAX(x)                        (((x) & 0x7FF) << 13)
-#define   G_028080_SLICE_MAX(x)                        (((x) >> 13) & 0x7FF)
-#define   C_028080_SLICE_MAX                           0xFF001FFF
-#define R_028084_CB_COLOR1_VIEW                      0x028084
-#define R_028088_CB_COLOR2_VIEW                      0x028088
-#define R_02808C_CB_COLOR3_VIEW                      0x02808C
-#define R_028090_CB_COLOR4_VIEW                      0x028090
-#define R_028094_CB_COLOR5_VIEW                      0x028094
-#define R_028098_CB_COLOR6_VIEW                      0x028098
-#define R_02809C_CB_COLOR7_VIEW                      0x02809C
-#define R_028100_CB_COLOR0_MASK                      0x028100
-#define   S_028100_CMASK_BLOCK_MAX(x)                  (((x) & 0xFFF) << 0)
-#define   G_028100_CMASK_BLOCK_MAX(x)                  (((x) >> 0) & 0xFFF)
-#define   C_028100_CMASK_BLOCK_MAX                     0xFFFFF000
-#define   S_028100_FMASK_TILE_MAX(x)                   (((x) & 0xFFFFF) << 12)
-#define   G_028100_FMASK_TILE_MAX(x)                   (((x) >> 12) & 0xFFFFF)
-#define   C_028100_FMASK_TILE_MAX                      0x00000FFF
-#define R_028104_CB_COLOR1_MASK                      0x028104
-#define R_028108_CB_COLOR2_MASK                      0x028108
-#define R_02810C_CB_COLOR3_MASK                      0x02810C
-#define R_028110_CB_COLOR4_MASK                      0x028110
-#define R_028114_CB_COLOR5_MASK                      0x028114
-#define R_028118_CB_COLOR6_MASK                      0x028118
-#define R_02811C_CB_COLOR7_MASK                      0x02811C
-#define R_028040_CB_COLOR0_BASE                      0x028040
-#define   S_028040_BASE_256B(x)                        (((x) & 0xFFFFFFFF) << 0)
-#define   G_028040_BASE_256B(x)                        (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028040_BASE_256B                           0x00000000
-#define R_0280E0_CB_COLOR0_FRAG                      0x0280E0
-#define   S_0280E0_BASE_256B(x)                        (((x) & 0xFFFFFFFF) << 0)
-#define   G_0280E0_BASE_256B(x)                        (((x) >> 0) & 0xFFFFFFFF)
-#define   C_0280E0_BASE_256B                           0x00000000
-#define R_0280E4_CB_COLOR1_FRAG                      0x0280E4
-#define R_0280E8_CB_COLOR2_FRAG                      0x0280E8
-#define R_0280EC_CB_COLOR3_FRAG                      0x0280EC
-#define R_0280F0_CB_COLOR4_FRAG                      0x0280F0
-#define R_0280F4_CB_COLOR5_FRAG                      0x0280F4
-#define R_0280F8_CB_COLOR6_FRAG                      0x0280F8
-#define R_0280FC_CB_COLOR7_FRAG                      0x0280FC
-#define R_0280C0_CB_COLOR0_TILE                      0x0280C0
-#define   S_0280C0_BASE_256B(x)                        (((x) & 0xFFFFFFFF) << 0)
-#define   G_0280C0_BASE_256B(x)                        (((x) >> 0) & 0xFFFFFFFF)
-#define   C_0280C0_BASE_256B                           0x00000000
-#define R_0280C4_CB_COLOR1_TILE                      0x0280C4
-#define R_0280C8_CB_COLOR2_TILE                      0x0280C8
-#define R_0280CC_CB_COLOR3_TILE                      0x0280CC
-#define R_0280D0_CB_COLOR4_TILE                      0x0280D0
-#define R_0280D4_CB_COLOR5_TILE                      0x0280D4
-#define R_0280D8_CB_COLOR6_TILE                      0x0280D8
-#define R_0280DC_CB_COLOR7_TILE                      0x0280DC
-#define R_028808_CB_COLOR_CONTROL                    0x028808
-#define   S_028808_FOG_ENABLE(x)                       (((x) & 0x1) << 0)
-#define   G_028808_FOG_ENABLE(x)                       (((x) >> 0) & 0x1)
-#define   C_028808_FOG_ENABLE                          0xFFFFFFFE
-#define   S_028808_MULTIWRITE_ENABLE(x)                (((x) & 0x1) << 1)
-#define   G_028808_MULTIWRITE_ENABLE(x)                (((x) >> 1) & 0x1)
-#define   C_028808_MULTIWRITE_ENABLE                   0xFFFFFFFD
-#define   S_028808_DITHER_ENABLE(x)                    (((x) & 0x1) << 2)
-#define   G_028808_DITHER_ENABLE(x)                    (((x) >> 2) & 0x1)
-#define   C_028808_DITHER_ENABLE                       0xFFFFFFFB
-#define   S_028808_DEGAMMA_ENABLE(x)                   (((x) & 0x1) << 3)
-#define   G_028808_DEGAMMA_ENABLE(x)                   (((x) >> 3) & 0x1)
-#define   C_028808_DEGAMMA_ENABLE                      0xFFFFFFF7
-#define   S_028808_SPECIAL_OP(x)                       (((x) & 0x7) << 4)
-#define   G_028808_SPECIAL_OP(x)                       (((x) >> 4) & 0x7)
-#define   C_028808_SPECIAL_OP                          0xFFFFFF8F
-#define   S_028808_PER_MRT_BLEND(x)                    (((x) & 0x1) << 7)
-#define   G_028808_PER_MRT_BLEND(x)                    (((x) >> 7) & 0x1)
-#define   C_028808_PER_MRT_BLEND                       0xFFFFFF7F
-#define   S_028808_TARGET_BLEND_ENABLE(x)              (((x) & 0xFF) << 8)
-#define   G_028808_TARGET_BLEND_ENABLE(x)              (((x) >> 8) & 0xFF)
-#define   C_028808_TARGET_BLEND_ENABLE                 0xFFFF00FF
-#define   S_028808_ROP3(x)                             (((x) & 0xFF) << 16)
-#define   G_028808_ROP3(x)                             (((x) >> 16) & 0xFF)
-#define   C_028808_ROP3                                0xFF00FFFF
-#define R_028614_SPI_VS_OUT_ID_0                     0x028614
-#define   S_028614_SEMANTIC_0(x)                       (((x) & 0xFF) << 0)
-#define   G_028614_SEMANTIC_0(x)                       (((x) >> 0) & 0xFF)
-#define   C_028614_SEMANTIC_0                          0xFFFFFF00
-#define   S_028614_SEMANTIC_1(x)                       (((x) & 0xFF) << 8)
-#define   G_028614_SEMANTIC_1(x)                       (((x) >> 8) & 0xFF)
-#define   C_028614_SEMANTIC_1                          0xFFFF00FF
-#define   S_028614_SEMANTIC_2(x)                       (((x) & 0xFF) << 16)
-#define   G_028614_SEMANTIC_2(x)                       (((x) >> 16) & 0xFF)
-#define   C_028614_SEMANTIC_2                          0xFF00FFFF
-#define   S_028614_SEMANTIC_3(x)                       (((x) & 0xFF) << 24)
-#define   G_028614_SEMANTIC_3(x)                       (((x) >> 24) & 0xFF)
-#define   C_028614_SEMANTIC_3                          0x00FFFFFF
-#define R_028618_SPI_VS_OUT_ID_1                     0x028618
-#define R_02861C_SPI_VS_OUT_ID_2                     0x02861C
-#define R_028620_SPI_VS_OUT_ID_3                     0x028620
-#define R_028624_SPI_VS_OUT_ID_4                     0x028624
-#define R_028628_SPI_VS_OUT_ID_5                     0x028628
-#define R_02862C_SPI_VS_OUT_ID_6                     0x02862C
-#define R_028630_SPI_VS_OUT_ID_7                     0x028630
-#define R_028634_SPI_VS_OUT_ID_8                     0x028634
-#define R_028638_SPI_VS_OUT_ID_9                     0x028638
-#define R_038000_SQ_TEX_RESOURCE_WORD0_0             0x038000
-#define   S_038000_DIM(x)                              (((x) & 0x7) << 0)
-#define   G_038000_DIM(x)                              (((x) >> 0) & 0x7)
-#define   C_038000_DIM                                 0xFFFFFFF8
-#define   S_038000_TILE_MODE(x)                        (((x) & 0xF) << 3)
-#define   G_038000_TILE_MODE(x)                        (((x) >> 3) & 0xF)
-#define   C_038000_TILE_MODE                           0xFFFFFF87
-#define   S_038000_TILE_TYPE(x)                        (((x) & 0x1) << 7)
-#define   G_038000_TILE_TYPE(x)                        (((x) >> 7) & 0x1)
-#define   C_038000_TILE_TYPE                           0xFFFFFF7F
-#define   S_038000_PITCH(x)                            (((x) & 0x7FF) << 8)
-#define   G_038000_PITCH(x)                            (((x) >> 8) & 0x7FF)
-#define   C_038000_PITCH                               0xFFF800FF
-#define   S_038000_TEX_WIDTH(x)                        (((x) & 0x1FFF) << 19)
-#define   G_038000_TEX_WIDTH(x)                        (((x) >> 19) & 0x1FFF)
-#define   C_038000_TEX_WIDTH                           0x0007FFFF
-#define R_038004_SQ_TEX_RESOURCE_WORD1_0             0x038004
-#define   S_038004_TEX_HEIGHT(x)                       (((x) & 0x1FFF) << 0)
-#define   G_038004_TEX_HEIGHT(x)                       (((x) >> 0) & 0x1FFF)
-#define   C_038004_TEX_HEIGHT                          0xFFFFE000
-#define   S_038004_TEX_DEPTH(x)                        (((x) & 0x1FFF) << 13)
-#define   G_038004_TEX_DEPTH(x)                        (((x) >> 13) & 0x1FFF)
-#define   C_038004_TEX_DEPTH                           0xFC001FFF
-#define   S_038004_DATA_FORMAT(x)                      (((x) & 0x3F) << 26)
-#define   G_038004_DATA_FORMAT(x)                      (((x) >> 26) & 0x3F)
-#define   C_038004_DATA_FORMAT                         0x03FFFFFF
-#define     V_038004_COLOR_INVALID                     0x00000000
-#define     V_038004_COLOR_8                           0x00000001
-#define     V_038004_COLOR_4_4                         0x00000002
-#define     V_038004_COLOR_3_3_2                       0x00000003
-#define     V_038004_COLOR_16                          0x00000005
-#define     V_038004_COLOR_16_FLOAT                    0x00000006
-#define     V_038004_COLOR_8_8                         0x00000007
-#define     V_038004_COLOR_5_6_5                       0x00000008
-#define     V_038004_COLOR_6_5_5                       0x00000009
-#define     V_038004_COLOR_1_5_5_5                     0x0000000A
-#define     V_038004_COLOR_4_4_4_4                     0x0000000B
-#define     V_038004_COLOR_5_5_5_1                     0x0000000C
-#define     V_038004_COLOR_32                          0x0000000D
-#define     V_038004_COLOR_32_FLOAT                    0x0000000E
-#define     V_038004_COLOR_16_16                       0x0000000F
-#define     V_038004_COLOR_16_16_FLOAT                 0x00000010
-#define     V_038004_COLOR_8_24                        0x00000011
-#define     V_038004_COLOR_8_24_FLOAT                  0x00000012
-#define     V_038004_COLOR_24_8                        0x00000013
-#define     V_038004_COLOR_24_8_FLOAT                  0x00000014
-#define     V_038004_COLOR_10_11_11                    0x00000015
-#define     V_038004_COLOR_10_11_11_FLOAT              0x00000016
-#define     V_038004_COLOR_11_11_10                    0x00000017
-#define     V_038004_COLOR_11_11_10_FLOAT              0x00000018
-#define     V_038004_COLOR_2_10_10_10                  0x00000019
-#define     V_038004_COLOR_8_8_8_8                     0x0000001A
-#define     V_038004_COLOR_10_10_10_2                  0x0000001B
-#define     V_038004_COLOR_X24_8_32_FLOAT              0x0000001C
-#define     V_038004_COLOR_32_32                       0x0000001D
-#define     V_038004_COLOR_32_32_FLOAT                 0x0000001E
-#define     V_038004_COLOR_16_16_16_16                 0x0000001F
-#define     V_038004_COLOR_16_16_16_16_FLOAT           0x00000020
-#define     V_038004_COLOR_32_32_32_32                 0x00000022
-#define     V_038004_COLOR_32_32_32_32_FLOAT           0x00000023
-#define R_038008_SQ_TEX_RESOURCE_WORD2_0             0x038008
-#define   S_038008_BASE_ADDRESS(x)                     (((x) & 0xFFFFFFFF) << 0)
-#define   G_038008_BASE_ADDRESS(x)                     (((x) >> 0) & 0xFFFFFFFF)
-#define   C_038008_BASE_ADDRESS                        0x00000000
-#define R_03800C_SQ_TEX_RESOURCE_WORD3_0             0x03800C
-#define   S_03800C_MIP_ADDRESS(x)                      (((x) & 0xFFFFFFFF) << 0)
-#define   G_03800C_MIP_ADDRESS(x)                      (((x) >> 0) & 0xFFFFFFFF)
-#define   C_03800C_MIP_ADDRESS                         0x00000000
-#define R_038010_SQ_TEX_RESOURCE_WORD4_0             0x038010
-#define   S_038010_FORMAT_COMP_X(x)                    (((x) & 0x3) << 0)
-#define   G_038010_FORMAT_COMP_X(x)                    (((x) >> 0) & 0x3)
-#define   C_038010_FORMAT_COMP_X                       0xFFFFFFFC
-#define   S_038010_FORMAT_COMP_Y(x)                    (((x) & 0x3) << 2)
-#define   G_038010_FORMAT_COMP_Y(x)                    (((x) >> 2) & 0x3)
-#define   C_038010_FORMAT_COMP_Y                       0xFFFFFFF3
-#define   S_038010_FORMAT_COMP_Z(x)                    (((x) & 0x3) << 4)
-#define   G_038010_FORMAT_COMP_Z(x)                    (((x) >> 4) & 0x3)
-#define   C_038010_FORMAT_COMP_Z                       0xFFFFFFCF
-#define   S_038010_FORMAT_COMP_W(x)                    (((x) & 0x3) << 6)
-#define   G_038010_FORMAT_COMP_W(x)                    (((x) >> 6) & 0x3)
-#define   C_038010_FORMAT_COMP_W                       0xFFFFFF3F
-#define   S_038010_NUM_FORMAT_ALL(x)                   (((x) & 0x3) << 8)
-#define   G_038010_NUM_FORMAT_ALL(x)                   (((x) >> 8) & 0x3)
-#define   C_038010_NUM_FORMAT_ALL                      0xFFFFFCFF
-#define   S_038010_SRF_MODE_ALL(x)                     (((x) & 0x1) << 10)
-#define   G_038010_SRF_MODE_ALL(x)                     (((x) >> 10) & 0x1)
-#define   C_038010_SRF_MODE_ALL                        0xFFFFFBFF
-#define   S_038010_FORCE_DEGAMMA(x)                    (((x) & 0x1) << 11)
-#define   G_038010_FORCE_DEGAMMA(x)                    (((x) >> 11) & 0x1)
-#define   C_038010_FORCE_DEGAMMA                       0xFFFFF7FF
-#define   S_038010_ENDIAN_SWAP(x)                      (((x) & 0x3) << 12)
-#define   G_038010_ENDIAN_SWAP(x)                      (((x) >> 12) & 0x3)
-#define   C_038010_ENDIAN_SWAP                         0xFFFFCFFF
-#define   S_038010_REQUEST_SIZE(x)                     (((x) & 0x3) << 14)
-#define   G_038010_REQUEST_SIZE(x)                     (((x) >> 14) & 0x3)
-#define   C_038010_REQUEST_SIZE                        0xFFFF3FFF
-#define   S_038010_DST_SEL_X(x)                        (((x) & 0x7) << 16)
-#define   G_038010_DST_SEL_X(x)                        (((x) >> 16) & 0x7)
-#define   C_038010_DST_SEL_X                           0xFFF8FFFF
-#define   S_038010_DST_SEL_Y(x)                        (((x) & 0x7) << 19)
-#define   G_038010_DST_SEL_Y(x)                        (((x) >> 19) & 0x7)
-#define   C_038010_DST_SEL_Y                           0xFFC7FFFF
-#define   S_038010_DST_SEL_Z(x)                        (((x) & 0x7) << 22)
-#define   G_038010_DST_SEL_Z(x)                        (((x) >> 22) & 0x7)
-#define   C_038010_DST_SEL_Z                           0xFE3FFFFF
-#define   S_038010_DST_SEL_W(x)                        (((x) & 0x7) << 25)
-#define   G_038010_DST_SEL_W(x)                        (((x) >> 25) & 0x7)
-#define   C_038010_DST_SEL_W                           0xF1FFFFFF
-#define   S_038010_BASE_LEVEL(x)                       (((x) & 0xF) << 28)
-#define   G_038010_BASE_LEVEL(x)                       (((x) >> 28) & 0xF)
-#define   C_038010_BASE_LEVEL                          0x0FFFFFFF
-#define R_038014_SQ_TEX_RESOURCE_WORD5_0             0x038014
-#define   S_038014_LAST_LEVEL(x)                       (((x) & 0xF) << 0)
-#define   G_038014_LAST_LEVEL(x)                       (((x) >> 0) & 0xF)
-#define   C_038014_LAST_LEVEL                          0xFFFFFFF0
-#define   S_038014_BASE_ARRAY(x)                       (((x) & 0x1FFF) << 4)
-#define   G_038014_BASE_ARRAY(x)                       (((x) >> 4) & 0x1FFF)
-#define   C_038014_BASE_ARRAY                          0xFFFE000F
-#define   S_038014_LAST_ARRAY(x)                       (((x) & 0x1FFF) << 17)
-#define   G_038014_LAST_ARRAY(x)                       (((x) >> 17) & 0x1FFF)
-#define   C_038014_LAST_ARRAY                          0xC001FFFF
-#define R_038018_SQ_TEX_RESOURCE_WORD6_0             0x038018
-#define   S_038018_MPEG_CLAMP(x)                       (((x) & 0x3) << 0)
-#define   G_038018_MPEG_CLAMP(x)                       (((x) >> 0) & 0x3)
-#define   C_038018_MPEG_CLAMP                          0xFFFFFFFC
-#define   S_038018_PERF_MODULATION(x)                  (((x) & 0x7) << 5)
-#define   G_038018_PERF_MODULATION(x)                  (((x) >> 5) & 0x7)
-#define   C_038018_PERF_MODULATION                     0xFFFFFF1F
-#define   S_038018_INTERLACED(x)                       (((x) & 0x1) << 8)
-#define   G_038018_INTERLACED(x)                       (((x) >> 8) & 0x1)
-#define   C_038018_INTERLACED                          0xFFFFFEFF
-#define   S_038018_TYPE(x)                             (((x) & 0x3) << 30)
-#define   G_038018_TYPE(x)                             (((x) >> 30) & 0x3)
-#define   C_038018_TYPE                                0x3FFFFFFF
-#define R_008040_WAIT_UNTIL                          0x008040
-#define   S_008040_WAIT_CP_DMA_IDLE(x)                 (((x) & 0x1) << 8)
-#define   G_008040_WAIT_CP_DMA_IDLE(x)                 (((x) >> 8) & 0x1)
-#define   C_008040_WAIT_CP_DMA_IDLE                    0xFFFFFEFF
-#define   S_008040_WAIT_CMDFIFO(x)                     (((x) & 0x1) << 10)
-#define   G_008040_WAIT_CMDFIFO(x)                     (((x) >> 10) & 0x1)
-#define   C_008040_WAIT_CMDFIFO                        0xFFFFFBFF
-#define   S_008040_WAIT_2D_IDLE(x)                     (((x) & 0x1) << 14)
-#define   G_008040_WAIT_2D_IDLE(x)                     (((x) >> 14) & 0x1)
-#define   C_008040_WAIT_2D_IDLE                        0xFFFFBFFF
-#define   S_008040_WAIT_3D_IDLE(x)                     (((x) & 0x1) << 15)
-#define   G_008040_WAIT_3D_IDLE(x)                     (((x) >> 15) & 0x1)
-#define   C_008040_WAIT_3D_IDLE                        0xFFFF7FFF
-#define   S_008040_WAIT_2D_IDLECLEAN(x)                (((x) & 0x1) << 16)
-#define   G_008040_WAIT_2D_IDLECLEAN(x)                (((x) >> 16) & 0x1)
-#define   C_008040_WAIT_2D_IDLECLEAN                   0xFFFEFFFF
-#define   S_008040_WAIT_3D_IDLECLEAN(x)                (((x) & 0x1) << 17)
-#define   G_008040_WAIT_3D_IDLECLEAN(x)                (((x) >> 17) & 0x1)
-#define   C_008040_WAIT_3D_IDLECLEAN                   0xFFFDFFFF
-#define   S_008040_WAIT_EXTERN_SIG(x)                  (((x) & 0x1) << 19)
-#define   G_008040_WAIT_EXTERN_SIG(x)                  (((x) >> 19) & 0x1)
-#define   C_008040_WAIT_EXTERN_SIG                     0xFFF7FFFF
-#define   S_008040_CMDFIFO_ENTRIES(x)                  (((x) & 0x1F) << 20)
-#define   G_008040_CMDFIFO_ENTRIES(x)                  (((x) >> 20) & 0x1F)
-#define   C_008040_CMDFIFO_ENTRIES                     0xFE0FFFFF
-#define R_008958_VGT_PRIMITIVE_TYPE                  0x008958
-#define   S_008958_PRIM_TYPE(x)                        (((x) & 0x3F) << 0)
-#define   G_008958_PRIM_TYPE(x)                        (((x) >> 0) & 0x3F)
-#define   C_008958_PRIM_TYPE                           0xFFFFFFC0
-#define R_008C00_SQ_CONFIG                           0x008C00
-#define   S_008C00_VC_ENABLE(x)                        (((x) & 0x1) << 0)
-#define   G_008C00_VC_ENABLE(x)                        (((x) >> 0) & 0x1)
-#define   C_008C00_VC_ENABLE                           0xFFFFFFFE
-#define   S_008C00_EXPORT_SRC_C(x)                     (((x) & 0x1) << 1)
-#define   G_008C00_EXPORT_SRC_C(x)                     (((x) >> 1) & 0x1)
-#define   C_008C00_EXPORT_SRC_C                        0xFFFFFFFD
-#define   S_008C00_DX9_CONSTS(x)                       (((x) & 0x1) << 2)
-#define   G_008C00_DX9_CONSTS(x)                       (((x) >> 2) & 0x1)
-#define   C_008C00_DX9_CONSTS                          0xFFFFFFFB
-#define   S_008C00_ALU_INST_PREFER_VECTOR(x)           (((x) & 0x1) << 3)
-#define   G_008C00_ALU_INST_PREFER_VECTOR(x)           (((x) >> 3) & 0x1)
-#define   C_008C00_ALU_INST_PREFER_VECTOR              0xFFFFFFF7
-#define   S_008C00_DX10_CLAMP(x)                       (((x) & 0x1) << 4)
-#define   G_008C00_DX10_CLAMP(x)                       (((x) >> 4) & 0x1)
-#define   C_008C00_DX10_CLAMP                          0xFFFFFFEF
-#define   S_008C00_ALU_PREFER_ONE_WATERFALL(x)         (((x) & 0x1) << 5)
-#define   G_008C00_ALU_PREFER_ONE_WATERFALL(x)         (((x) >> 5) & 0x1)
-#define   C_008C00_ALU_PREFER_ONE_WATERFALL            0xFFFFFFDF
-#define   S_008C00_ALU_MAX_ONE_WATERFALL(x)            (((x) & 0x1) << 6)
-#define   G_008C00_ALU_MAX_ONE_WATERFALL(x)            (((x) >> 6) & 0x1)
-#define   C_008C00_ALU_MAX_ONE_WATERFALL               0xFFFFFFBF
-#define   S_008C00_CLAUSE_SEQ_PRIO(x)                  (((x) & 0x3) << 8)
-#define   G_008C00_CLAUSE_SEQ_PRIO(x)                  (((x) >> 8) & 0x3)
-#define   C_008C00_CLAUSE_SEQ_PRIO                     0xFFFFFCFF
-#define   S_008C00_PS_PRIO(x)                          (((x) & 0x3) << 24)
-#define   G_008C00_PS_PRIO(x)                          (((x) >> 24) & 0x3)
-#define   C_008C00_PS_PRIO                             0xFCFFFFFF
-#define   S_008C00_VS_PRIO(x)                          (((x) & 0x3) << 26)
-#define   G_008C00_VS_PRIO(x)                          (((x) >> 26) & 0x3)
-#define   C_008C00_VS_PRIO                             0xF3FFFFFF
-#define   S_008C00_GS_PRIO(x)                          (((x) & 0x3) << 28)
-#define   G_008C00_GS_PRIO(x)                          (((x) >> 28) & 0x3)
-#define   C_008C00_GS_PRIO                             0xCFFFFFFF
-#define   S_008C00_ES_PRIO(x)                          (((x) & 0x3) << 30)
-#define   G_008C00_ES_PRIO(x)                          (((x) >> 30) & 0x3)
-#define   C_008C00_ES_PRIO                             0x3FFFFFFF
-#define R_008C04_SQ_GPR_RESOURCE_MGMT_1              0x008C04
-#define   S_008C04_NUM_PS_GPRS(x)                      (((x) & 0xFF) << 0)
-#define   G_008C04_NUM_PS_GPRS(x)                      (((x) >> 0) & 0xFF)
-#define   C_008C04_NUM_PS_GPRS                         0xFFFFFF00
-#define   S_008C04_NUM_VS_GPRS(x)                      (((x) & 0xFF) << 16)
-#define   G_008C04_NUM_VS_GPRS(x)                      (((x) >> 16) & 0xFF)
-#define   C_008C04_NUM_VS_GPRS                         0xFF00FFFF
-#define   S_008C04_NUM_CLAUSE_TEMP_GPRS(x)             (((x) & 0xF) << 28)
-#define   G_008C04_NUM_CLAUSE_TEMP_GPRS(x)             (((x) >> 28) & 0xF)
-#define   C_008C04_NUM_CLAUSE_TEMP_GPRS                0x0FFFFFFF
-#define R_008C08_SQ_GPR_RESOURCE_MGMT_2              0x008C08
-#define   S_008C08_NUM_GS_GPRS(x)                      (((x) & 0xFF) << 0)
-#define   G_008C08_NUM_GS_GPRS(x)                      (((x) >> 0) & 0xFF)
-#define   C_008C08_NUM_GS_GPRS                         0xFFFFFF00
-#define   S_008C08_NUM_ES_GPRS(x)                      (((x) & 0xFF) << 16)
-#define   G_008C08_NUM_ES_GPRS(x)                      (((x) >> 16) & 0xFF)
-#define   C_008C08_NUM_ES_GPRS                         0xFF00FFFF
-#define R_008C0C_SQ_THREAD_RESOURCE_MGMT             0x008C0C
-#define   S_008C0C_NUM_PS_THREADS(x)                   (((x) & 0xFF) << 0)
-#define   G_008C0C_NUM_PS_THREADS(x)                   (((x) >> 0) & 0xFF)
-#define   C_008C0C_NUM_PS_THREADS                      0xFFFFFF00
-#define   S_008C0C_NUM_VS_THREADS(x)                   (((x) & 0xFF) << 8)
-#define   G_008C0C_NUM_VS_THREADS(x)                   (((x) >> 8) & 0xFF)
-#define   C_008C0C_NUM_VS_THREADS                      0xFFFF00FF
-#define   S_008C0C_NUM_GS_THREADS(x)                   (((x) & 0xFF) << 16)
-#define   G_008C0C_NUM_GS_THREADS(x)                   (((x) >> 16) & 0xFF)
-#define   C_008C0C_NUM_GS_THREADS                      0xFF00FFFF
-#define   S_008C0C_NUM_ES_THREADS(x)                   (((x) & 0xFF) << 24)
-#define   G_008C0C_NUM_ES_THREADS(x)                   (((x) >> 24) & 0xFF)
-#define   C_008C0C_NUM_ES_THREADS                      0x00FFFFFF
-#define R_008C10_SQ_STACK_RESOURCE_MGMT_1            0x008C10
-#define   S_008C10_NUM_PS_STACK_ENTRIES(x)             (((x) & 0xFFF) << 0)
-#define   G_008C10_NUM_PS_STACK_ENTRIES(x)             (((x) >> 0) & 0xFFF)
-#define   C_008C10_NUM_PS_STACK_ENTRIES                0xFFFFF000
-#define   S_008C10_NUM_VS_STACK_ENTRIES(x)             (((x) & 0xFFF) << 16)
-#define   G_008C10_NUM_VS_STACK_ENTRIES(x)             (((x) >> 16) & 0xFFF)
-#define   C_008C10_NUM_VS_STACK_ENTRIES                0xF000FFFF
-#define R_008C14_SQ_STACK_RESOURCE_MGMT_2            0x008C14
-#define   S_008C14_NUM_GS_STACK_ENTRIES(x)             (((x) & 0xFFF) << 0)
-#define   G_008C14_NUM_GS_STACK_ENTRIES(x)             (((x) >> 0) & 0xFFF)
-#define   C_008C14_NUM_GS_STACK_ENTRIES                0xFFFFF000
-#define   S_008C14_NUM_ES_STACK_ENTRIES(x)             (((x) & 0xFFF) << 16)
-#define   G_008C14_NUM_ES_STACK_ENTRIES(x)             (((x) >> 16) & 0xFFF)
-#define   C_008C14_NUM_ES_STACK_ENTRIES                0xF000FFFF
-#define R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ        0x008D8C
-#define   S_008D8C_RING0_OFFSET(x)                     (((x) & 0xFF) << 0)
-#define   G_008D8C_RING0_OFFSET(x)                     (((x) >> 0) & 0xFF)
-#define   C_008D8C_RING0_OFFSET                        0xFFFFFF00
-#define   S_008D8C_ISOLATE_ES_ENABLE(x)                (((x) & 0x1) << 12)
-#define   G_008D8C_ISOLATE_ES_ENABLE(x)                (((x) >> 12) & 0x1)
-#define   C_008D8C_ISOLATE_ES_ENABLE                   0xFFFFEFFF
-#define   S_008D8C_ISOLATE_GS_ENABLE(x)                (((x) & 0x1) << 13)
-#define   G_008D8C_ISOLATE_GS_ENABLE(x)                (((x) >> 13) & 0x1)
-#define   C_008D8C_ISOLATE_GS_ENABLE                   0xFFFFDFFF
-#define   S_008D8C_VS_PC_LIMIT_ENABLE(x)               (((x) & 0x1) << 14)
-#define   G_008D8C_VS_PC_LIMIT_ENABLE(x)               (((x) >> 14) & 0x1)
-#define   C_008D8C_VS_PC_LIMIT_ENABLE                  0xFFFFBFFF
-#define R_009508_TA_CNTL_AUX                         0x009508
-#define   S_009508_DISABLE_CUBE_WRAP(x)                (((x) & 0x1) << 0)
-#define   G_009508_DISABLE_CUBE_WRAP(x)                (((x) >> 0) & 0x1)
-#define   C_009508_DISABLE_CUBE_WRAP                   0xFFFFFFFE
-#define   S_009508_SYNC_GRADIENT(x)                    (((x) & 0x1) << 24)
-#define   G_009508_SYNC_GRADIENT(x)                    (((x) >> 24) & 0x1)
-#define   C_009508_SYNC_GRADIENT                       0xFEFFFFFF
-#define   S_009508_SYNC_WALKER(x)                      (((x) & 0x1) << 25)
-#define   G_009508_SYNC_WALKER(x)                      (((x) >> 25) & 0x1)
-#define   C_009508_SYNC_WALKER                         0xFDFFFFFF
-#define   S_009508_SYNC_ALIGNER(x)                     (((x) & 0x1) << 26)
-#define   G_009508_SYNC_ALIGNER(x)                     (((x) >> 26) & 0x1)
-#define   C_009508_SYNC_ALIGNER                        0xFBFFFFFF
-#define   S_009508_BILINEAR_PRECISION(x)               (((x) & 0x1) << 31)
-#define   G_009508_BILINEAR_PRECISION(x)               (((x) >> 31) & 0x1)
-#define   C_009508_BILINEAR_PRECISION                  0x7FFFFFFF
-#define R_009714_VC_ENHANCE                          0x009714
-#define R_009830_DB_DEBUG                            0x009830
-#define R_009838_DB_WATERMARKS                       0x009838
-#define   S_009838_DEPTH_FREE(x)                       (((x) & 0x1F) << 0)
-#define   G_009838_DEPTH_FREE(x)                       (((x) >> 0) & 0x1F)
-#define   C_009838_DEPTH_FREE                          0xFFFFFFE0
-#define   S_009838_DEPTH_FLUSH(x)                      (((x) & 0x3F) << 5)
-#define   G_009838_DEPTH_FLUSH(x)                      (((x) >> 5) & 0x3F)
-#define   C_009838_DEPTH_FLUSH                         0xFFFFF81F
-#define   S_009838_FORCE_SUMMARIZE(x)                  (((x) & 0xF) << 11)
-#define   G_009838_FORCE_SUMMARIZE(x)                  (((x) >> 11) & 0xF)
-#define   C_009838_FORCE_SUMMARIZE                     0xFFFF87FF
-#define   S_009838_DEPTH_PENDING_FREE(x)               (((x) & 0x1F) << 15)
-#define   G_009838_DEPTH_PENDING_FREE(x)               (((x) >> 15) & 0x1F)
-#define   C_009838_DEPTH_PENDING_FREE                  0xFFF07FFF
-#define   S_009838_DEPTH_CACHELINE_FREE(x)             (((x) & 0x1F) << 20)
-#define   G_009838_DEPTH_CACHELINE_FREE(x)             (((x) >> 20) & 0x1F)
-#define   C_009838_DEPTH_CACHELINE_FREE                0xFE0FFFFF
-#define   S_009838_EARLY_Z_PANIC_DISABLE(x)            (((x) & 0x1) << 25)
-#define   G_009838_EARLY_Z_PANIC_DISABLE(x)            (((x) >> 25) & 0x1)
-#define   C_009838_EARLY_Z_PANIC_DISABLE               0xFDFFFFFF
-#define   S_009838_LATE_Z_PANIC_DISABLE(x)             (((x) & 0x1) << 26)
-#define   G_009838_LATE_Z_PANIC_DISABLE(x)             (((x) >> 26) & 0x1)
-#define   C_009838_LATE_Z_PANIC_DISABLE                0xFBFFFFFF
-#define   S_009838_RE_Z_PANIC_DISABLE(x)               (((x) & 0x1) << 27)
-#define   G_009838_RE_Z_PANIC_DISABLE(x)               (((x) >> 27) & 0x1)
-#define   C_009838_RE_Z_PANIC_DISABLE                  0xF7FFFFFF
-#define   S_009838_DB_EXTRA_DEBUG(x)                   (((x) & 0xF) << 28)
-#define   G_009838_DB_EXTRA_DEBUG(x)                   (((x) >> 28) & 0xF)
-#define   C_009838_DB_EXTRA_DEBUG                      0x0FFFFFFF
-#define R_028030_PA_SC_SCREEN_SCISSOR_TL             0x028030
-#define   S_028030_TL_X(x)                             (((x) & 0x7FFF) << 0)
-#define   G_028030_TL_X(x)                             (((x) >> 0) & 0x7FFF)
-#define   C_028030_TL_X                                0xFFFF8000
-#define   S_028030_TL_Y(x)                             (((x) & 0x7FFF) << 16)
-#define   G_028030_TL_Y(x)                             (((x) >> 16) & 0x7FFF)
-#define   C_028030_TL_Y                                0x8000FFFF
-#define R_028034_PA_SC_SCREEN_SCISSOR_BR             0x028034
-#define   S_028034_BR_X(x)                             (((x) & 0x7FFF) << 0)
-#define   G_028034_BR_X(x)                             (((x) >> 0) & 0x7FFF)
-#define   C_028034_BR_X                                0xFFFF8000
-#define   S_028034_BR_Y(x)                             (((x) & 0x7FFF) << 16)
-#define   G_028034_BR_Y(x)                             (((x) >> 16) & 0x7FFF)
-#define   C_028034_BR_Y                                0x8000FFFF
-#define R_028200_PA_SC_WINDOW_OFFSET                 0x028200
-#define   S_028200_WINDOW_X_OFFSET(x)                  (((x) & 0x7FFF) << 0)
-#define   G_028200_WINDOW_X_OFFSET(x)                  (((x) >> 0) & 0x7FFF)
-#define   C_028200_WINDOW_X_OFFSET                     0xFFFF8000
-#define   S_028200_WINDOW_Y_OFFSET(x)                  (((x) & 0x7FFF) << 16)
-#define   G_028200_WINDOW_Y_OFFSET(x)                  (((x) >> 16) & 0x7FFF)
-#define   C_028200_WINDOW_Y_OFFSET                     0x8000FFFF
-#define R_028204_PA_SC_WINDOW_SCISSOR_TL             0x028204
-#define   S_028204_TL_X(x)                             (((x) & 0x3FFF) << 0)
-#define   G_028204_TL_X(x)                             (((x) >> 0) & 0x3FFF)
-#define   C_028204_TL_X                                0xFFFFC000
-#define   S_028204_TL_Y(x)                             (((x) & 0x3FFF) << 16)
-#define   G_028204_TL_Y(x)                             (((x) >> 16) & 0x3FFF)
-#define   C_028204_TL_Y                                0xC000FFFF
-#define   S_028204_WINDOW_OFFSET_DISABLE(x)            (((x) & 0x1) << 31)
-#define   G_028204_WINDOW_OFFSET_DISABLE(x)            (((x) >> 31) & 0x1)
-#define   C_028204_WINDOW_OFFSET_DISABLE               0x7FFFFFFF
-#define R_028208_PA_SC_WINDOW_SCISSOR_BR             0x028208
-#define   S_028208_BR_X(x)                             (((x) & 0x3FFF) << 0)
-#define   G_028208_BR_X(x)                             (((x) >> 0) & 0x3FFF)
-#define   C_028208_BR_X                                0xFFFFC000
-#define   S_028208_BR_Y(x)                             (((x) & 0x3FFF) << 16)
-#define   G_028208_BR_Y(x)                             (((x) >> 16) & 0x3FFF)
-#define   C_028208_BR_Y                                0xC000FFFF
-#define R_02820C_PA_SC_CLIPRECT_RULE                 0x02820C
-#define   S_02820C_CLIP_RULE(x)                        (((x) & 0xFFFF) << 0)
-#define   G_02820C_CLIP_RULE(x)                        (((x) >> 0) & 0xFFFF)
-#define   C_02820C_CLIP_RULE                           0xFFFF0000
-#define R_028210_PA_SC_CLIPRECT_0_TL                 0x028210
-#define   S_028210_TL_X(x)                             (((x) & 0x3FFF) << 0)
-#define   G_028210_TL_X(x)                             (((x) >> 0) & 0x3FFF)
-#define   C_028210_TL_X                                0xFFFFC000
-#define   S_028210_TL_Y(x)                             (((x) & 0x3FFF) << 16)
-#define   G_028210_TL_Y(x)                             (((x) >> 16) & 0x3FFF)
-#define   C_028210_TL_Y                                0xC000FFFF
-#define R_028214_PA_SC_CLIPRECT_0_BR                 0x028214
-#define   S_028214_BR_X(x)                             (((x) & 0x3FFF) << 0)
-#define   G_028214_BR_X(x)                             (((x) >> 0) & 0x3FFF)
-#define   C_028214_BR_X                                0xFFFFC000
-#define   S_028214_BR_Y(x)                             (((x) & 0x3FFF) << 16)
-#define   G_028214_BR_Y(x)                             (((x) >> 16) & 0x3FFF)
-#define   C_028214_BR_Y                                0xC000FFFF
-#define R_028218_PA_SC_CLIPRECT_1_TL                 0x028218
-#define R_02821C_PA_SC_CLIPRECT_1_BR                 0x02821C
-#define R_028220_PA_SC_CLIPRECT_2_TL                 0x028220
-#define R_028224_PA_SC_CLIPRECT_2_BR                 0x028224
-#define R_028228_PA_SC_CLIPRECT_3_TL                 0x028228
-#define R_02822C_PA_SC_CLIPRECT_3_BR                 0x02822C
-#define R_028230_PA_SC_EDGERULE                      0x028230
-#define R_028240_PA_SC_GENERIC_SCISSOR_TL            0x028240
-#define   S_028240_TL_X(x)                             (((x) & 0x3FFF) << 0)
-#define   G_028240_TL_X(x)                             (((x) >> 0) & 0x3FFF)
-#define   C_028240_TL_X                                0xFFFFC000
-#define   S_028240_TL_Y(x)                             (((x) & 0x3FFF) << 16)
-#define   G_028240_TL_Y(x)                             (((x) >> 16) & 0x3FFF)
-#define   C_028240_TL_Y                                0xC000FFFF
-#define   S_028240_WINDOW_OFFSET_DISABLE(x)            (((x) & 0x1) << 31)
-#define   G_028240_WINDOW_OFFSET_DISABLE(x)            (((x) >> 31) & 0x1)
-#define   C_028240_WINDOW_OFFSET_DISABLE               0x7FFFFFFF
-#define R_028244_PA_SC_GENERIC_SCISSOR_BR            0x028244
-#define   S_028244_BR_X(x)                             (((x) & 0x3FFF) << 0)
-#define   G_028244_BR_X(x)                             (((x) >> 0) & 0x3FFF)
-#define   C_028244_BR_X                                0xFFFFC000
-#define   S_028244_BR_Y(x)                             (((x) & 0x3FFF) << 16)
-#define   G_028244_BR_Y(x)                             (((x) >> 16) & 0x3FFF)
-#define   C_028244_BR_Y                                0xC000FFFF
-#define R_0282D0_PA_SC_VPORT_ZMIN_0                  0x0282D0
-#define   S_0282D0_VPORT_ZMIN(x)                       (((x) & 0xFFFFFFFF) << 0)
-#define   G_0282D0_VPORT_ZMIN(x)                       (((x) >> 0) & 0xFFFFFFFF)
-#define   C_0282D0_VPORT_ZMIN                          0x00000000
-#define R_0282D4_PA_SC_VPORT_ZMAX_0                  0x0282D4
-#define   S_0282D4_VPORT_ZMAX(x)                       (((x) & 0xFFFFFFFF) << 0)
-#define   G_0282D4_VPORT_ZMAX(x)                       (((x) >> 0) & 0xFFFFFFFF)
-#define   C_0282D4_VPORT_ZMAX                          0x00000000
-#define R_028350_SX_MISC                             0x028350
-#define   S_028350_MULTIPASS(x)                        (((x) & 0x1) << 0)
-#define   G_028350_MULTIPASS(x)                        (((x) >> 0) & 0x1)
-#define   C_028350_MULTIPASS                           0xFFFFFFFE
-#define R_028380_SQ_VTX_SEMANTIC_0                   0x028380
-#define   S_028380_SEMANTIC_ID(x)                      (((x) & 0xFF) << 0)
-#define   G_028380_SEMANTIC_ID(x)                      (((x) >> 0) & 0xFF)
-#define   C_028380_SEMANTIC_ID                         0xFFFFFF00
-#define R_028384_SQ_VTX_SEMANTIC_1                   0x028384
-#define R_028388_SQ_VTX_SEMANTIC_2                   0x028388
-#define R_02838C_SQ_VTX_SEMANTIC_3                   0x02838C
-#define R_028390_SQ_VTX_SEMANTIC_4                   0x028390
-#define R_028394_SQ_VTX_SEMANTIC_5                   0x028394
-#define R_028398_SQ_VTX_SEMANTIC_6                   0x028398
-#define R_02839C_SQ_VTX_SEMANTIC_7                   0x02839C
-#define R_0283A0_SQ_VTX_SEMANTIC_8                   0x0283A0
-#define R_0283A4_SQ_VTX_SEMANTIC_9                   0x0283A4
-#define R_0283A8_SQ_VTX_SEMANTIC_10                  0x0283A8
-#define R_0283AC_SQ_VTX_SEMANTIC_11                  0x0283AC
-#define R_0283B0_SQ_VTX_SEMANTIC_12                  0x0283B0
-#define R_0283B4_SQ_VTX_SEMANTIC_13                  0x0283B4
-#define R_0283B8_SQ_VTX_SEMANTIC_14                  0x0283B8
-#define R_0283BC_SQ_VTX_SEMANTIC_15                  0x0283BC
-#define R_0283C0_SQ_VTX_SEMANTIC_16                  0x0283C0
-#define R_0283C4_SQ_VTX_SEMANTIC_17                  0x0283C4
-#define R_0283C8_SQ_VTX_SEMANTIC_18                  0x0283C8
-#define R_0283CC_SQ_VTX_SEMANTIC_19                  0x0283CC
-#define R_0283D0_SQ_VTX_SEMANTIC_20                  0x0283D0
-#define R_0283D4_SQ_VTX_SEMANTIC_21                  0x0283D4
-#define R_0283D8_SQ_VTX_SEMANTIC_22                  0x0283D8
-#define R_0283DC_SQ_VTX_SEMANTIC_23                  0x0283DC
-#define R_0283E0_SQ_VTX_SEMANTIC_24                  0x0283E0
-#define R_0283E4_SQ_VTX_SEMANTIC_25                  0x0283E4
-#define R_0283E8_SQ_VTX_SEMANTIC_26                  0x0283E8
-#define R_0283EC_SQ_VTX_SEMANTIC_27                  0x0283EC
-#define R_0283F0_SQ_VTX_SEMANTIC_28                  0x0283F0
-#define R_0283F4_SQ_VTX_SEMANTIC_29                  0x0283F4
-#define R_0283F8_SQ_VTX_SEMANTIC_30                  0x0283F8
-#define R_0283FC_SQ_VTX_SEMANTIC_31                  0x0283FC
-#define R_028400_VGT_MAX_VTX_INDX                    0x028400
-#define   S_028400_MAX_INDX(x)                         (((x) & 0xFFFFFFFF) << 0)
-#define   G_028400_MAX_INDX(x)                         (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028400_MAX_INDX                            0x00000000
-#define R_028404_VGT_MIN_VTX_INDX                    0x028404
-#define   S_028404_MIN_INDX(x)                         (((x) & 0xFFFFFFFF) << 0)
-#define   G_028404_MIN_INDX(x)                         (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028404_MIN_INDX                            0x00000000
-#define R_028408_VGT_INDX_OFFSET                     0x028408
-#define   S_028408_INDX_OFFSET(x)                      (((x) & 0xFFFFFFFF) << 0)
-#define   G_028408_INDX_OFFSET(x)                      (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028408_INDX_OFFSET                         0x00000000
-#define R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX        0x02840C
-#define   S_02840C_RESET_INDX(x)                       (((x) & 0xFFFFFFFF) << 0)
-#define   G_02840C_RESET_INDX(x)                       (((x) >> 0) & 0xFFFFFFFF)
-#define   C_02840C_RESET_INDX                          0x00000000
-#define R_028410_SX_ALPHA_TEST_CONTROL               0x028410
-#define   S_028410_ALPHA_FUNC(x)                       (((x) & 0x7) << 0)
-#define   G_028410_ALPHA_FUNC(x)                       (((x) >> 0) & 0x7)
-#define   C_028410_ALPHA_FUNC                          0xFFFFFFF8
-#define   S_028410_ALPHA_TEST_ENABLE(x)                (((x) & 0x1) << 3)
-#define   G_028410_ALPHA_TEST_ENABLE(x)                (((x) >> 3) & 0x1)
-#define   C_028410_ALPHA_TEST_ENABLE                   0xFFFFFFF7
-#define   S_028410_ALPHA_TEST_BYPASS(x)                (((x) & 0x1) << 8)
-#define   G_028410_ALPHA_TEST_BYPASS(x)                (((x) >> 8) & 0x1)
-#define   C_028410_ALPHA_TEST_BYPASS                   0xFFFFFEFF
-#define R_028414_CB_BLEND_RED                        0x028414
-#define   S_028414_BLEND_RED(x)                        (((x) & 0xFFFFFFFF) << 0)
-#define   G_028414_BLEND_RED(x)                        (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028414_BLEND_RED                           0x00000000
-#define R_028418_CB_BLEND_GREEN                      0x028418
-#define   S_028418_BLEND_GREEN(x)                      (((x) & 0xFFFFFFFF) << 0)
-#define   G_028418_BLEND_GREEN(x)                      (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028418_BLEND_GREEN                         0x00000000
-#define R_02841C_CB_BLEND_BLUE                       0x02841C
-#define   S_02841C_BLEND_BLUE(x)                       (((x) & 0xFFFFFFFF) << 0)
-#define   G_02841C_BLEND_BLUE(x)                       (((x) >> 0) & 0xFFFFFFFF)
-#define   C_02841C_BLEND_BLUE                          0x00000000
-#define R_028420_CB_BLEND_ALPHA                      0x028420
-#define   S_028420_BLEND_ALPHA(x)                      (((x) & 0xFFFFFFFF) << 0)
-#define   G_028420_BLEND_ALPHA(x)                      (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028420_BLEND_ALPHA                         0x00000000
-#define R_028438_SX_ALPHA_REF                        0x028438
-#define   S_028438_ALPHA_REF(x)                        (((x) & 0xFFFFFFFF) << 0)
-#define   G_028438_ALPHA_REF(x)                        (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028438_ALPHA_REF                           0x00000000
-#define R_0286C8_SPI_THREAD_GROUPING                 0x0286C8
-#define   S_0286C8_PS_GROUPING(x)                      (((x) & 0x1F) << 0)
-#define   G_0286C8_PS_GROUPING(x)                      (((x) >> 0) & 0x1F)
-#define   C_0286C8_PS_GROUPING                         0xFFFFFFE0
-#define   S_0286C8_VS_GROUPING(x)                      (((x) & 0x1F) << 8)
-#define   G_0286C8_VS_GROUPING(x)                      (((x) >> 8) & 0x1F)
-#define   C_0286C8_VS_GROUPING                         0xFFFFE0FF
-#define   S_0286C8_GS_GROUPING(x)                      (((x) & 0x1F) << 16)
-#define   G_0286C8_GS_GROUPING(x)                      (((x) >> 16) & 0x1F)
-#define   C_0286C8_GS_GROUPING                         0xFFE0FFFF
-#define   S_0286C8_ES_GROUPING(x)                      (((x) & 0x1F) << 24)
-#define   G_0286C8_ES_GROUPING(x)                      (((x) >> 24) & 0x1F)
-#define   C_0286C8_ES_GROUPING                         0xE0FFFFFF
-#define R_0286D8_SPI_INPUT_Z                         0x0286D8
-#define   S_0286D8_PROVIDE_Z_TO_SPI(x)                 (((x) & 0x1) << 0)
-#define   G_0286D8_PROVIDE_Z_TO_SPI(x)                 (((x) >> 0) & 0x1)
-#define   C_0286D8_PROVIDE_Z_TO_SPI                    0xFFFFFFFE
-#define R_0286DC_SPI_FOG_CNTL                        0x0286DC
-#define   S_0286DC_PASS_FOG_THROUGH_PS(x)              (((x) & 0x1) << 0)
-#define   G_0286DC_PASS_FOG_THROUGH_PS(x)              (((x) >> 0) & 0x1)
-#define   C_0286DC_PASS_FOG_THROUGH_PS                 0xFFFFFFFE
-#define   S_0286DC_PIXEL_FOG_FUNC(x)                   (((x) & 0x3) << 1)
-#define   G_0286DC_PIXEL_FOG_FUNC(x)                   (((x) >> 1) & 0x3)
-#define   C_0286DC_PIXEL_FOG_FUNC                      0xFFFFFFF9
-#define   S_0286DC_PIXEL_FOG_SRC_SEL(x)                (((x) & 0x1) << 3)
-#define   G_0286DC_PIXEL_FOG_SRC_SEL(x)                (((x) >> 3) & 0x1)
-#define   C_0286DC_PIXEL_FOG_SRC_SEL                   0xFFFFFFF7
-#define   S_0286DC_VS_FOG_CLAMP_DISABLE(x)             (((x) & 0x1) << 4)
-#define   G_0286DC_VS_FOG_CLAMP_DISABLE(x)             (((x) >> 4) & 0x1)
-#define   C_0286DC_VS_FOG_CLAMP_DISABLE                0xFFFFFFEF
-#define R_0286E0_SPI_FOG_FUNC_SCALE                  0x0286E0
-#define   S_0286E0_VALUE(x)                            (((x) & 0xFFFFFFFF) << 0)
-#define   G_0286E0_VALUE(x)                            (((x) >> 0) & 0xFFFFFFFF)
-#define   C_0286E0_VALUE                               0x00000000
-#define R_0286E4_SPI_FOG_FUNC_BIAS                   0x0286E4
-#define   S_0286E4_VALUE(x)                            (((x) & 0xFFFFFFFF) << 0)
-#define   G_0286E4_VALUE(x)                            (((x) >> 0) & 0xFFFFFFFF)
-#define   C_0286E4_VALUE                               0x00000000
-#define R_0287A0_CB_SHADER_CONTROL                   0x0287A0
-#define   S_0287A0_RT0_ENABLE(x)                       (((x) & 0x1) << 0)
-#define   G_0287A0_RT0_ENABLE(x)                       (((x) >> 0) & 0x1)
-#define   C_0287A0_RT0_ENABLE                          0xFFFFFFFE
-#define   S_0287A0_RT1_ENABLE(x)                       (((x) & 0x1) << 1)
-#define   G_0287A0_RT1_ENABLE(x)                       (((x) >> 1) & 0x1)
-#define   C_0287A0_RT1_ENABLE                          0xFFFFFFFD
-#define   S_0287A0_RT2_ENABLE(x)                       (((x) & 0x1) << 2)
-#define   G_0287A0_RT2_ENABLE(x)                       (((x) >> 2) & 0x1)
-#define   C_0287A0_RT2_ENABLE                          0xFFFFFFFB
-#define   S_0287A0_RT3_ENABLE(x)                       (((x) & 0x1) << 3)
-#define   G_0287A0_RT3_ENABLE(x)                       (((x) >> 3) & 0x1)
-#define   C_0287A0_RT3_ENABLE                          0xFFFFFFF7
-#define   S_0287A0_RT4_ENABLE(x)                       (((x) & 0x1) << 4)
-#define   G_0287A0_RT4_ENABLE(x)                       (((x) >> 4) & 0x1)
-#define   C_0287A0_RT4_ENABLE                          0xFFFFFFEF
-#define   S_0287A0_RT5_ENABLE(x)                       (((x) & 0x1) << 5)
-#define   G_0287A0_RT5_ENABLE(x)                       (((x) >> 5) & 0x1)
-#define   C_0287A0_RT5_ENABLE                          0xFFFFFFDF
-#define   S_0287A0_RT6_ENABLE(x)                       (((x) & 0x1) << 6)
-#define   G_0287A0_RT6_ENABLE(x)                       (((x) >> 6) & 0x1)
-#define   C_0287A0_RT6_ENABLE                          0xFFFFFFBF
-#define   S_0287A0_RT7_ENABLE(x)                       (((x) & 0x1) << 7)
-#define   G_0287A0_RT7_ENABLE(x)                       (((x) >> 7) & 0x1)
-#define   C_0287A0_RT7_ENABLE                          0xFFFFFF7F
-#define R_028894_SQ_PGM_START_FS                     0x028894
-#define   S_028894_PGM_START(x)                        (((x) & 0xFFFFFFFF) << 0)
-#define   G_028894_PGM_START(x)                        (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028894_PGM_START                           0x00000000
-#define R_0288A4_SQ_PGM_RESOURCES_FS                 0x0288A4
-#define   S_0288A4_NUM_GPRS(x)                         (((x) & 0xFF) << 0)
-#define   G_0288A4_NUM_GPRS(x)                         (((x) >> 0) & 0xFF)
-#define   C_0288A4_NUM_GPRS                            0xFFFFFF00
-#define   S_0288A4_STACK_SIZE(x)                       (((x) & 0xFF) << 8)
-#define   G_0288A4_STACK_SIZE(x)                       (((x) >> 8) & 0xFF)
-#define   C_0288A4_STACK_SIZE                          0xFFFF00FF
-#define   S_0288A4_DX10_CLAMP(x)                       (((x) & 0x1) << 21)
-#define   G_0288A4_DX10_CLAMP(x)                       (((x) >> 21) & 0x1)
-#define   C_0288A4_DX10_CLAMP                          0xFFDFFFFF
-#define R_0288A8_SQ_ESGS_RING_ITEMSIZE               0x0288A8
-#define   S_0288A8_ITEMSIZE(x)                         (((x) & 0x7FFF) << 0)
-#define   G_0288A8_ITEMSIZE(x)                         (((x) >> 0) & 0x7FFF)
-#define   C_0288A8_ITEMSIZE                            0xFFFF8000
-#define R_0288AC_SQ_GSVS_RING_ITEMSIZE               0x0288AC
-#define   S_0288AC_ITEMSIZE(x)                         (((x) & 0x7FFF) << 0)
-#define   G_0288AC_ITEMSIZE(x)                         (((x) >> 0) & 0x7FFF)
-#define   C_0288AC_ITEMSIZE                            0xFFFF8000
-#define R_0288B0_SQ_ESTMP_RING_ITEMSIZE              0x0288B0
-#define   S_0288B0_ITEMSIZE(x)                         (((x) & 0x7FFF) << 0)
-#define   G_0288B0_ITEMSIZE(x)                         (((x) >> 0) & 0x7FFF)
-#define   C_0288B0_ITEMSIZE                            0xFFFF8000
-#define R_0288B4_SQ_GSTMP_RING_ITEMSIZE              0x0288B4
-#define   S_0288B4_ITEMSIZE(x)                         (((x) & 0x7FFF) << 0)
-#define   G_0288B4_ITEMSIZE(x)                         (((x) >> 0) & 0x7FFF)
-#define   C_0288B4_ITEMSIZE                            0xFFFF8000
-#define R_0288B8_SQ_VSTMP_RING_ITEMSIZE              0x0288B8
-#define   S_0288B8_ITEMSIZE(x)                         (((x) & 0x7FFF) << 0)
-#define   G_0288B8_ITEMSIZE(x)                         (((x) >> 0) & 0x7FFF)
-#define   C_0288B8_ITEMSIZE                            0xFFFF8000
-#define R_0288BC_SQ_PSTMP_RING_ITEMSIZE              0x0288BC
-#define   S_0288BC_ITEMSIZE(x)                         (((x) & 0x7FFF) << 0)
-#define   G_0288BC_ITEMSIZE(x)                         (((x) >> 0) & 0x7FFF)
-#define   C_0288BC_ITEMSIZE                            0xFFFF8000
-#define R_0288C0_SQ_FBUF_RING_ITEMSIZE               0x0288C0
-#define   S_0288C0_ITEMSIZE(x)                         (((x) & 0x7FFF) << 0)
-#define   G_0288C0_ITEMSIZE(x)                         (((x) >> 0) & 0x7FFF)
-#define   C_0288C0_ITEMSIZE                            0xFFFF8000
-#define R_0288C4_SQ_REDUC_RING_ITEMSIZE              0x0288C4
-#define   S_0288C4_ITEMSIZE(x)                         (((x) & 0x7FFF) << 0)
-#define   G_0288C4_ITEMSIZE(x)                         (((x) >> 0) & 0x7FFF)
-#define   C_0288C4_ITEMSIZE                            0xFFFF8000
-#define R_0288C8_SQ_GS_VERT_ITEMSIZE                 0x0288C8
-#define   S_0288C8_ITEMSIZE(x)                         (((x) & 0x7FFF) << 0)
-#define   G_0288C8_ITEMSIZE(x)                         (((x) >> 0) & 0x7FFF)
-#define   C_0288C8_ITEMSIZE                            0xFFFF8000
-#define R_0288DC_SQ_PGM_CF_OFFSET_FS                 0x0288DC
-#define   S_0288DC_PGM_CF_OFFSET(x)                    (((x) & 0xFFFFF) << 0)
-#define   G_0288DC_PGM_CF_OFFSET(x)                    (((x) >> 0) & 0xFFFFF)
-#define   C_0288DC_PGM_CF_OFFSET                       0xFFF00000
-#define R_028A10_VGT_OUTPUT_PATH_CNTL                0x028A10
-#define   S_028A10_PATH_SELECT(x)                      (((x) & 0x3) << 0)
-#define   G_028A10_PATH_SELECT(x)                      (((x) >> 0) & 0x3)
-#define   C_028A10_PATH_SELECT                         0xFFFFFFFC
-#define R_028A14_VGT_HOS_CNTL                        0x028A14
-#define   S_028A14_TESS_MODE(x)                        (((x) & 0x3) << 0)
-#define   G_028A14_TESS_MODE(x)                        (((x) >> 0) & 0x3)
-#define   C_028A14_TESS_MODE                           0xFFFFFFFC
-#define R_028A18_VGT_HOS_MAX_TESS_LEVEL              0x028A18
-#define   S_028A18_MAX_TESS(x)                         (((x) & 0xFFFFFFFF) << 0)
-#define   G_028A18_MAX_TESS(x)                         (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028A18_MAX_TESS                            0x00000000
-#define R_028A1C_VGT_HOS_MIN_TESS_LEVEL              0x028A1C
-#define   S_028A1C_MIN_TESS(x)                         (((x) & 0xFFFFFFFF) << 0)
-#define   G_028A1C_MIN_TESS(x)                         (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028A1C_MIN_TESS                            0x00000000
-#define R_028A20_VGT_HOS_REUSE_DEPTH                 0x028A20
-#define   S_028A20_REUSE_DEPTH(x)                      (((x) & 0xFF) << 0)
-#define   G_028A20_REUSE_DEPTH(x)                      (((x) >> 0) & 0xFF)
-#define   C_028A20_REUSE_DEPTH                         0xFFFFFF00
-#define R_028A24_VGT_GROUP_PRIM_TYPE                 0x028A24
-#define   S_028A24_PRIM_TYPE(x)                        (((x) & 0x1F) << 0)
-#define   G_028A24_PRIM_TYPE(x)                        (((x) >> 0) & 0x1F)
-#define   C_028A24_PRIM_TYPE                           0xFFFFFFE0
-#define   S_028A24_RETAIN_ORDER(x)                     (((x) & 0x1) << 14)
-#define   G_028A24_RETAIN_ORDER(x)                     (((x) >> 14) & 0x1)
-#define   C_028A24_RETAIN_ORDER                        0xFFFFBFFF
-#define   S_028A24_RETAIN_QUADS(x)                     (((x) & 0x1) << 15)
-#define   G_028A24_RETAIN_QUADS(x)                     (((x) >> 15) & 0x1)
-#define   C_028A24_RETAIN_QUADS                        0xFFFF7FFF
-#define   S_028A24_PRIM_ORDER(x)                       (((x) & 0x7) << 16)
-#define   G_028A24_PRIM_ORDER(x)                       (((x) >> 16) & 0x7)
-#define   C_028A24_PRIM_ORDER                          0xFFF8FFFF
-#define R_028A28_VGT_GROUP_FIRST_DECR                0x028A28
-#define   S_028A28_FIRST_DECR(x)                       (((x) & 0xF) << 0)
-#define   G_028A28_FIRST_DECR(x)                       (((x) >> 0) & 0xF)
-#define   C_028A28_FIRST_DECR                          0xFFFFFFF0
-#define R_028A2C_VGT_GROUP_DECR                      0x028A2C
-#define   S_028A2C_DECR(x)                             (((x) & 0xF) << 0)
-#define   G_028A2C_DECR(x)                             (((x) >> 0) & 0xF)
-#define   C_028A2C_DECR                                0xFFFFFFF0
-#define R_028A30_VGT_GROUP_VECT_0_CNTL               0x028A30
-#define   S_028A30_COMP_X_EN(x)                        (((x) & 0x1) << 0)
-#define   G_028A30_COMP_X_EN(x)                        (((x) >> 0) & 0x1)
-#define   C_028A30_COMP_X_EN                           0xFFFFFFFE
-#define   S_028A30_COMP_Y_EN(x)                        (((x) & 0x1) << 1)
-#define   G_028A30_COMP_Y_EN(x)                        (((x) >> 1) & 0x1)
-#define   C_028A30_COMP_Y_EN                           0xFFFFFFFD
-#define   S_028A30_COMP_Z_EN(x)                        (((x) & 0x1) << 2)
-#define   G_028A30_COMP_Z_EN(x)                        (((x) >> 2) & 0x1)
-#define   C_028A30_COMP_Z_EN                           0xFFFFFFFB
-#define   S_028A30_COMP_W_EN(x)                        (((x) & 0x1) << 3)
-#define   G_028A30_COMP_W_EN(x)                        (((x) >> 3) & 0x1)
-#define   C_028A30_COMP_W_EN                           0xFFFFFFF7
-#define   S_028A30_STRIDE(x)                           (((x) & 0xFF) << 8)
-#define   G_028A30_STRIDE(x)                           (((x) >> 8) & 0xFF)
-#define   C_028A30_STRIDE                              0xFFFF00FF
-#define   S_028A30_SHIFT(x)                            (((x) & 0xFF) << 16)
-#define   G_028A30_SHIFT(x)                            (((x) >> 16) & 0xFF)
-#define   C_028A30_SHIFT                               0xFF00FFFF
-#define R_028A34_VGT_GROUP_VECT_1_CNTL               0x028A34
-#define   S_028A34_COMP_X_EN(x)                        (((x) & 0x1) << 0)
-#define   G_028A34_COMP_X_EN(x)                        (((x) >> 0) & 0x1)
-#define   C_028A34_COMP_X_EN                           0xFFFFFFFE
-#define   S_028A34_COMP_Y_EN(x)                        (((x) & 0x1) << 1)
-#define   G_028A34_COMP_Y_EN(x)                        (((x) >> 1) & 0x1)
-#define   C_028A34_COMP_Y_EN                           0xFFFFFFFD
-#define   S_028A34_COMP_Z_EN(x)                        (((x) & 0x1) << 2)
-#define   G_028A34_COMP_Z_EN(x)                        (((x) >> 2) & 0x1)
-#define   C_028A34_COMP_Z_EN                           0xFFFFFFFB
-#define   S_028A34_COMP_W_EN(x)                        (((x) & 0x1) << 3)
-#define   G_028A34_COMP_W_EN(x)                        (((x) >> 3) & 0x1)
-#define   C_028A34_COMP_W_EN                           0xFFFFFFF7
-#define   S_028A34_STRIDE(x)                           (((x) & 0xFF) << 8)
-#define   G_028A34_STRIDE(x)                           (((x) >> 8) & 0xFF)
-#define   C_028A34_STRIDE                              0xFFFF00FF
-#define   S_028A34_SHIFT(x)                            (((x) & 0xFF) << 16)
-#define   G_028A34_SHIFT(x)                            (((x) >> 16) & 0xFF)
-#define   C_028A34_SHIFT                               0xFF00FFFF
-#define R_028A38_VGT_GROUP_VECT_0_FMT_CNTL           0x028A38
-#define   S_028A38_X_CONV(x)                           (((x) & 0xF) << 0)
-#define   G_028A38_X_CONV(x)                           (((x) >> 0) & 0xF)
-#define   C_028A38_X_CONV                              0xFFFFFFF0
-#define   S_028A38_X_OFFSET(x)                         (((x) & 0xF) << 4)
-#define   G_028A38_X_OFFSET(x)                         (((x) >> 4) & 0xF)
-#define   C_028A38_X_OFFSET                            0xFFFFFF0F
-#define   S_028A38_Y_CONV(x)                           (((x) & 0xF) << 8)
-#define   G_028A38_Y_CONV(x)                           (((x) >> 8) & 0xF)
-#define   C_028A38_Y_CONV                              0xFFFFF0FF
-#define   S_028A38_Y_OFFSET(x)                         (((x) & 0xF) << 12)
-#define   G_028A38_Y_OFFSET(x)                         (((x) >> 12) & 0xF)
-#define   C_028A38_Y_OFFSET                            0xFFFF0FFF
-#define   S_028A38_Z_CONV(x)                           (((x) & 0xF) << 16)
-#define   G_028A38_Z_CONV(x)                           (((x) >> 16) & 0xF)
-#define   C_028A38_Z_CONV                              0xFFF0FFFF
-#define   S_028A38_Z_OFFSET(x)                         (((x) & 0xF) << 20)
-#define   G_028A38_Z_OFFSET(x)                         (((x) >> 20) & 0xF)
-#define   C_028A38_Z_OFFSET                            0xFF0FFFFF
-#define   S_028A38_W_CONV(x)                           (((x) & 0xF) << 24)
-#define   G_028A38_W_CONV(x)                           (((x) >> 24) & 0xF)
-#define   C_028A38_W_CONV                              0xF0FFFFFF
-#define   S_028A38_W_OFFSET(x)                         (((x) & 0xF) << 28)
-#define   G_028A38_W_OFFSET(x)                         (((x) >> 28) & 0xF)
-#define   C_028A38_W_OFFSET                            0x0FFFFFFF
-#define R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL           0x028A3C
-#define   S_028A3C_X_CONV(x)                           (((x) & 0xF) << 0)
-#define   G_028A3C_X_CONV(x)                           (((x) >> 0) & 0xF)
-#define   C_028A3C_X_CONV                              0xFFFFFFF0
-#define   S_028A3C_X_OFFSET(x)                         (((x) & 0xF) << 4)
-#define   G_028A3C_X_OFFSET(x)                         (((x) >> 4) & 0xF)
-#define   C_028A3C_X_OFFSET                            0xFFFFFF0F
-#define   S_028A3C_Y_CONV(x)                           (((x) & 0xF) << 8)
-#define   G_028A3C_Y_CONV(x)                           (((x) >> 8) & 0xF)
-#define   C_028A3C_Y_CONV                              0xFFFFF0FF
-#define   S_028A3C_Y_OFFSET(x)                         (((x) & 0xF) << 12)
-#define   G_028A3C_Y_OFFSET(x)                         (((x) >> 12) & 0xF)
-#define   C_028A3C_Y_OFFSET                            0xFFFF0FFF
-#define   S_028A3C_Z_CONV(x)                           (((x) & 0xF) << 16)
-#define   G_028A3C_Z_CONV(x)                           (((x) >> 16) & 0xF)
-#define   C_028A3C_Z_CONV                              0xFFF0FFFF
-#define   S_028A3C_Z_OFFSET(x)                         (((x) & 0xF) << 20)
-#define   G_028A3C_Z_OFFSET(x)                         (((x) >> 20) & 0xF)
-#define   C_028A3C_Z_OFFSET                            0xFF0FFFFF
-#define   S_028A3C_W_CONV(x)                           (((x) & 0xF) << 24)
-#define   G_028A3C_W_CONV(x)                           (((x) >> 24) & 0xF)
-#define   C_028A3C_W_CONV                              0xF0FFFFFF
-#define   S_028A3C_W_OFFSET(x)                         (((x) & 0xF) << 28)
-#define   G_028A3C_W_OFFSET(x)                         (((x) >> 28) & 0xF)
-#define   C_028A3C_W_OFFSET                            0x0FFFFFFF
-#define R_028A40_VGT_GS_MODE                         0x028A40
-#define   S_028A40_MODE(x)                             (((x) & 0x3) << 0)
-#define   G_028A40_MODE(x)                             (((x) >> 0) & 0x3)
-#define   C_028A40_MODE                                0xFFFFFFFC
-#define   S_028A40_ES_PASSTHRU(x)                      (((x) & 0x1) << 2)
-#define   G_028A40_ES_PASSTHRU(x)                      (((x) >> 2) & 0x1)
-#define   C_028A40_ES_PASSTHRU                         0xFFFFFFFB
-#define   S_028A40_CUT_MODE(x)                         (((x) & 0x3) << 3)
-#define   G_028A40_CUT_MODE(x)                         (((x) >> 3) & 0x3)
-#define   C_028A40_CUT_MODE                            0xFFFFFFE7
-#define R_028A4C_PA_SC_MODE_CNTL                     0x028A4C
-#define   S_028A4C_MSAA_ENABLE(x)                      (((x) & 0x1) << 0)
-#define   G_028A4C_MSAA_ENABLE(x)                      (((x) >> 0) & 0x1)
-#define   C_028A4C_MSAA_ENABLE                         0xFFFFFFFE
-#define   S_028A4C_CLIPRECT_ENABLE(x)                  (((x) & 0x1) << 1)
-#define   G_028A4C_CLIPRECT_ENABLE(x)                  (((x) >> 1) & 0x1)
-#define   C_028A4C_CLIPRECT_ENABLE                     0xFFFFFFFD
-#define   S_028A4C_LINE_STIPPLE_ENABLE(x)              (((x) & 0x1) << 2)
-#define   G_028A4C_LINE_STIPPLE_ENABLE(x)              (((x) >> 2) & 0x1)
-#define   C_028A4C_LINE_STIPPLE_ENABLE                 0xFFFFFFFB
-#define   S_028A4C_MULTI_CHIP_PRIM_DISCARD_ENAB(x)     (((x) & 0x1) << 3)
-#define   G_028A4C_MULTI_CHIP_PRIM_DISCARD_ENAB(x)     (((x) >> 3) & 0x1)
-#define   C_028A4C_MULTI_CHIP_PRIM_DISCARD_ENAB        0xFFFFFFF7
-#define   S_028A4C_WALK_ORDER_ENABLE(x)                (((x) & 0x1) << 4)
-#define   G_028A4C_WALK_ORDER_ENABLE(x)                (((x) >> 4) & 0x1)
-#define   C_028A4C_WALK_ORDER_ENABLE                   0xFFFFFFEF
-#define   S_028A4C_HALVE_DETAIL_SAMPLE_PERF(x)         (((x) & 0x1) << 5)
-#define   G_028A4C_HALVE_DETAIL_SAMPLE_PERF(x)         (((x) >> 5) & 0x1)
-#define   C_028A4C_HALVE_DETAIL_SAMPLE_PERF            0xFFFFFFDF
-#define   S_028A4C_WALK_SIZE(x)                        (((x) & 0x1) << 6)
-#define   G_028A4C_WALK_SIZE(x)                        (((x) >> 6) & 0x1)
-#define   C_028A4C_WALK_SIZE                           0xFFFFFFBF
-#define   S_028A4C_WALK_ALIGNMENT(x)                   (((x) & 0x1) << 7)
-#define   G_028A4C_WALK_ALIGNMENT(x)                   (((x) >> 7) & 0x1)
-#define   C_028A4C_WALK_ALIGNMENT                      0xFFFFFF7F
-#define   S_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x)         (((x) & 0x1) << 8)
-#define   G_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x)         (((x) >> 8) & 0x1)
-#define   C_028A4C_WALK_ALIGN8_PRIM_FITS_ST            0xFFFFFEFF
-#define   S_028A4C_TILE_COVER_NO_SCISSOR(x)            (((x) & 0x1) << 9)
-#define   G_028A4C_TILE_COVER_NO_SCISSOR(x)            (((x) >> 9) & 0x1)
-#define   C_028A4C_TILE_COVER_NO_SCISSOR               0xFFFFFDFF
-#define   S_028A4C_KILL_PIX_POST_HI_Z(x)               (((x) & 0x1) << 10)
-#define   G_028A4C_KILL_PIX_POST_HI_Z(x)               (((x) >> 10) & 0x1)
-#define   C_028A4C_KILL_PIX_POST_HI_Z                  0xFFFFFBFF
-#define   S_028A4C_KILL_PIX_POST_DETAIL_MASK(x)        (((x) & 0x1) << 11)
-#define   G_028A4C_KILL_PIX_POST_DETAIL_MASK(x)        (((x) >> 11) & 0x1)
-#define   C_028A4C_KILL_PIX_POST_DETAIL_MASK           0xFFFFF7FF
-#define   S_028A4C_MULTI_CHIP_SUPERTILE_ENABLE(x)      (((x) & 0x1) << 12)
-#define   G_028A4C_MULTI_CHIP_SUPERTILE_ENABLE(x)      (((x) >> 12) & 0x1)
-#define   C_028A4C_MULTI_CHIP_SUPERTILE_ENABLE         0xFFFFEFFF
-#define   S_028A4C_TILE_COVER_DISABLE(x)               (((x) & 0x1) << 13)
-#define   G_028A4C_TILE_COVER_DISABLE(x)               (((x) >> 13) & 0x1)
-#define   C_028A4C_TILE_COVER_DISABLE                  0xFFFFDFFF
-#define   S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x)          (((x) & 0x1) << 14)
-#define   G_028A4C_FORCE_EOV_CNTDWN_ENABLE(x)          (((x) >> 14) & 0x1)
-#define   C_028A4C_FORCE_EOV_CNTDWN_ENABLE             0xFFFFBFFF
-#define   S_028A4C_FORCE_EOV_TILE_ENABLE(x)            (((x) & 0x1) << 15)
-#define   G_028A4C_FORCE_EOV_TILE_ENABLE(x)            (((x) >> 15) & 0x1)
-#define   C_028A4C_FORCE_EOV_TILE_ENABLE               0xFFFF7FFF
-#define   S_028A4C_FORCE_EOV_REZ_ENABLE(x)             (((x) & 0x1) << 16)
-#define   G_028A4C_FORCE_EOV_REZ_ENABLE(x)             (((x) >> 16) & 0x1)
-#define   C_028A4C_FORCE_EOV_REZ_ENABLE                0xFFFEFFFF
-#define   S_028A4C_PS_ITER_SAMPLE(x)                   (((x) & 0x1) << 17)
-#define   G_028A4C_PS_ITER_SAMPLE(x)                   (((x) >> 17) & 0x1)
-#define   C_028A4C_PS_ITER_SAMPLE                      0xFFFDFFFF
-#define R_028A84_VGT_PRIMITIVEID_EN                  0x028A84
-#define   S_028A84_PRIMITIVEID_EN(x)                   (((x) & 0x1) << 0)
-#define   G_028A84_PRIMITIVEID_EN(x)                   (((x) >> 0) & 0x1)
-#define   C_028A84_PRIMITIVEID_EN                      0xFFFFFFFE
-#define R_028A94_VGT_MULTI_PRIM_IB_RESET_EN          0x028A94
-#define   S_028A94_RESET_EN(x)                         (((x) & 0x1) << 0)
-#define   G_028A94_RESET_EN(x)                         (((x) >> 0) & 0x1)
-#define   C_028A94_RESET_EN                            0xFFFFFFFE
-#define R_028AA0_VGT_INSTANCE_STEP_RATE_0            0x028AA0
-#define   S_028AA0_STEP_RATE(x)                        (((x) & 0xFFFFFFFF) << 0)
-#define   G_028AA0_STEP_RATE(x)                        (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028AA0_STEP_RATE                           0x00000000
-#define R_028AA4_VGT_INSTANCE_STEP_RATE_1            0x028AA4
-#define   S_028AA4_STEP_RATE(x)                        (((x) & 0xFFFFFFFF) << 0)
-#define   G_028AA4_STEP_RATE(x)                        (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028AA4_STEP_RATE                           0x00000000
-#define R_028AB0_VGT_STRMOUT_EN                      0x028AB0
-#define   S_028AB0_STREAMOUT(x)                        (((x) & 0x1) << 0)
-#define   G_028AB0_STREAMOUT(x)                        (((x) >> 0) & 0x1)
-#define   C_028AB0_STREAMOUT                           0xFFFFFFFE
-#define R_028AB4_VGT_REUSE_OFF                       0x028AB4
-#define   S_028AB4_REUSE_OFF(x)                        (((x) & 0x1) << 0)
-#define   G_028AB4_REUSE_OFF(x)                        (((x) >> 0) & 0x1)
-#define   C_028AB4_REUSE_OFF                           0xFFFFFFFE
-#define R_028AB8_VGT_VTX_CNT_EN                      0x028AB8
-#define   S_028AB8_VTX_CNT_EN(x)                       (((x) & 0x1) << 0)
-#define   G_028AB8_VTX_CNT_EN(x)                       (((x) >> 0) & 0x1)
-#define   C_028AB8_VTX_CNT_EN                          0xFFFFFFFE
-#define R_028B20_VGT_STRMOUT_BUFFER_EN               0x028B20
-#define   S_028B20_BUFFER_0_EN(x)                      (((x) & 0x1) << 0)
-#define   G_028B20_BUFFER_0_EN(x)                      (((x) >> 0) & 0x1)
-#define   C_028B20_BUFFER_0_EN                         0xFFFFFFFE
-#define   S_028B20_BUFFER_1_EN(x)                      (((x) & 0x1) << 1)
-#define   G_028B20_BUFFER_1_EN(x)                      (((x) >> 1) & 0x1)
-#define   C_028B20_BUFFER_1_EN                         0xFFFFFFFD
-#define   S_028B20_BUFFER_2_EN(x)                      (((x) & 0x1) << 2)
-#define   G_028B20_BUFFER_2_EN(x)                      (((x) >> 2) & 0x1)
-#define   C_028B20_BUFFER_2_EN                         0xFFFFFFFB
-#define   S_028B20_BUFFER_3_EN(x)                      (((x) & 0x1) << 3)
-#define   G_028B20_BUFFER_3_EN(x)                      (((x) >> 3) & 0x1)
-#define   C_028B20_BUFFER_3_EN                         0xFFFFFFF7
-#define R_028C20_PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX    0x028C20
-#define   S_028C20_S4_X(x)                             (((x) & 0xF) << 0)
-#define   G_028C20_S4_X(x)                             (((x) >> 0) & 0xF)
-#define   C_028C20_S4_X                                0xFFFFFFF0
-#define   S_028C20_S4_Y(x)                             (((x) & 0xF) << 4)
-#define   G_028C20_S4_Y(x)                             (((x) >> 4) & 0xF)
-#define   C_028C20_S4_Y                                0xFFFFFF0F
-#define   S_028C20_S5_X(x)                             (((x) & 0xF) << 8)
-#define   G_028C20_S5_X(x)                             (((x) >> 8) & 0xF)
-#define   C_028C20_S5_X                                0xFFFFF0FF
-#define   S_028C20_S5_Y(x)                             (((x) & 0xF) << 12)
-#define   G_028C20_S5_Y(x)                             (((x) >> 12) & 0xF)
-#define   C_028C20_S5_Y                                0xFFFF0FFF
-#define   S_028C20_S6_X(x)                             (((x) & 0xF) << 16)
-#define   G_028C20_S6_X(x)                             (((x) >> 16) & 0xF)
-#define   C_028C20_S6_X                                0xFFF0FFFF
-#define   S_028C20_S6_Y(x)                             (((x) & 0xF) << 20)
-#define   G_028C20_S6_Y(x)                             (((x) >> 20) & 0xF)
-#define   C_028C20_S6_Y                                0xFF0FFFFF
-#define   S_028C20_S7_X(x)                             (((x) & 0xF) << 24)
-#define   G_028C20_S7_X(x)                             (((x) >> 24) & 0xF)
-#define   C_028C20_S7_X                                0xF0FFFFFF
-#define   S_028C20_S7_Y(x)                             (((x) & 0xF) << 28)
-#define   G_028C20_S7_Y(x)                             (((x) >> 28) & 0xF)
-#define   C_028C20_S7_Y                                0x0FFFFFFF
-#define R_028C30_CB_CLRCMP_CONTROL                   0x028C30
-#define   S_028C30_CLRCMP_FCN_SRC(x)                   (((x) & 0x7) << 0)
-#define   G_028C30_CLRCMP_FCN_SRC(x)                   (((x) >> 0) & 0x7)
-#define   C_028C30_CLRCMP_FCN_SRC                      0xFFFFFFF8
-#define   S_028C30_CLRCMP_FCN_DST(x)                   (((x) & 0x7) << 8)
-#define   G_028C30_CLRCMP_FCN_DST(x)                   (((x) >> 8) & 0x7)
-#define   C_028C30_CLRCMP_FCN_DST                      0xFFFFF8FF
-#define   S_028C30_CLRCMP_FCN_SEL(x)                   (((x) & 0x3) << 24)
-#define   G_028C30_CLRCMP_FCN_SEL(x)                   (((x) >> 24) & 0x3)
-#define   C_028C30_CLRCMP_FCN_SEL                      0xFCFFFFFF
-#define R_028C34_CB_CLRCMP_SRC                       0x028C34
-#define   S_028C34_CLRCMP_SRC(x)                       (((x) & 0xFFFFFFFF) << 0)
-#define   G_028C34_CLRCMP_SRC(x)                       (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028C34_CLRCMP_SRC                          0x00000000
-#define R_028C38_CB_CLRCMP_DST                       0x028C38
-#define   S_028C38_CLRCMP_DST(x)                       (((x) & 0xFFFFFFFF) << 0)
-#define   G_028C38_CLRCMP_DST(x)                       (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028C38_CLRCMP_DST                          0x00000000
-#define R_028C3C_CB_CLRCMP_MSK                       0x028C3C
-#define   S_028C3C_CLRCMP_MSK(x)                       (((x) & 0xFFFFFFFF) << 0)
-#define   G_028C3C_CLRCMP_MSK(x)                       (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028C3C_CLRCMP_MSK                          0x00000000
-#define R_0085F0_CP_COHER_CNTL                       0x0085F0
-#define   S_0085F0_DEST_BASE_0_ENA(x)                  (((x) & 0x1) << 0)
-#define   G_0085F0_DEST_BASE_0_ENA(x)                  (((x) >> 0) & 0x1)
-#define   C_0085F0_DEST_BASE_0_ENA                     0xFFFFFFFE
-#define   S_0085F0_DEST_BASE_1_ENA(x)                  (((x) & 0x1) << 1)
-#define   G_0085F0_DEST_BASE_1_ENA(x)                  (((x) >> 1) & 0x1)
-#define   C_0085F0_DEST_BASE_1_ENA                     0xFFFFFFFD
-#define   S_0085F0_SO0_DEST_BASE_ENA(x)                (((x) & 0x1) << 2)
-#define   G_0085F0_SO0_DEST_BASE_ENA(x)                (((x) >> 2) & 0x1)
-#define   C_0085F0_SO0_DEST_BASE_ENA                   0xFFFFFFFB
-#define   S_0085F0_SO1_DEST_BASE_ENA(x)                (((x) & 0x1) << 3)
-#define   G_0085F0_SO1_DEST_BASE_ENA(x)                (((x) >> 3) & 0x1)
-#define   C_0085F0_SO1_DEST_BASE_ENA                   0xFFFFFFF7
-#define   S_0085F0_SO2_DEST_BASE_ENA(x)                (((x) & 0x1) << 4)
-#define   G_0085F0_SO2_DEST_BASE_ENA(x)                (((x) >> 4) & 0x1)
-#define   C_0085F0_SO2_DEST_BASE_ENA                   0xFFFFFFEF
-#define   S_0085F0_SO3_DEST_BASE_ENA(x)                (((x) & 0x1) << 5)
-#define   G_0085F0_SO3_DEST_BASE_ENA(x)                (((x) >> 5) & 0x1)
-#define   C_0085F0_SO3_DEST_BASE_ENA                   0xFFFFFFDF
-#define   S_0085F0_CB0_DEST_BASE_ENA(x)                (((x) & 0x1) << 6)
-#define   G_0085F0_CB0_DEST_BASE_ENA(x)                (((x) >> 6) & 0x1)
-#define   C_0085F0_CB0_DEST_BASE_ENA                   0xFFFFFFBF
-#define   S_0085F0_CB1_DEST_BASE_ENA(x)                (((x) & 0x1) << 7)
-#define   G_0085F0_CB1_DEST_BASE_ENA(x)                (((x) >> 7) & 0x1)
-#define   C_0085F0_CB1_DEST_BASE_ENA                   0xFFFFFF7F
-#define   S_0085F0_CB2_DEST_BASE_ENA(x)                (((x) & 0x1) << 8)
-#define   G_0085F0_CB2_DEST_BASE_ENA(x)                (((x) >> 8) & 0x1)
-#define   C_0085F0_CB2_DEST_BASE_ENA                   0xFFFFFEFF
-#define   S_0085F0_CB3_DEST_BASE_ENA(x)                (((x) & 0x1) << 9)
-#define   G_0085F0_CB3_DEST_BASE_ENA(x)                (((x) >> 9) & 0x1)
-#define   C_0085F0_CB3_DEST_BASE_ENA                   0xFFFFFDFF
-#define   S_0085F0_CB4_DEST_BASE_ENA(x)                (((x) & 0x1) << 10)
-#define   G_0085F0_CB4_DEST_BASE_ENA(x)                (((x) >> 10) & 0x1)
-#define   C_0085F0_CB4_DEST_BASE_ENA                   0xFFFFFBFF
-#define   S_0085F0_CB5_DEST_BASE_ENA(x)                (((x) & 0x1) << 11)
-#define   G_0085F0_CB5_DEST_BASE_ENA(x)                (((x) >> 11) & 0x1)
-#define   C_0085F0_CB5_DEST_BASE_ENA                   0xFFFFF7FF
-#define   S_0085F0_CB6_DEST_BASE_ENA(x)                (((x) & 0x1) << 12)
-#define   G_0085F0_CB6_DEST_BASE_ENA(x)                (((x) >> 12) & 0x1)
-#define   C_0085F0_CB6_DEST_BASE_ENA                   0xFFFFEFFF
-#define   S_0085F0_CB7_DEST_BASE_ENA(x)                (((x) & 0x1) << 13)
-#define   G_0085F0_CB7_DEST_BASE_ENA(x)                (((x) >> 13) & 0x1)
-#define   C_0085F0_CB7_DEST_BASE_ENA                   0xFFFFDFFF
-#define   S_0085F0_DB_DEST_BASE_ENA(x)                 (((x) & 0x1) << 14)
-#define   G_0085F0_DB_DEST_BASE_ENA(x)                 (((x) >> 14) & 0x1)
-#define   C_0085F0_DB_DEST_BASE_ENA                    0xFFFFBFFF
-#define   S_0085F0_CR_DEST_BASE_ENA(x)                 (((x) & 0x1) << 15)
-#define   G_0085F0_CR_DEST_BASE_ENA(x)                 (((x) >> 15) & 0x1)
-#define   C_0085F0_CR_DEST_BASE_ENA                    0xFFFF7FFF
-#define   S_0085F0_TC_ACTION_ENA(x)                    (((x) & 0x1) << 23)
-#define   G_0085F0_TC_ACTION_ENA(x)                    (((x) >> 23) & 0x1)
-#define   C_0085F0_TC_ACTION_ENA                       0xFF7FFFFF
-#define   S_0085F0_VC_ACTION_ENA(x)                    (((x) & 0x1) << 24)
-#define   G_0085F0_VC_ACTION_ENA(x)                    (((x) >> 24) & 0x1)
-#define   C_0085F0_VC_ACTION_ENA                       0xFEFFFFFF
-#define   S_0085F0_CB_ACTION_ENA(x)                    (((x) & 0x1) << 25)
-#define   G_0085F0_CB_ACTION_ENA(x)                    (((x) >> 25) & 0x1)
-#define   C_0085F0_CB_ACTION_ENA                       0xFDFFFFFF
-#define   S_0085F0_DB_ACTION_ENA(x)                    (((x) & 0x1) << 26)
-#define   G_0085F0_DB_ACTION_ENA(x)                    (((x) >> 26) & 0x1)
-#define   C_0085F0_DB_ACTION_ENA                       0xFBFFFFFF
-#define   S_0085F0_SH_ACTION_ENA(x)                    (((x) & 0x1) << 27)
-#define   G_0085F0_SH_ACTION_ENA(x)                    (((x) >> 27) & 0x1)
-#define   C_0085F0_SH_ACTION_ENA                       0xF7FFFFFF
-#define   S_0085F0_SMX_ACTION_ENA(x)                   (((x) & 0x1) << 28)
-#define   G_0085F0_SMX_ACTION_ENA(x)                   (((x) >> 28) & 0x1)
-#define   C_0085F0_SMX_ACTION_ENA                      0xEFFFFFFF
-#define   S_0085F0_CR0_ACTION_ENA(x)                   (((x) & 0x1) << 29)
-#define   G_0085F0_CR0_ACTION_ENA(x)                   (((x) >> 29) & 0x1)
-#define   C_0085F0_CR0_ACTION_ENA                      0xDFFFFFFF
-#define   S_0085F0_CR1_ACTION_ENA(x)                   (((x) & 0x1) << 30)
-#define   G_0085F0_CR1_ACTION_ENA(x)                   (((x) >> 30) & 0x1)
-#define   C_0085F0_CR1_ACTION_ENA                      0xBFFFFFFF
-#define   S_0085F0_CR2_ACTION_ENA(x)                   (((x) & 0x1) << 31)
-#define   G_0085F0_CR2_ACTION_ENA(x)                   (((x) >> 31) & 0x1)
-#define   C_0085F0_CR2_ACTION_ENA                      0x7FFFFFFF
-
-
-#define R_02812C_CB_CLEAR_ALPHA                      0x02812C
-#define   S_02812C_CLEAR_ALPHA(x)                      (((x) & 0xFFFFFFFF) << 0)
-#define   G_02812C_CLEAR_ALPHA(x)                      (((x) >> 0) & 0xFFFFFFFF)
-#define   C_02812C_CLEAR_ALPHA                         0x00000000
-#define R_028128_CB_CLEAR_BLUE                       0x028128
-#define   S_028128_CLEAR_BLUE(x)                       (((x) & 0xFFFFFFFF) << 0)
-#define   G_028128_CLEAR_BLUE(x)                       (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028128_CLEAR_BLUE                          0x00000000
-#define R_028124_CB_CLEAR_GREEN                      0x028124
-#define   S_028124_CLEAR_GREEN(x)                      (((x) & 0xFFFFFFFF) << 0)
-#define   G_028124_CLEAR_GREEN(x)                      (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028124_CLEAR_GREEN                         0x00000000
-#define R_028120_CB_CLEAR_RED                        0x028120
-#define   S_028120_CLEAR_RED(x)                        (((x) & 0xFFFFFFFF) << 0)
-#define   G_028120_CLEAR_RED(x)                        (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028120_CLEAR_RED                           0x00000000
-#define R_02842C_CB_FOG_BLUE                         0x02842C
-#define   S_02842C_FOG_BLUE(x)                         (((x) & 0xFFFFFFFF) << 0)
-#define   G_02842C_FOG_BLUE(x)                         (((x) >> 0) & 0xFFFFFFFF)
-#define   C_02842C_FOG_BLUE                            0x00000000
-#define R_028428_CB_FOG_GREEN                        0x028428
-#define   S_028428_FOG_GREEN(x)                        (((x) & 0xFFFFFFFF) << 0)
-#define   G_028428_FOG_GREEN(x)                        (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028428_FOG_GREEN                           0x00000000
-#define R_028424_CB_FOG_RED                          0x028424
-#define   S_028424_FOG_RED(x)                          (((x) & 0xFFFFFFFF) << 0)
-#define   G_028424_FOG_RED(x)                          (((x) >> 0) & 0xFFFFFFFF)
-#define   C_028424_FOG_RED                             0x00000000
-#define R_03C000_SQ_TEX_SAMPLER_WORD0_0              0x03C000
-#define   S_03C000_CLAMP_X(x)                          (((x) & 0x7) << 0)
-#define   G_03C000_CLAMP_X(x)                          (((x) >> 0) & 0x7)
-#define   C_03C000_CLAMP_X                             0xFFFFFFF8
-#define   S_03C000_CLAMP_Y(x)                          (((x) & 0x7) << 3)
-#define   G_03C000_CLAMP_Y(x)                          (((x) >> 3) & 0x7)
-#define   C_03C000_CLAMP_Y                             0xFFFFFFC7
-#define   S_03C000_CLAMP_Z(x)                          (((x) & 0x7) << 6)
-#define   G_03C000_CLAMP_Z(x)                          (((x) >> 6) & 0x7)
-#define   C_03C000_CLAMP_Z                             0xFFFFFE3F
-#define   S_03C000_XY_MAG_FILTER(x)                    (((x) & 0x7) << 9)
-#define   G_03C000_XY_MAG_FILTER(x)                    (((x) >> 9) & 0x7)
-#define   C_03C000_XY_MAG_FILTER                       0xFFFFF1FF
-#define   S_03C000_XY_MIN_FILTER(x)                    (((x) & 0x7) << 12)
-#define   G_03C000_XY_MIN_FILTER(x)                    (((x) >> 12) & 0x7)
-#define   C_03C000_XY_MIN_FILTER                       0xFFFF8FFF
-#define   S_03C000_Z_FILTER(x)                         (((x) & 0x3) << 15)
-#define   G_03C000_Z_FILTER(x)                         (((x) >> 15) & 0x3)
-#define   C_03C000_Z_FILTER                            0xFFFE7FFF
-#define   S_03C000_MIP_FILTER(x)                       (((x) & 0x3) << 17)
-#define   G_03C000_MIP_FILTER(x)                       (((x) >> 17) & 0x3)
-#define   C_03C000_MIP_FILTER                          0xFFF9FFFF
-#define   S_03C000_BORDER_COLOR_TYPE(x)                (((x) & 0x3) << 22)
-#define   G_03C000_BORDER_COLOR_TYPE(x)                (((x) >> 22) & 0x3)
-#define   C_03C000_BORDER_COLOR_TYPE                   0xFF3FFFFF
-#define   S_03C000_POINT_SAMPLING_CLAMP(x)             (((x) & 0x1) << 24)
-#define   G_03C000_POINT_SAMPLING_CLAMP(x)             (((x) >> 24) & 0x1)
-#define   C_03C000_POINT_SAMPLING_CLAMP                0xFEFFFFFF
-#define   S_03C000_TEX_ARRAY_OVERRIDE(x)               (((x) & 0x1) << 25)
-#define   G_03C000_TEX_ARRAY_OVERRIDE(x)               (((x) >> 25) & 0x1)
-#define   C_03C000_TEX_ARRAY_OVERRIDE                  0xFDFFFFFF
-#define   S_03C000_DEPTH_COMPARE_FUNCTION(x)           (((x) & 0x7) << 26)
-#define   G_03C000_DEPTH_COMPARE_FUNCTION(x)           (((x) >> 26) & 0x7)
-#define   C_03C000_DEPTH_COMPARE_FUNCTION              0xE3FFFFFF
-#define   S_03C000_CHROMA_KEY(x)                       (((x) & 0x3) << 29)
-#define   G_03C000_CHROMA_KEY(x)                       (((x) >> 29) & 0x3)
-#define   C_03C000_CHROMA_KEY                          0x9FFFFFFF
-#define   S_03C000_LOD_USES_MINOR_AXIS(x)              (((x) & 0x1) << 31)
-#define   G_03C000_LOD_USES_MINOR_AXIS(x)              (((x) >> 31) & 0x1)
-#define   C_03C000_LOD_USES_MINOR_AXIS                 0x7FFFFFFF
-#define R_03C004_SQ_TEX_SAMPLER_WORD1_0              0x03C004
-#define   S_03C004_MIN_LOD(x)                          (((x) & 0x3FF) << 0)
-#define   G_03C004_MIN_LOD(x)                          (((x) >> 0) & 0x3FF)
-#define   C_03C004_MIN_LOD                             0xFFFFFC00
-#define   S_03C004_MAX_LOD(x)                          (((x) & 0x3FF) << 10)
-#define   G_03C004_MAX_LOD(x)                          (((x) >> 10) & 0x3FF)
-#define   C_03C004_MAX_LOD                             0xFFF003FF
-#define   S_03C004_LOD_BIAS(x)                         (((x) & 0xFFF) << 20)
-#define   G_03C004_LOD_BIAS(x)                         (((x) >> 20) & 0xFFF)
-#define   C_03C004_LOD_BIAS                            0x000FFFFF
-#define R_03C008_SQ_TEX_SAMPLER_WORD2_0              0x03C008
-#define   S_03C008_LOD_BIAS_SEC(x)                     (((x) & 0xFFF) << 0)
-#define   G_03C008_LOD_BIAS_SEC(x)                     (((x) >> 0) & 0xFFF)
-#define   C_03C008_LOD_BIAS_SEC                        0xFFFFF000
-#define   S_03C008_MC_COORD_TRUNCATE(x)                (((x) & 0x1) << 12)
-#define   G_03C008_MC_COORD_TRUNCATE(x)                (((x) >> 12) & 0x1)
-#define   C_03C008_MC_COORD_TRUNCATE                   0xFFFFEFFF
-#define   S_03C008_FORCE_DEGAMMA(x)                    (((x) & 0x1) << 13)
-#define   G_03C008_FORCE_DEGAMMA(x)                    (((x) >> 13) & 0x1)
-#define   C_03C008_FORCE_DEGAMMA                       0xFFFFDFFF
-#define   S_03C008_HIGH_PRECISION_FILTER(x)            (((x) & 0x1) << 14)
-#define   G_03C008_HIGH_PRECISION_FILTER(x)            (((x) >> 14) & 0x1)
-#define   C_03C008_HIGH_PRECISION_FILTER               0xFFFFBFFF
-#define   S_03C008_PERF_MIP(x)                         (((x) & 0x7) << 15)
-#define   G_03C008_PERF_MIP(x)                         (((x) >> 15) & 0x7)
-#define   C_03C008_PERF_MIP                            0xFFFC7FFF
-#define   S_03C008_PERF_Z(x)                           (((x) & 0x3) << 18)
-#define   G_03C008_PERF_Z(x)                           (((x) >> 18) & 0x3)
-#define   C_03C008_PERF_Z                              0xFFF3FFFF
-#define   S_03C008_FETCH_4(x)                          (((x) & 0x1) << 26)
-#define   G_03C008_FETCH_4(x)                          (((x) >> 26) & 0x1)
-#define   C_03C008_FETCH_4                             0xFBFFFFFF
-#define   S_03C008_SAMPLE_IS_PCF(x)                    (((x) & 0x1) << 27)
-#define   G_03C008_SAMPLE_IS_PCF(x)                    (((x) >> 27) & 0x1)
-#define   C_03C008_SAMPLE_IS_PCF                       0xF7FFFFFF
-#define   S_03C008_TYPE(x)                             (((x) & 0x1) << 31)
-#define   G_03C008_TYPE(x)                             (((x) >> 31) & 0x1)
-#define   C_03C008_TYPE                                0x7FFFFFFF
-#define R_00A40C_TD_PS_SAMPLER0_BORDER_ALPHA         0x00A40C
-#define   S_00A40C_BORDER_ALPHA(x)                     (((x) & 0xFFFFFFFF) << 0)
-#define   G_00A40C_BORDER_ALPHA(x)                     (((x) >> 0) & 0xFFFFFFFF)
-#define   C_00A40C_BORDER_ALPHA                        0x00000000
-#define R_00A408_TD_PS_SAMPLER0_BORDER_BLUE          0x00A408
-#define   S_00A408_BORDER_BLUE(x)                      (((x) & 0xFFFFFFFF) << 0)
-#define   G_00A408_BORDER_BLUE(x)                      (((x) >> 0) & 0xFFFFFFFF)
-#define   C_00A408_BORDER_BLUE                         0x00000000
-#define R_00A404_TD_PS_SAMPLER0_BORDER_GREEN         0x00A404
-#define   S_00A404_BORDER_GREEN(x)                     (((x) & 0xFFFFFFFF) << 0)
-#define   G_00A404_BORDER_GREEN(x)                     (((x) >> 0) & 0xFFFFFFFF)
-#define   C_00A404_BORDER_GREEN                        0x00000000
-#define R_00A400_TD_PS_SAMPLER0_BORDER_RED           0x00A400
-#define   S_00A400_BORDER_RED(x)                       (((x) & 0xFFFFFFFF) << 0)
-#define   G_00A400_BORDER_RED(x)                       (((x) >> 0) & 0xFFFFFFFF)
-#define   C_00A400_BORDER_RED                          0x00000000
-#define R_00A60C_TD_VS_SAMPLER0_BORDER_ALPHA         0x00A60C
-#define   S_00A60C_BORDER_ALPHA(x)                     (((x) & 0xFFFFFFFF) << 0)
-#define   G_00A60C_BORDER_ALPHA(x)                     (((x) >> 0) & 0xFFFFFFFF)
-#define   C_00A60C_BORDER_ALPHA                        0x00000000
-#define R_00A608_TD_VS_SAMPLER0_BORDER_BLUE          0x00A608
-#define   S_00A608_BORDER_BLUE(x)                      (((x) & 0xFFFFFFFF) << 0)
-#define   G_00A608_BORDER_BLUE(x)                      (((x) >> 0) & 0xFFFFFFFF)
-#define   C_00A608_BORDER_BLUE                         0x00000000
-#define R_00A604_TD_VS_SAMPLER0_BORDER_GREEN         0x00A604
-#define   S_00A604_BORDER_GREEN(x)                     (((x) & 0xFFFFFFFF) << 0)
-#define   G_00A604_BORDER_GREEN(x)                     (((x) >> 0) & 0xFFFFFFFF)
-#define   C_00A604_BORDER_GREEN                        0x00000000
-#define R_00A600_TD_VS_SAMPLER0_BORDER_RED           0x00A600
-#define   S_00A600_BORDER_RED(x)                       (((x) & 0xFFFFFFFF) << 0)
-#define   G_00A600_BORDER_RED(x)                       (((x) >> 0) & 0xFFFFFFFF)
-#define   C_00A600_BORDER_RED                          0x00000000
-#define R_00A80C_TD_GS_SAMPLER0_BORDER_ALPHA         0x00A80C
-#define   S_00A80C_BORDER_ALPHA(x)                     (((x) & 0xFFFFFFFF) << 0)
-#define   G_00A80C_BORDER_ALPHA(x)                     (((x) >> 0) & 0xFFFFFFFF)
-#define   C_00A80C_BORDER_ALPHA                        0x00000000
-#define R_00A808_TD_GS_SAMPLER0_BORDER_BLUE          0x00A808
-#define   S_00A808_BORDER_BLUE(x)                      (((x) & 0xFFFFFFFF) << 0)
-#define   G_00A808_BORDER_BLUE(x)                      (((x) >> 0) & 0xFFFFFFFF)
-#define   C_00A808_BORDER_BLUE                         0x00000000
-#define R_00A804_TD_GS_SAMPLER0_BORDER_GREEN         0x00A804
-#define   S_00A804_BORDER_GREEN(x)                     (((x) & 0xFFFFFFFF) << 0)
-#define   G_00A804_BORDER_GREEN(x)                     (((x) >> 0) & 0xFFFFFFFF)
-#define   C_00A804_BORDER_GREEN                        0x00000000
-#define R_00A800_TD_GS_SAMPLER0_BORDER_RED           0x00A800
-#define   S_00A800_BORDER_RED(x)                       (((x) & 0xFFFFFFFF) << 0)
-#define   G_00A800_BORDER_RED(x)                       (((x) >> 0) & 0xFFFFFFFF)
-#define   C_00A800_BORDER_RED                          0x00000000
-#define R_030000_SQ_ALU_CONSTANT0_0                  0x030000
-#define   S_030000_X(x)                                (((x) & 0xFFFFFFFF) << 0)
-#define   G_030000_X(x)                                (((x) >> 0) & 0xFFFFFFFF)
-#define   C_030000_X                                   0x00000000
-#define R_030004_SQ_ALU_CONSTANT1_0                  0x030004
-#define   S_030004_Y(x)                                (((x) & 0xFFFFFFFF) << 0)
-#define   G_030004_Y(x)                                (((x) >> 0) & 0xFFFFFFFF)
-#define   C_030004_Y                                   0x00000000
-#define R_030008_SQ_ALU_CONSTANT2_0                  0x030008
-#define   S_030008_Z(x)                                (((x) & 0xFFFFFFFF) << 0)
-#define   G_030008_Z(x)                                (((x) >> 0) & 0xFFFFFFFF)
-#define   C_030008_Z                                   0x00000000
-#define R_03000C_SQ_ALU_CONSTANT3_0                  0x03000C
-#define   S_03000C_W(x)                                (((x) & 0xFFFFFFFF) << 0)
-#define   G_03000C_W(x)                                (((x) >> 0) & 0xFFFFFFFF)
-#define   C_03000C_W                                   0x00000000
-#define R_0287E4_VGT_DMA_BASE_HI                     0x0287E4
-#define R_0287E8_VGT_DMA_BASE                        0x0287E8
-#define R_028E20_PA_CL_UCP0_X                        0x028E20
-#define R_028E24_PA_CL_UCP0_Y                        0x028E24
-#define R_028E28_PA_CL_UCP0_Z                        0x028E28
-#define R_028E2C_PA_CL_UCP0_W                        0x028E2C
-#define R_028E30_PA_CL_UCP1_X                        0x028E30
-#define R_028E34_PA_CL_UCP1_Y                        0x028E34
-#define R_028E38_PA_CL_UCP1_Z                        0x028E38
-#define R_028E3C_PA_CL_UCP1_W                        0x028E3C
-#define R_028E40_PA_CL_UCP2_X                        0x028E40
-#define R_028E44_PA_CL_UCP2_Y                        0x028E44
-#define R_028E48_PA_CL_UCP2_Z                        0x028E48
-#define R_028E4C_PA_CL_UCP2_W                        0x028E4C
-#define R_028E50_PA_CL_UCP3_X                        0x028E50
-#define R_028E54_PA_CL_UCP3_Y                        0x028E54
-#define R_028E58_PA_CL_UCP3_Z                        0x028E58
-#define R_028E5C_PA_CL_UCP3_W                        0x028E5C
-#define R_028E60_PA_CL_UCP4_X                        0x028E60
-#define R_028E64_PA_CL_UCP4_Y                        0x028E64
-#define R_028E68_PA_CL_UCP4_Z                        0x028E68
-#define R_028E6C_PA_CL_UCP4_W                        0x028E6C
-#define R_028E70_PA_CL_UCP5_X                        0x028E70
-#define R_028E74_PA_CL_UCP5_Y                        0x028E74
-#define R_028E78_PA_CL_UCP5_Z                        0x028E78
-#define R_028E7C_PA_CL_UCP5_W                        0x028E7C
-#define R_038000_RESOURCE0_WORD0                     0x038000
-#define R_038004_RESOURCE0_WORD1                     0x038004
-#define R_038008_RESOURCE0_WORD2                     0x038008
-#define R_03800C_RESOURCE0_WORD3                     0x03800C
-#define R_038010_RESOURCE0_WORD4                     0x038010
-#define R_038014_RESOURCE0_WORD5                     0x038014
-#define R_038018_RESOURCE0_WORD6                     0x038018
-
-#define R_028140_ALU_CONST_BUFFER_SIZE_PS_0          0x00028140
-#define R_028180_ALU_CONST_BUFFER_SIZE_VS_0          0x00028180
-#define R_028940_ALU_CONST_CACHE_PS_0                0x00028940
-#define R_028980_ALU_CONST_CACHE_VS_0                0x00028980
-
-#define R_03CFF0_SQ_VTX_BASE_VTX_LOC                 0x03CFF0
-#define R_03CFF4_SQ_VTX_START_INST_LOC               0x03CFF4
-
-#endif
diff --git a/src/gallium/winsys/r600/drm/radeon_bo.c b/src/gallium/winsys/r600/drm/radeon_bo.c
deleted file mode 100644
index 45cf6f09671..00000000000
--- a/src/gallium/winsys/r600/drm/radeon_bo.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/*
- * Copyright 2010 Jerome Glisse <[email protected]>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *      Jerome Glisse
- */
-#define _FILE_OFFSET_BITS 64
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sys/mman.h>
-#include <errno.h>
-#include "r600_priv.h"
-#include "xf86drm.h"
-#include "radeon_drm.h"
-
-int radeon_bo_fixed_map(struct radeon *radeon, struct radeon_bo *bo)
-{
-	struct drm_radeon_gem_mmap args;
-	void *ptr;
-	int r;
-
-	/* Zero out args to make valgrind happy */
-	memset(&args, 0, sizeof(args));
-	args.handle = bo->handle;
-	args.offset = 0;
-	args.size = (uint64_t)bo->size;
-	r = drmCommandWriteRead(radeon->fd, DRM_RADEON_GEM_MMAP,
-				&args, sizeof(args));
-	if (r) {
-		fprintf(stderr, "error mapping %p 0x%08X (error = %d)\n",
-			bo, bo->handle, r);
-		return r;
-	}
-	ptr = mmap(0, args.size, PROT_READ|PROT_WRITE, MAP_SHARED, radeon->fd, args.addr_ptr);
-	if (ptr == MAP_FAILED) {
-		fprintf(stderr, "%s failed to map bo\n", __func__);
-		return -errno;
-	}
-	bo->data = ptr;
-
-	bo->map_count++;
-	return 0;
-}
-
-static void radeon_bo_fixed_unmap(struct radeon *radeon, struct radeon_bo *bo)
-{
-	if (bo->data) {
-		munmap(bo->data, bo->size);
-		bo->data = NULL;
-	}
-}
-
-struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle,
-			    unsigned size, unsigned alignment, unsigned initial_domain)
-{
-	struct radeon_bo *bo;
-	int r;
-
-	if (handle) {
-		pipe_mutex_lock(radeon->bo_handles_mutex);
-		bo = util_hash_table_get(radeon->bo_handles,
-					 (void *)(uintptr_t)handle);
-		if (bo) {
-			struct radeon_bo *b = NULL;
-			radeon_bo_reference(radeon, &b, bo);
-			goto done;
-		}
-	}
-	bo = calloc(1, sizeof(*bo));
-	if (bo == NULL) {
-		return NULL;
-	}
-	bo->size = size;
-	bo->handle = handle;
-	pipe_reference_init(&bo->reference, 1);
-	bo->alignment = alignment;
-	LIST_INITHEAD(&bo->fencedlist);
-
-	if (handle) {
-		struct drm_gem_open open_arg;
-
-		memset(&open_arg, 0, sizeof(open_arg));
-		open_arg.name = handle;
-		r = drmIoctl(radeon->fd, DRM_IOCTL_GEM_OPEN, &open_arg);
-		if (r != 0) {
-			free(bo);
-			return NULL;
-		}
-		bo->name = handle;
-		bo->handle = open_arg.handle;
-		bo->size = open_arg.size;
-		bo->shared = TRUE;
-	} else {
-		struct drm_radeon_gem_create args = {};
-
-		args.size = size;
-		args.alignment = alignment;
-		args.initial_domain = initial_domain;
-		args.flags = 0;
-		args.handle = 0;
-		r = drmCommandWriteRead(radeon->fd, DRM_RADEON_GEM_CREATE,
-					&args, sizeof(args));
-		bo->handle = args.handle;
-		if (r) {
-			fprintf(stderr, "Failed to allocate :\n");
-			fprintf(stderr, "   size      : %d bytes\n", size);
-			fprintf(stderr, "   alignment : %d bytes\n", alignment);
-			free(bo);
-			return NULL;
-		}
-	}
-
-	if (handle)
-		util_hash_table_set(radeon->bo_handles, (void *)(uintptr_t)handle, bo);
-done:
-	if (handle)
-		pipe_mutex_unlock(radeon->bo_handles_mutex);
-
-	return bo;
-}
-
-static void radeon_bo_destroy(struct radeon *radeon, struct radeon_bo *bo)
-{
-	struct drm_gem_close args;
-
-	if (bo->name) {
-		pipe_mutex_lock(radeon->bo_handles_mutex);
-		util_hash_table_remove(radeon->bo_handles,
-				       (void *)(uintptr_t)bo->name);
-		pipe_mutex_unlock(radeon->bo_handles_mutex);
-	}
-	LIST_DEL(&bo->fencedlist);
-	radeon_bo_fixed_unmap(radeon, bo);
-	memset(&args, 0, sizeof(args));
-	args.handle = bo->handle;
-	drmIoctl(radeon->fd, DRM_IOCTL_GEM_CLOSE, &args);
-	memset(bo, 0, sizeof(struct radeon_bo));
-	free(bo);
-}
-
-void radeon_bo_reference(struct radeon *radeon,
-			 struct radeon_bo **dst,
-			 struct radeon_bo *src)
-{
-	struct radeon_bo *old = *dst;
-	if (pipe_reference(&(*dst)->reference, &src->reference)) {
-		radeon_bo_destroy(radeon, old);
-	}
-	*dst = src;
-}
-
-int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo)
-{
-	struct drm_radeon_gem_wait_idle args;
-	int ret;
-
-        if (!bo->shared) {
-                if (!bo->fence)
-			return 0;
-		if (bo->fence <= *radeon->cfence) {
-			LIST_DELINIT(&bo->fencedlist);
-			bo->fence = 0;
-			return 0;
-		}
-        }
-
-	/* Zero out args to make valgrind happy */
-	memset(&args, 0, sizeof(args));
-	args.handle = bo->handle;
-	do {
-		ret = drmCommandWriteRead(radeon->fd, DRM_RADEON_GEM_WAIT_IDLE,
-					&args, sizeof(args));
-	} while (ret == -EBUSY);
-	return ret;
-}
-
-int radeon_bo_busy(struct radeon *radeon, struct radeon_bo *bo, uint32_t *domain)
-{
-	struct drm_radeon_gem_busy args;
-	int ret;
-
-	if (!bo->shared) {
-		if (!bo->fence)
-			return 0;
-		if (bo->fence <= *radeon->cfence) {
-			LIST_DELINIT(&bo->fencedlist);
-			bo->fence = 0;
-			return 0;
-		}
-	}
-
-	memset(&args, 0, sizeof(args));
-	args.handle = bo->handle;
-	args.domain = 0;
-
-	ret = drmCommandWriteRead(radeon->fd, DRM_RADEON_GEM_BUSY,
-			&args, sizeof(args));
-
-	*domain = args.domain;
-	return ret;
-}
-
-int radeon_bo_get_tiling_flags(struct radeon *radeon,
-			       struct radeon_bo *bo,
-			       uint32_t *tiling_flags,
-			       uint32_t *pitch)
-{
-	struct drm_radeon_gem_get_tiling args = {};
-	int ret;
-
-	args.handle = bo->handle;
-	ret = drmCommandWriteRead(radeon->fd, DRM_RADEON_GEM_GET_TILING,
-				  &args, sizeof(args));
-	if (ret)
-		return ret;
-
-	*tiling_flags = args.tiling_flags;
-	*pitch = args.pitch;
-	return ret;
-}
-
-int radeon_bo_get_name(struct radeon *radeon,
-		       struct radeon_bo *bo,
-		       uint32_t *name)
-{
-	struct drm_gem_flink flink;
-	int ret;
-
-	flink.handle = bo->handle;
-	ret = drmIoctl(radeon->fd, DRM_IOCTL_GEM_FLINK, &flink);
-	if (ret)
-		return ret;
-
-	*name = flink.name;
-	return ret;
-}
diff --git a/src/gallium/winsys/r600/drm/radeon_pciid.c b/src/gallium/winsys/r600/drm/radeon_pciid.c
index f54a7c8fe72..87572417c80 100644
--- a/src/gallium/winsys/r600/drm/radeon_pciid.c
+++ b/src/gallium/winsys/r600/drm/radeon_pciid.c
@@ -23,7 +23,6 @@
  * Authors:
  *      Jerome Glisse
  */
-#include <stdlib.h>
 #include "r600_priv.h"
 
 struct pci_id {
diff --git a/src/gallium/winsys/radeon/drm/Android.mk b/src/gallium/winsys/radeon/drm/Android.mk
new file mode 100644
index 00000000000..c1922498225
--- /dev/null
+++ b/src/gallium/winsys/radeon/drm/Android.mk
@@ -0,0 +1,40 @@
+# Mesa 3-D graphics library
+#
+# Copyright (C) 2011 Chia-I Wu <[email protected]>
+# Copyright (C) 2011 LunarG Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+
+LOCAL_PATH := $(call my-dir)
+
+# get C_SOURCES
+include $(LOCAL_PATH)/Makefile.sources
+
+include $(CLEAR_VARS)
+
+LOCAL_SRC_FILES := $(C_SOURCES)
+
+LOCAL_C_INCLUDES := \
+	$(DRM_TOP) \
+	$(DRM_TOP)/include/drm
+
+LOCAL_MODULE := libmesa_winsys_radeon
+
+include $(GALLIUM_COMMON_MK)
+include $(BUILD_STATIC_LIBRARY)
diff --git a/src/gallium/winsys/radeon/drm/Makefile b/src/gallium/winsys/radeon/drm/Makefile
index 913e6ad186a..68b9efebfa4 100644
--- a/src/gallium/winsys/radeon/drm/Makefile
+++ b/src/gallium/winsys/radeon/drm/Makefile
@@ -4,10 +4,8 @@ include $(TOP)/configs/current
 
 LIBNAME = radeonwinsys
 
-C_SOURCES = \
-	radeon_drm_bo.c \
-	radeon_drm_cs.c \
-	radeon_drm_winsys.c
+# get C_SOURCES
+include Makefile.sources
 
 LIBRARY_INCLUDES = -I$(TOP)/include \
 		   $(shell pkg-config libdrm --cflags-only-I)
diff --git a/src/gallium/winsys/radeon/drm/Makefile.sources b/src/gallium/winsys/radeon/drm/Makefile.sources
new file mode 100644
index 00000000000..1d18d6164d5
--- /dev/null
+++ b/src/gallium/winsys/radeon/drm/Makefile.sources
@@ -0,0 +1,4 @@
+C_SOURCES := \
+	radeon_drm_bo.c \
+	radeon_drm_cs.c \
+	radeon_drm_winsys.c
diff --git a/src/gallium/winsys/radeon/drm/SConscript b/src/gallium/winsys/radeon/drm/SConscript
index 2edb1e94645..e5048d6255d 100644
--- a/src/gallium/winsys/radeon/drm/SConscript
+++ b/src/gallium/winsys/radeon/drm/SConscript
@@ -2,11 +2,7 @@ Import('*')
 
 env = env.Clone()
 
-radeon_sources = [
-    'radeon_drm_bo.c',
-    'radeon_drm_cs.c',
-    'radeon_drm_winsys.c',
-]
+radeon_sources = env.ParseSourceList('Makefile.sources', 'C_SOURCES')
 
 env.PkgUseModules('DRM')
 
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index b6f12727e81..b45efe5f49c 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -31,11 +31,11 @@
 #include "util/u_memory.h"
 #include "util/u_simple_list.h"
 #include "os/os_thread.h"
+#include "os/os_mman.h"
 
 #include "state_tracker/drm_driver.h"
 
 #include <sys/ioctl.h>
-#include <sys/mman.h>
 #include <xf86drm.h>
 #include <errno.h>
 
@@ -43,6 +43,21 @@
 #define RADEON_BO_FLAGS_MICRO_TILE  2
 #define RADEON_BO_FLAGS_MICRO_TILE_SQUARE 0x20
 
+#ifndef DRM_RADEON_GEM_WAIT
+#define DRM_RADEON_GEM_WAIT		0x2b
+
+#define RADEON_GEM_NO_WAIT	0x1
+#define RADEON_GEM_USAGE_READ	0x2
+#define RADEON_GEM_USAGE_WRITE	0x4
+
+struct drm_radeon_gem_wait {
+	uint32_t	handle;
+	uint32_t        flags;  /* one of RADEON_GEM_* */
+};
+
+#endif
+
+
 extern const struct pb_vtbl radeon_bo_vtbl;
 
 
@@ -87,39 +102,49 @@ static struct radeon_bo *get_radeon_bo(struct pb_buffer *_buf)
     return bo;
 }
 
-static void radeon_bo_wait(struct pb_buffer *_buf)
+static void radeon_bo_wait(struct pb_buffer *_buf, enum radeon_bo_usage usage)
 {
-    struct radeon_bo *bo = get_radeon_bo(pb_buffer(_buf));
-    struct drm_radeon_gem_wait_idle args = {};
+    struct radeon_bo *bo = get_radeon_bo(_buf);
 
     while (p_atomic_read(&bo->num_active_ioctls)) {
         sched_yield();
     }
 
-    args.handle = bo->handle;
-    while (drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_WAIT_IDLE,
-                               &args, sizeof(args)) == -EBUSY);
-
-    bo->busy_for_write = FALSE;
+    if (bo->rws->info.drm_minor >= 12) {
+        struct drm_radeon_gem_wait args = {};
+        args.handle = bo->handle;
+        args.flags = usage;
+        while (drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_WAIT,
+                                   &args, sizeof(args)) == -EBUSY);
+    } else {
+        struct drm_radeon_gem_wait_idle args = {};
+        args.handle = bo->handle;
+        while (drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_WAIT_IDLE,
+                                   &args, sizeof(args)) == -EBUSY);
+    }
 }
 
-static boolean radeon_bo_is_busy(struct pb_buffer *_buf)
+static boolean radeon_bo_is_busy(struct pb_buffer *_buf,
+                                 enum radeon_bo_usage usage)
 {
-    struct radeon_bo *bo = get_radeon_bo(pb_buffer(_buf));
-    struct drm_radeon_gem_busy args = {};
-    boolean busy;
+    struct radeon_bo *bo = get_radeon_bo(_buf);
 
     if (p_atomic_read(&bo->num_active_ioctls)) {
         return TRUE;
     }
 
-    args.handle = bo->handle;
-    busy = drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_BUSY,
-                               &args, sizeof(args)) != 0;
-
-    if (!busy)
-        bo->busy_for_write = FALSE;
-    return busy;
+    if (bo->rws->info.drm_minor >= 12) {
+        struct drm_radeon_gem_wait args = {};
+        args.handle = bo->handle;
+        args.flags = usage | RADEON_GEM_NO_WAIT;
+        return drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_WAIT,
+                                   &args, sizeof(args)) != 0;
+    } else {
+        struct drm_radeon_gem_busy args = {};
+        args.handle = bo->handle;
+        return drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_BUSY,
+                                   &args, sizeof(args)) != 0;
+    }
 }
 
 static void radeon_bo_destroy(struct pb_buffer *_buf)
@@ -135,7 +160,7 @@ static void radeon_bo_destroy(struct pb_buffer *_buf)
     }
 
     if (bo->ptr)
-        munmap(bo->ptr, bo->size);
+        os_munmap(bo->ptr, bo->size);
 
     /* Close object. */
     args.handle = bo->handle;
@@ -172,13 +197,33 @@ static void *radeon_bo_map_internal(struct pb_buffer *_buf,
     if (!(flags & PB_USAGE_UNSYNCHRONIZED)) {
         /* DONTBLOCK doesn't make sense with UNSYNCHRONIZED. */
         if (flags & PB_USAGE_DONTBLOCK) {
-            if (radeon_bo_is_referenced_by_cs(cs, bo)) {
-                cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC);
-                return NULL;
-            }
+            if (!(flags & PB_USAGE_CPU_WRITE)) {
+                /* Mapping for read.
+                 *
+                 * Since we are mapping for read, we don't need to wait
+                 * if the GPU is using the buffer for read too
+                 * (neither one is changing it).
+                 *
+                 * Only check whether the buffer is being used for write. */
+                if (radeon_bo_is_referenced_by_cs_for_write(cs, bo)) {
+                    cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC);
+                    return NULL;
+                }
+
+                if (radeon_bo_is_busy((struct pb_buffer*)bo,
+                                      RADEON_USAGE_WRITE)) {
+                    return NULL;
+                }
+            } else {
+                if (radeon_bo_is_referenced_by_cs(cs, bo)) {
+                    cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC);
+                    return NULL;
+                }
 
-            if (radeon_bo_is_busy((struct pb_buffer*)bo)) {
-                return NULL;
+                if (radeon_bo_is_busy((struct pb_buffer*)bo,
+                                      RADEON_USAGE_READWRITE)) {
+                    return NULL;
+                }
             }
         } else {
             if (!(flags & PB_USAGE_CPU_WRITE)) {
@@ -191,14 +236,9 @@ static void *radeon_bo_map_internal(struct pb_buffer *_buf,
                  * Only check whether the buffer is being used for write. */
                 if (radeon_bo_is_referenced_by_cs_for_write(cs, bo)) {
                     cs->flush_cs(cs->flush_data, 0);
-                    radeon_bo_wait((struct pb_buffer*)bo);
-                } else if (bo->busy_for_write) {
-                    /* Update the busy_for_write field (done by radeon_bo_is_busy)
-                     * and wait if needed. */
-                    if (radeon_bo_is_busy((struct pb_buffer*)bo)) {
-                        radeon_bo_wait((struct pb_buffer*)bo);
-                    }
                 }
+                radeon_bo_wait((struct pb_buffer*)bo,
+                               RADEON_USAGE_WRITE);
             } else {
                 /* Mapping for write. */
                 if (radeon_bo_is_referenced_by_cs(cs, bo)) {
@@ -209,7 +249,7 @@ static void *radeon_bo_map_internal(struct pb_buffer *_buf,
                         radeon_drm_cs_sync_flush(cs);
                 }
 
-                radeon_bo_wait((struct pb_buffer*)bo);
+                radeon_bo_wait((struct pb_buffer*)bo, RADEON_USAGE_READWRITE);
             }
         }
     }
@@ -238,7 +278,7 @@ static void *radeon_bo_map_internal(struct pb_buffer *_buf,
         return NULL;
     }
 
-    ptr = mmap(0, args.size, PROT_READ|PROT_WRITE, MAP_SHARED,
+    ptr = os_mmap(0, args.size, PROT_READ|PROT_WRITE, MAP_SHARED,
                bo->rws->fd, args.addr_ptr);
     if (ptr == MAP_FAILED) {
         pipe_mutex_unlock(bo->map_mutex);
@@ -345,7 +385,7 @@ static boolean radeon_bomgr_is_buffer_busy(struct pb_manager *_mgr,
        return TRUE;
    }
 
-   if (radeon_bo_is_busy((struct pb_buffer*)bo)) {
+   if (radeon_bo_is_busy((struct pb_buffer*)bo, RADEON_USAGE_READWRITE)) {
        return TRUE;
    }
 
@@ -395,16 +435,14 @@ static void *radeon_bo_map(struct pb_buffer *buf,
                            struct radeon_winsys_cs *cs,
                            enum pipe_transfer_usage usage)
 {
-    struct pb_buffer *_buf = pb_buffer(buf);
-
-    return pb_map(_buf, get_pb_usage_from_transfer_flags(usage), cs);
+    return pb_map(buf, get_pb_usage_from_transfer_flags(usage), cs);
 }
 
 static void radeon_bo_get_tiling(struct pb_buffer *_buf,
                                  enum radeon_bo_layout *microtiled,
                                  enum radeon_bo_layout *macrotiled)
 {
-    struct radeon_bo *bo = get_radeon_bo(pb_buffer(_buf));
+    struct radeon_bo *bo = get_radeon_bo(_buf);
     struct drm_radeon_gem_set_tiling args = {};
 
     args.handle = bo->handle;
@@ -429,7 +467,7 @@ static void radeon_bo_set_tiling(struct pb_buffer *_buf,
                                  enum radeon_bo_layout macrotiled,
                                  uint32_t pitch)
 {
-    struct radeon_bo *bo = get_radeon_bo(pb_buffer(_buf));
+    struct radeon_bo *bo = get_radeon_bo(_buf);
     struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     struct drm_radeon_gem_set_tiling args = {};
 
@@ -464,12 +502,10 @@ static struct radeon_winsys_cs_handle *radeon_drm_get_cs_handle(
         struct pb_buffer *_buf)
 {
     /* return radeon_bo. */
-    return (struct radeon_winsys_cs_handle*)
-            get_radeon_bo(pb_buffer(_buf));
+    return (struct radeon_winsys_cs_handle*)get_radeon_bo(_buf);
 }
 
-static unsigned get_pb_usage_from_create_flags(unsigned bind, unsigned usage,
-                                               enum radeon_bo_domain domain)
+static unsigned get_pb_usage_from_create_flags(enum radeon_bo_domain domain)
 {
     unsigned res = 0;
 
@@ -487,7 +523,6 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
                         unsigned size,
                         unsigned alignment,
                         unsigned bind,
-                        unsigned usage,
                         enum radeon_bo_domain domain)
 {
     struct radeon_drm_winsys *ws = radeon_drm_winsys(rws);
@@ -497,10 +532,11 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
 
     memset(&desc, 0, sizeof(desc));
     desc.alignment = alignment;
-    desc.usage = get_pb_usage_from_create_flags(bind, usage, domain);
+    desc.usage = get_pb_usage_from_create_flags(domain);
 
     /* Assign a buffer manager. */
-    if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER))
+    if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER |
+                PIPE_BIND_CONSTANT_BUFFER))
 	provider = ws->cman;
     else
         provider = ws->kman;
@@ -587,7 +623,7 @@ static boolean radeon_winsys_bo_get_handle(struct pb_buffer *buffer,
                                            struct winsys_handle *whandle)
 {
     struct drm_gem_flink flink = {};
-    struct radeon_bo *bo = get_radeon_bo(pb_buffer(buffer));
+    struct radeon_bo *bo = get_radeon_bo(buffer);
 
     if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
         if (!bo->flinked) {
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.h b/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
index b94881bc4ce..047ea6b1cf2 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
@@ -60,13 +60,6 @@ struct radeon_bo {
      * thread, is this bo referenced in? */
     int num_active_ioctls;
 
-    /* Whether the buffer has been relocated for write and is busy since then.
-     * This field is updated in:
-     * - radeon_drm_cs_flush (to TRUE if it's relocated for write)
-     * - radeon_bo_is_busy (to FALSE if it's not busy)
-     * - radeon_bo_wait (to FALSE) */
-    boolean busy_for_write;
-
     boolean flinked;
     uint32_t flink;
 };
@@ -80,10 +73,4 @@ void radeon_bo_reference(struct radeon_bo **dst, struct radeon_bo *src)
     pb_reference((struct pb_buffer**)dst, (struct pb_buffer*)src);
 }
 
-static INLINE struct pb_buffer *
-pb_buffer(struct pb_buffer *buffer)
-{
-    return (struct pb_buffer *)buffer;
-}
-
 #endif
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 0139de1973a..c309354785a 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -115,6 +115,7 @@ static void radeon_cs_context_cleanup(struct radeon_cs_context *csc)
     }
 
     csc->crelocs = 0;
+    csc->validated_crelocs = 0;
     csc->chunks[0].length_dw = 0;
     csc->chunks[1].length_dw = 0;
     csc->used_gart = 0;
@@ -218,11 +219,11 @@ int radeon_get_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo)
     return -1;
 }
 
-static void radeon_add_reloc(struct radeon_cs_context *csc,
-                             struct radeon_bo *bo,
-                             enum radeon_bo_domain rd,
-                             enum radeon_bo_domain wd,
-                             enum radeon_bo_domain *added_domains)
+static unsigned radeon_add_reloc(struct radeon_cs_context *csc,
+                                 struct radeon_bo *bo,
+                                 enum radeon_bo_domain rd,
+                                 enum radeon_bo_domain wd,
+                                 enum radeon_bo_domain *added_domains)
 {
     struct drm_radeon_cs_reloc *reloc;
     unsigned i;
@@ -232,7 +233,7 @@ static void radeon_add_reloc(struct radeon_cs_context *csc,
         reloc = csc->relocs_hashlist[hash];
         if (reloc->handle == bo->handle) {
             update_domains(reloc, rd, wd, added_domains);
-            return;
+            return csc->reloc_indices_hashlist[hash];
         }
 
         /* Hash collision, look for the BO in the list of relocs linearly. */
@@ -245,7 +246,7 @@ static void radeon_add_reloc(struct radeon_cs_context *csc,
                 csc->relocs_hashlist[hash] = reloc;
                 csc->reloc_indices_hashlist[hash] = i;
                 /*printf("write_reloc collision, hash: %i, handle: %i\n", hash, bo->handle);*/
-                return;
+                return i;
             }
         }
     }
@@ -279,37 +280,64 @@ static void radeon_add_reloc(struct radeon_cs_context *csc,
     csc->reloc_indices_hashlist[hash] = csc->crelocs;
 
     csc->chunks[1].length_dw += RELOC_DWORDS;
-    csc->crelocs++;
 
     *added_domains = rd | wd;
+    return csc->crelocs++;
 }
 
-static void radeon_drm_cs_add_reloc(struct radeon_winsys_cs *rcs,
-                                    struct radeon_winsys_cs_handle *buf,
-                                    enum radeon_bo_domain rd,
-                                    enum radeon_bo_domain wd)
+static unsigned radeon_drm_cs_add_reloc(struct radeon_winsys_cs *rcs,
+                                        struct radeon_winsys_cs_handle *buf,
+                                        enum radeon_bo_domain rd,
+                                        enum radeon_bo_domain wd)
 {
     struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     struct radeon_bo *bo = (struct radeon_bo*)buf;
     enum radeon_bo_domain added_domains;
 
-    radeon_add_reloc(cs->csc, bo, rd, wd, &added_domains);
-
-    if (!added_domains)
-        return;
+    unsigned index = radeon_add_reloc(cs->csc, bo, rd, wd, &added_domains);
 
     if (added_domains & RADEON_DOMAIN_GTT)
         cs->csc->used_gart += bo->size;
     if (added_domains & RADEON_DOMAIN_VRAM)
         cs->csc->used_vram += bo->size;
+
+    return index;
 }
 
 static boolean radeon_drm_cs_validate(struct radeon_winsys_cs *rcs)
 {
     struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
+    boolean status =
+        cs->csc->used_gart < cs->ws->info.gart_size * 0.8 &&
+        cs->csc->used_vram < cs->ws->info.vram_size * 0.8;
+
+    if (status) {
+        cs->csc->validated_crelocs = cs->csc->crelocs;
+    } else {
+        /* Remove lately-added relocations. The validation failed with them
+         * and the CS is about to be flushed because of that. Keep only
+         * the already-validated relocations. */
+        unsigned i;
+
+        for (i = cs->csc->validated_crelocs; i < cs->csc->crelocs; i++) {
+            p_atomic_dec(&cs->csc->relocs_bo[i]->num_cs_references);
+            radeon_bo_reference(&cs->csc->relocs_bo[i], NULL);
+        }
+        cs->csc->crelocs = cs->csc->validated_crelocs;
+
+        /* Flush if there are any relocs. Clean up otherwise. */
+        if (cs->csc->crelocs) {
+            cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC);
+        } else {
+            radeon_cs_context_cleanup(cs->csc);
 
-    return cs->csc->used_gart < cs->ws->gart_size * 0.8 &&
-           cs->csc->used_vram < cs->ws->vram_size * 0.8;
+            assert(cs->base.cdw == 0);
+            if (cs->base.cdw != 0) {
+                fprintf(stderr, "radeon: Unexpected error in %s.\n", __func__);
+            }
+        }
+    }
+    return status;
 }
 
 static void radeon_drm_cs_write_reloc(struct radeon_winsys_cs *rcs,
@@ -351,6 +379,8 @@ static PIPE_THREAD_ROUTINE(radeon_drm_cs_emit_ioctl, param)
 
     for (i = 0; i < csc->crelocs; i++)
         p_atomic_dec(&csc->relocs_bo[i]->num_active_ioctls);
+
+    radeon_cs_context_cleanup(csc);
     return NULL;
 }
 
@@ -381,11 +411,6 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags)
         for (i = 0; i < crelocs; i++) {
             /* Update the number of active asynchronous CS ioctls for the buffer. */
             p_atomic_inc(&cs->csc->relocs_bo[i]->num_active_ioctls);
-
-            /* Update whether the buffer is busy for write. */
-            if (cs->csc->relocs[i].write_domain) {
-                cs->csc->relocs_bo[i]->busy_for_write = TRUE;
-            }
         }
 
         if (cs->ws->num_cpus > 1 && debug_get_option_thread() &&
@@ -395,6 +420,8 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags)
         } else {
             radeon_drm_cs_emit_ioctl(cs->csc);
         }
+    } else {
+        radeon_cs_context_cleanup(cs->csc);
     }
 
     /* Flip command streams. */
@@ -403,8 +430,6 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags)
     cs->cst = tmp;
 
     /* Prepare a new CS. */
-    radeon_cs_context_cleanup(cs->csc);
-
     cs->base.buf = cs->csc->buf;
     cs->base.cdw = 0;
 }
@@ -447,6 +472,6 @@ void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws)
     ws->base.cs_validate = radeon_drm_cs_validate;
     ws->base.cs_write_reloc = radeon_drm_cs_write_reloc;
     ws->base.cs_flush = radeon_drm_cs_flush;
-    ws->base.cs_set_flush = radeon_drm_cs_set_flush;
+    ws->base.cs_set_flush_callback = radeon_drm_cs_set_flush;
     ws->base.cs_is_buffer_referenced = radeon_bo_is_referenced;
 }
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
index 339beedc6ab..fe285326884 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
@@ -41,6 +41,7 @@ struct radeon_cs_context {
     /* Relocs. */
     unsigned                    nrelocs;
     unsigned                    crelocs;
+    unsigned			validated_crelocs;
     struct radeon_bo            **relocs_bo;
     struct drm_radeon_cs_reloc  *relocs;
 
@@ -88,8 +89,9 @@ static INLINE boolean
 radeon_bo_is_referenced_by_cs(struct radeon_drm_cs *cs,
                               struct radeon_bo *bo)
 {
-    return bo->num_cs_references == bo->rws->num_cs ||
-           (bo->num_cs_references && radeon_get_reloc(cs->csc, bo) != -1);
+    int num_refs = bo->num_cs_references;
+    return num_refs == bo->rws->num_cs ||
+           (num_refs && radeon_get_reloc(cs->csc, bo) != -1);
 }
 
 static INLINE boolean
@@ -111,7 +113,7 @@ radeon_bo_is_referenced_by_cs_for_write(struct radeon_drm_cs *cs,
 static INLINE boolean
 radeon_bo_is_referenced_by_any_cs(struct radeon_bo *bo)
 {
-    return bo->num_cs_references;
+    return bo->num_cs_references != 0;
 }
 
 void radeon_drm_cs_sync_flush(struct radeon_drm_cs *cs);
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 0474b381ade..e234321d934 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -41,13 +41,34 @@
 #include <xf86drm.h>
 #include <stdio.h>
 
+#ifndef RADEON_INFO_TILING_CONFIG
+#define RADEON_INFO_TILING_CONFIG 6
+#endif
+
 #ifndef RADEON_INFO_WANT_HYPERZ
 #define RADEON_INFO_WANT_HYPERZ 7
 #endif
+
 #ifndef RADEON_INFO_WANT_CMASK
 #define RADEON_INFO_WANT_CMASK 8
 #endif
 
+#ifndef RADEON_INFO_CLOCK_CRYSTAL_FREQ
+#define RADEON_INFO_CLOCK_CRYSTAL_FREQ 9
+#endif
+
+#ifndef RADEON_INFO_NUM_BACKENDS
+#define RADEON_INFO_NUM_BACKENDS 0xa
+#endif
+
+#ifndef RADEON_INFO_NUM_TILE_PIPES
+#define RADEON_INFO_NUM_TILE_PIPES 0xb
+#endif
+
+#ifndef RADEON_INFO_BACKEND_MAP
+#define RADEON_INFO_BACKEND_MAP 0xd
+#endif
+
 /* Enable/disable feature access for one command stream.
  * If enable == TRUE, return TRUE on success.
  * Otherwise, return FALSE.
@@ -103,17 +124,31 @@ static boolean radeon_set_fd_access(struct radeon_drm_cs *applier,
     return FALSE;
 }
 
+static boolean radeon_get_drm_value(int fd, unsigned request,
+                                    const char *errname, uint32_t *out)
+{
+    struct drm_radeon_info info = {0};
+    int retval;
+
+    info.value = (unsigned long)out;
+    info.request = request;
+
+    retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
+    if (retval && errname) {
+        fprintf(stderr, "radeon: Failed to get %s, error number %d\n",
+                errname, retval);
+        return FALSE;
+    }
+    return TRUE;
+}
+
 /* Helper function to do the ioctls needed for setup and init. */
-static void do_ioctls(struct radeon_drm_winsys *winsys)
+static boolean do_winsys_init(struct radeon_drm_winsys *ws)
 {
     struct drm_radeon_gem_info gem_info = {0};
-    struct drm_radeon_info info = {0};
-    int target = 0;
     int retval;
     drmVersionPtr version;
 
-    info.value = (unsigned long)&target;
-
     /* We do things in a specific order here.
      *
      * DRM version first. We need to be sure we're running on a KMS chipset.
@@ -123,71 +158,108 @@ static void do_ioctls(struct radeon_drm_winsys *winsys)
      * for all Radeons. If this fails, we probably got handed an FD for some
      * non-Radeon card.
      *
+     * The GEM info is actually bogus on the kernel side, as well as our side
+     * (see radeon_gem_info_ioctl in radeon_gem.c) but that's alright because
+     * we don't actually use the info for anything yet.
+     *
      * The GB and Z pipe requests should always succeed, but they might not
      * return sensical values for all chipsets, but that's alright because
      * the pipe drivers already know that.
-     *
-     * The GEM info is actually bogus on the kernel side, as well as our side
-     * (see radeon_gem_info_ioctl in radeon_gem.c) but that's alright because
-     * we don't actually use the info for anything yet. */
+     */
 
-    version = drmGetVersion(winsys->fd);
+    /* Get DRM version. */
+    version = drmGetVersion(ws->fd);
     if (version->version_major != 2 ||
         version->version_minor < 3) {
         fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is "
-                "only compatible with 2.3.x (kernel 2.6.34) and later.\n",
+                "only compatible with 2.3.x (kernel 2.6.34) or later.\n",
                 __FUNCTION__,
                 version->version_major,
                 version->version_minor,
                 version->version_patchlevel);
         drmFreeVersion(version);
-        exit(1);
+        return FALSE;
     }
 
-    winsys->drm_major = version->version_major;
-    winsys->drm_minor = version->version_minor;
-    winsys->drm_patchlevel = version->version_patchlevel;
+    ws->info.drm_major = version->version_major;
+    ws->info.drm_minor = version->version_minor;
+    ws->info.drm_patchlevel = version->version_patchlevel;
+    drmFreeVersion(version);
 
-    info.request = RADEON_INFO_DEVICE_ID;
-    retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_INFO, &info, sizeof(info));
-    if (retval) {
-        fprintf(stderr, "%s: Failed to get PCI ID, "
-                "error number %d\n", __FUNCTION__, retval);
-        exit(1);
-    }
-    winsys->pci_id = target;
+    /* Get PCI ID. */
+    if (!radeon_get_drm_value(ws->fd, RADEON_INFO_DEVICE_ID, "PCI ID",
+                              &ws->info.pci_id))
+        return FALSE;
 
-    info.request = RADEON_INFO_NUM_GB_PIPES;
-    retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_INFO, &info, sizeof(info));
-    if (retval) {
-        fprintf(stderr, "%s: Failed to get GB pipe count, "
-                "error number %d\n", __FUNCTION__, retval);
-        exit(1);
-    }
-    winsys->gb_pipes = target;
+    /* Check PCI ID. */
+    switch (ws->info.pci_id) {
+#define CHIPSET(pci_id, name, family) case pci_id:
+#include "pci_ids/r300_pci_ids.h"
+#undef CHIPSET
+        ws->gen = R300;
+        break;
 
-    info.request = RADEON_INFO_NUM_Z_PIPES;
-    retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_INFO, &info, sizeof(info));
-    if (retval) {
-        fprintf(stderr, "%s: Failed to get Z pipe count, "
-                "error number %d\n", __FUNCTION__, retval);
-        exit(1);
+#define CHIPSET(pci_id, name, family) case pci_id:
+#include "pci_ids/r600_pci_ids.h"
+#undef CHIPSET
+        ws->gen = R600;
+        break;
+
+    default:
+        fprintf(stderr, "radeon: Invalid PCI ID.\n");
+        return FALSE;
     }
-    winsys->z_pipes = target;
 
-    retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_GEM_INFO,
+    /* Get GEM info. */
+    retval = drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_INFO,
             &gem_info, sizeof(gem_info));
     if (retval) {
-        fprintf(stderr, "%s: Failed to get MM info, error number %d\n",
-                __FUNCTION__, retval);
-        exit(1);
+        fprintf(stderr, "radeon: Failed to get MM info, error number %d\n",
+                retval);
+        return FALSE;
     }
-    winsys->gart_size = gem_info.gart_size;
-    winsys->vram_size = gem_info.vram_size;
+    ws->info.gart_size = gem_info.gart_size;
+    ws->info.vram_size = gem_info.vram_size;
 
-    drmFreeVersion(version);
+    ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
+
+    /* Generation-specific queries. */
+    if (ws->gen == R300) {
+        if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_GB_PIPES,
+                                  "GB pipe count",
+                                  &ws->info.r300_num_gb_pipes))
+            return FALSE;
 
-    winsys->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
+        if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_Z_PIPES,
+                                  "Z pipe count",
+                                  &ws->info.r300_num_z_pipes))
+            return FALSE;
+    }
+    else if (ws->gen == R600) {
+        if (ws->info.drm_minor >= 9 &&
+            !radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_BACKENDS,
+                                  "num backends",
+                                  &ws->info.r600_num_backends))
+            return FALSE;
+
+        /* get the GPU counter frequency, failure is not fatal */
+        radeon_get_drm_value(ws->fd, RADEON_INFO_CLOCK_CRYSTAL_FREQ, NULL,
+                             &ws->info.r600_clock_crystal_freq);
+
+        radeon_get_drm_value(ws->fd, RADEON_INFO_TILING_CONFIG, NULL,
+                             &ws->info.r600_tiling_config);
+
+        if (ws->info.drm_minor >= 11) {
+            radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_TILE_PIPES, NULL,
+                                 &ws->info.r600_num_tile_pipes);
+
+            if (radeon_get_drm_value(ws->fd, RADEON_INFO_BACKEND_MAP, NULL,
+                                      &ws->info.r600_backend_map))
+                ws->info.r600_backend_map_valid = TRUE;
+        }
+    }
+
+    return TRUE;
 }
 
 static void radeon_winsys_destroy(struct radeon_winsys *rws)
@@ -202,34 +274,10 @@ static void radeon_winsys_destroy(struct radeon_winsys *rws)
     FREE(rws);
 }
 
-static uint32_t radeon_get_value(struct radeon_winsys *rws,
-                                 enum radeon_value_id id)
+static void radeon_query_info(struct radeon_winsys *rws,
+                              struct radeon_info *info)
 {
-    struct radeon_drm_winsys *ws = (struct radeon_drm_winsys *)rws;
-
-    switch(id) {
-    case RADEON_VID_PCI_ID:
-	return ws->pci_id;
-    case RADEON_VID_R300_GB_PIPES:
-	return ws->gb_pipes;
-    case RADEON_VID_R300_Z_PIPES:
-	return ws->z_pipes;
-    case RADEON_VID_GART_SIZE:
-        return ws->gart_size;
-    case RADEON_VID_VRAM_SIZE:
-        return ws->vram_size;
-    case RADEON_VID_DRM_MAJOR:
-        return ws->drm_major;
-    case RADEON_VID_DRM_MINOR:
-        return ws->drm_minor;
-    case RADEON_VID_DRM_PATCHLEVEL:
-        return ws->drm_patchlevel;
-    case RADEON_VID_DRM_2_6_0:
-        return ws->drm_major*100 + ws->drm_minor >= 206;
-    case RADEON_VID_DRM_2_8_0:
-        return ws->drm_major*100 + ws->drm_minor >= 208;
-    }
-    return 0;
+    *info = ((struct radeon_drm_winsys *)rws)->info;
 }
 
 static boolean radeon_cs_request_feature(struct radeon_winsys_cs *rcs,
@@ -239,7 +287,7 @@ static boolean radeon_cs_request_feature(struct radeon_winsys_cs *rcs,
     struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
 
     switch (fid) {
-    case RADEON_FID_HYPERZ_RAM_ACCESS:
+    case RADEON_FID_R300_HYPERZ_ACCESS:
         if (debug_get_bool_option("RADEON_HYPERZ", FALSE)) {
             return radeon_set_fd_access(cs, &cs->ws->hyperz_owner,
                                         &cs->ws->hyperz_owner_mutex,
@@ -248,7 +296,7 @@ static boolean radeon_cs_request_feature(struct radeon_winsys_cs *rcs,
             return FALSE;
         }
 
-    case RADEON_FID_CMASK_RAM_ACCESS:
+    case RADEON_FID_R300_CMASK_ACCESS:
         if (debug_get_bool_option("RADEON_CMASK", FALSE)) {
             return radeon_set_fd_access(cs, &cs->ws->cmask_owner,
                                         &cs->ws->cmask_owner_mutex,
@@ -268,16 +316,9 @@ struct radeon_winsys *radeon_drm_winsys_create(int fd)
     }
 
     ws->fd = fd;
-    do_ioctls(ws);
 
-    switch (ws->pci_id) {
-#define CHIPSET(pci_id, name, family) case pci_id:
-#include "pci_ids/r300_pci_ids.h"
-#undef CHIPSET
-       break;
-    default:
-       goto fail;
-    }
+    if (!do_winsys_init(ws))
+        goto fail;
 
     /* Create managers. */
     ws->kman = radeon_bomgr_create(ws);
@@ -289,7 +330,7 @@ struct radeon_winsys *radeon_drm_winsys_create(int fd)
 
     /* Set functions. */
     ws->base.destroy = radeon_winsys_destroy;
-    ws->base.get_value = radeon_get_value;
+    ws->base.query_info = radeon_query_info;
     ws->base.cs_request_feature = radeon_cs_request_feature;
 
     radeon_bomgr_init_functions(ws);
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
index d5186bc4d17..69216448496 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
@@ -31,29 +31,27 @@
 #define RADEON_DRM_WINSYS_H
 
 #include "radeon_winsys.h"
-
 #include "os/os_thread.h"
 
+enum radeon_generation {
+    R300,
+    R600
+};
+
 struct radeon_drm_winsys {
     struct radeon_winsys base;
 
     int fd; /* DRM file descriptor */
     int num_cs; /* The number of command streams created. */
 
+    enum radeon_generation gen;
+    struct radeon_info info;
+
     struct pb_manager *kman;
     struct pb_manager *cman;
 
-    uint32_t pci_id;        /* PCI ID */
-    uint32_t gb_pipes;      /* GB pipe count */
-    uint32_t z_pipes;       /* Z pipe count (rv530 only) */
-    uint32_t gart_size;     /* GART size. */
-    uint32_t vram_size;     /* VRAM size. */
     uint32_t num_cpus;      /* Number of CPUs. */
 
-    unsigned drm_major;
-    unsigned drm_minor;
-    unsigned drm_patchlevel;
-
     struct radeon_drm_cs *hyperz_owner;
     pipe_mutex hyperz_owner_mutex;
     struct radeon_drm_cs *cmask_owner;
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index 3a64e4abc35..90583e3ab8c 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -26,6 +26,20 @@
 
 /* The public winsys interface header for the radeon driver. */
 
+/* R300 features in DRM.
+ *
+ * 2.6.0:
+ * - Hyper-Z
+ * - GB_Z_PEQ_CONFIG on rv350->r4xx
+ * - R500 FG_ALPHA_VALUE
+ *
+ * 2.8.0:
+ * - R500 US_FORMAT regs
+ * - R500 ARGB2101010 colorbuffer
+ * - CMask and AA regs
+ * - R16F/RG16F
+ */
+
 #include "pipebuffer/pb_bufmgr.h"
 #include "pipe/p_defines.h"
 #include "pipe/p_state.h"
@@ -47,6 +61,12 @@ enum radeon_bo_domain { /* bitfield */
     RADEON_DOMAIN_VRAM = 4
 };
 
+enum radeon_bo_usage { /* bitfield */
+    RADEON_USAGE_READ = 2,
+    RADEON_USAGE_WRITE = 4,
+    RADEON_USAGE_READWRITE = RADEON_USAGE_READ | RADEON_USAGE_WRITE
+};
+
 struct winsys_handle;
 struct radeon_winsys_cs_handle;   /* for write_reloc etc. */
 
@@ -55,43 +75,29 @@ struct radeon_winsys_cs {
     uint32_t *buf; /* The command buffer. */
 };
 
-enum radeon_value_id {
-    RADEON_VID_PCI_ID,
-    RADEON_VID_R300_GB_PIPES,
-    RADEON_VID_R300_Z_PIPES,
-    RADEON_VID_GART_SIZE,
-    RADEON_VID_VRAM_SIZE,
-    RADEON_VID_DRM_MAJOR,
-    RADEON_VID_DRM_MINOR,
-    RADEON_VID_DRM_PATCHLEVEL,
-
-    /* These should probably go away: */
-
-    /* R300 features:
-     * - Hyper-Z
-     * - GB_Z_PEQ_CONFIG on rv350->r4xx
-     * - R500 FG_ALPHA_VALUE
-     *
-     * R600 features:
-     * - TBD
-     */
-    RADEON_VID_DRM_2_6_0,
+struct radeon_info {
+    uint32_t pci_id;
+    uint32_t gart_size;
+    uint32_t vram_size;
 
-    /* R300 features:
-     * - R500 US_FORMAT regs
-     * - R500 ARGB2101010 colorbuffer
-     * - CMask and AA regs
-     * - R16F/RG16F
-     *
-     * R600 features:
-     * - TBD
-     */
-    RADEON_VID_DRM_2_8_0,
+    uint32_t drm_major; /* version */
+    uint32_t drm_minor;
+    uint32_t drm_patchlevel;
+
+    uint32_t r300_num_gb_pipes;
+    uint32_t r300_num_z_pipes;
+
+    uint32_t r600_num_backends;
+    uint32_t r600_clock_crystal_freq;
+    uint32_t r600_tiling_config;
+    uint32_t r600_num_tile_pipes;
+    uint32_t r600_backend_map;
+    boolean r600_backend_map_valid;
 };
 
 enum radeon_feature_id {
-    RADEON_FID_HYPERZ_RAM_ACCESS,     /* ZMask + HiZ */
-    RADEON_FID_CMASK_RAM_ACCESS,
+    RADEON_FID_R300_HYPERZ_ACCESS,     /* ZMask + HiZ */
+    RADEON_FID_R300_CMASK_ACCESS,
 };
 
 struct radeon_winsys {
@@ -103,13 +109,13 @@ struct radeon_winsys {
     void (*destroy)(struct radeon_winsys *ws);
 
     /**
-     * Query a system value from a winsys.
+     * Query an info structure from winsys.
      *
      * \param ws        The winsys this function is called from.
-     * \param vid       One of the RADEON_VID_* enums.
+     * \param info      Return structure
      */
-    uint32_t (*get_value)(struct radeon_winsys *ws,
-                          enum radeon_value_id vid);
+    void (*query_info)(struct radeon_winsys *ws,
+                       struct radeon_info *info);
 
     /**************************************************************************
      * Buffer management. Buffer attributes are mostly fixed over its lifetime.
@@ -126,7 +132,6 @@ struct radeon_winsys {
      * \param size      The size to allocate.
      * \param alignment An alignment of the buffer in memory.
      * \param bind      A bitmask of the PIPE_BIND_* flags.
-     * \param usage     A bitmask of the PIPE_USAGE_* flags.
      * \param domain    A bitmask of the RADEON_DOMAIN_* flags.
      * \return          The created buffer object.
      */
@@ -134,7 +139,6 @@ struct radeon_winsys {
                                        unsigned size,
                                        unsigned alignment,
                                        unsigned bind,
-                                       unsigned usage,
                                        enum radeon_bo_domain domain);
 
     struct radeon_winsys_cs_handle *(*buffer_get_cs_handle)(
@@ -164,8 +168,10 @@ struct radeon_winsys {
      * Return TRUE if a buffer object is being used by the GPU.
      *
      * \param buf       A winsys buffer object.
+     * \param usage     Only check whether the buffer is busy for the given usage.
      */
-    boolean (*buffer_is_busy)(struct pb_buffer *buf);
+    boolean (*buffer_is_busy)(struct pb_buffer *buf,
+                              enum radeon_bo_usage usage);
 
     /**
      * Wait for a buffer object until it is not used by a GPU. This is
@@ -173,8 +179,10 @@ struct radeon_winsys {
      * and synchronizing to the fence.
      *
      * \param buf       A winsys buffer object to wait for.
+     * \param usage     Only wait until the buffer is idle for the given usage,
+     *                  but may still be busy for some other usage.
      */
-    void (*buffer_wait)(struct pb_buffer *buf);
+    void (*buffer_wait)(struct pb_buffer *buf, enum radeon_bo_usage usage);
 
     /**
      * Return tiling flags describing a memory layout of a buffer object.
@@ -263,15 +271,18 @@ struct radeon_winsys {
      * \param buf A winsys buffer to validate.
      * \param rd  A read domain containing a bitmask of the RADEON_DOMAIN_* flags.
      * \param wd  A write domain containing a bitmask of the RADEON_DOMAIN_* flags.
+     * \return Relocation index.
      */
-    void (*cs_add_reloc)(struct radeon_winsys_cs *cs,
-                         struct radeon_winsys_cs_handle *buf,
-                         enum radeon_bo_domain rd,
-                         enum radeon_bo_domain wd);
+    unsigned (*cs_add_reloc)(struct radeon_winsys_cs *cs,
+                             struct radeon_winsys_cs_handle *buf,
+                             enum radeon_bo_domain rd,
+                             enum radeon_bo_domain wd);
 
     /**
      * Return TRUE if there is enough memory in VRAM and GTT for the relocs
-     * added so far.
+     * added so far. If the validation fails, all the relocations which have
+     * been added since the last call of cs_validate will be removed and
+     * the CS will be flushed (provided there are still any relocations).
      *
      * \param cs        A command stream to validate.
      */
@@ -304,9 +315,9 @@ struct radeon_winsys {
      * \param flush     A flush callback function associated with the command stream.
      * \param user      A user pointer that will be passed to the flush callback.
      */
-    void (*cs_set_flush)(struct radeon_winsys_cs *cs,
-                         void (*flush)(void *ctx, unsigned flags),
-                         void *user);
+    void (*cs_set_flush_callback)(struct radeon_winsys_cs *cs,
+                                  void (*flush)(void *ctx, unsigned flags),
+                                  void *ctx);
 
     /**
      * Return TRUE if a buffer is referenced by a command stream.
@@ -321,7 +332,8 @@ struct radeon_winsys {
      * Request access to a feature for a command stream.
      *
      * \param cs        A command stream.
-     * \param fid       A winsys buffer.
+     * \param fid       Feature ID, one of RADEON_FID_*
+     * \param enable	Whether to enable or disable the feature.
      */
     boolean (*cs_request_feature)(struct radeon_winsys_cs *cs,
                                   enum radeon_feature_id fid,
diff --git a/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c b/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
index d92ba389d35..afdbd44458d 100644
--- a/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
+++ b/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
@@ -42,7 +42,8 @@
 #include "xf86drm.h"
 #include "vmwgfx_drm.h"
 
-#include <sys/mman.h>
+#include "os/os_mman.h"
+
 #include <errno.h>
 #include <unistd.h>
 
@@ -94,7 +95,7 @@ static void
 vmw_ioctl_fifo_unmap(struct vmw_winsys_screen *vws, void *mapping)
 {
    VMW_FUNC;
-   (void)munmap(mapping, getpagesize());
+   (void)os_munmap(mapping, getpagesize());
 }
 
 
@@ -106,7 +107,7 @@ vmw_ioctl_fifo_map(struct vmw_winsys_screen *vws,
 
    VMW_FUNC;
 
-   map = mmap(NULL, getpagesize(), PROT_READ, MAP_SHARED,
+   map = os_mmap(NULL, getpagesize(), PROT_READ, MAP_SHARED,
 	      vws->ioctl.drm_fd, fifo_offset);
 
    if (map == MAP_FAILED) {
@@ -362,7 +363,7 @@ vmw_ioctl_region_destroy(struct vmw_region *region)
               region->ptr.gmrId, region->ptr.offset);
 
    if (region->data) {
-      munmap(region->data, region->size);
+      os_munmap(region->data, region->size);
       region->data = NULL;
    }
 
@@ -388,7 +389,7 @@ vmw_ioctl_region_map(struct vmw_region *region)
               region->ptr.gmrId, region->ptr.offset);
 
    if (region->data == NULL) {
-      map = mmap(NULL, region->size, PROT_READ | PROT_WRITE, MAP_SHARED,
+      map = os_mmap(NULL, region->size, PROT_READ | PROT_WRITE, MAP_SHARED,
 		 region->drm_fd, region->map_handle);
       if (map == MAP_FAILED) {
 	 debug_printf("%s: Map failed.\n", __FUNCTION__);
diff --git a/src/gallium/winsys/sw/android/Android.mk b/src/gallium/winsys/sw/android/Android.mk
new file mode 100644
index 00000000000..4fb2715a56c
--- /dev/null
+++ b/src/gallium/winsys/sw/android/Android.mk
@@ -0,0 +1,34 @@
+# Mesa 3-D graphics library
+#
+# Copyright (C) 2010-2011 Chia-I Wu <[email protected]>
+# Copyright (C) 2010-2011 LunarG Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+
+LOCAL_PATH := $(call my-dir)
+
+include $(CLEAR_VARS)
+
+LOCAL_SRC_FILES := \
+	android_sw_winsys.cpp
+
+LOCAL_MODULE := libmesa_winsys_sw_android
+
+include $(GALLIUM_COMMON_MK)
+include $(BUILD_STATIC_LIBRARY)
diff --git a/src/gallium/winsys/sw/android/android_sw_winsys.cpp b/src/gallium/winsys/sw/android/android_sw_winsys.cpp
new file mode 100644
index 00000000000..02faf1e0cca
--- /dev/null
+++ b/src/gallium/winsys/sw/android/android_sw_winsys.cpp
@@ -0,0 +1,255 @@
+/*
+ * Mesa 3-D graphics library
+ * Version:  7.12
+ *
+ * Copyright (C) 2010-2011 LunarG Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Chia-I Wu <[email protected]>
+ */
+
+#include "pipe/p_compiler.h"
+#include "pipe/p_state.h"
+#include "util/u_memory.h"
+#include "util/u_format.h"
+#include "state_tracker/sw_winsys.h"
+
+#include <utils/Errors.h>
+#include <private/ui/sw_gralloc_handle.h>
+
+#include <hardware/gralloc.h>
+
+#include "android_sw_winsys.h"
+
+struct android_sw_winsys
+{
+   struct sw_winsys base;
+
+   const gralloc_module_t *grmod;
+};
+
+struct android_sw_displaytarget
+{
+   buffer_handle_t handle;
+   int stride;
+   int width, height;
+   int usage; /* gralloc usage */
+
+   void *mapped;
+};
+
+static INLINE struct android_sw_winsys *
+android_sw_winsys(struct sw_winsys *ws)
+{
+   return (struct android_sw_winsys *) ws;
+}
+
+static INLINE struct android_sw_displaytarget *
+android_sw_displaytarget(struct sw_displaytarget *dt)
+{
+   return (struct android_sw_displaytarget *) dt;
+}
+
+namespace android {
+
+static void
+android_displaytarget_display(struct sw_winsys *ws,
+                              struct sw_displaytarget *dt,
+                              void *context_private)
+{
+}
+
+static struct sw_displaytarget *
+android_displaytarget_create(struct sw_winsys *ws,
+                             unsigned tex_usage,
+                             enum pipe_format format,
+                             unsigned width, unsigned height,
+                             unsigned alignment,
+                             unsigned *stride)
+{
+   return NULL;
+}
+
+static void
+android_displaytarget_destroy(struct sw_winsys *ws,
+                              struct sw_displaytarget *dt)
+{
+   struct android_sw_displaytarget *adt = android_sw_displaytarget(dt);
+
+   assert(!adt->mapped);
+   FREE(adt);
+}
+
+static void
+android_displaytarget_unmap(struct sw_winsys *ws,
+                            struct sw_displaytarget *dt)
+{
+   struct android_sw_winsys *droid = android_sw_winsys(ws);
+   struct android_sw_displaytarget *adt = android_sw_displaytarget(dt);
+
+   if (adt->mapped) {
+      if (sw_gralloc_handle_t::validate(adt->handle) >= 0) {
+         adt->mapped = NULL;
+      }
+      else {
+         droid->grmod->unlock(droid->grmod, adt->handle);
+         adt->mapped = NULL;
+      }
+   }
+}
+
+static void *
+android_displaytarget_map(struct sw_winsys *ws,
+                          struct sw_displaytarget *dt,
+                          unsigned flags)
+{
+   struct android_sw_winsys *droid = android_sw_winsys(ws);
+   struct android_sw_displaytarget *adt = android_sw_displaytarget(dt);
+
+   if (!adt->mapped) {
+      if (sw_gralloc_handle_t::validate(adt->handle) >= 0) {
+         const sw_gralloc_handle_t *swhandle =
+            reinterpret_cast<const sw_gralloc_handle_t *>(adt->handle);
+         adt->mapped = reinterpret_cast<void *>(swhandle->base);
+      }
+      else {
+         /* lock the buffer for CPU access */
+         droid->grmod->lock(droid->grmod, adt->handle,
+               adt->usage, 0, 0, adt->width, adt->height, &adt->mapped);
+      }
+   }
+
+   return adt->mapped;
+}
+
+static struct sw_displaytarget *
+android_displaytarget_from_handle(struct sw_winsys *ws,
+                                  const struct pipe_resource *templ,
+                                  struct winsys_handle *whandle,
+                                  unsigned *stride)
+{
+   struct android_winsys_handle *ahandle =
+      (struct android_winsys_handle *) whandle;
+   struct android_sw_displaytarget *adt;
+
+   adt = CALLOC_STRUCT(android_sw_displaytarget);
+   if (!adt)
+      return NULL;
+
+   adt->handle = ahandle->handle;
+   adt->stride = ahandle->stride;
+   adt->width = templ->width0;
+   adt->height = templ->height0;
+
+   if (templ->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_TRANSFER_WRITE))
+      adt->usage |= GRALLOC_USAGE_SW_WRITE_OFTEN;
+   if (templ->bind & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_TRANSFER_READ))
+      adt->usage |= GRALLOC_USAGE_SW_READ_OFTEN;
+
+   if (stride)
+      *stride = adt->stride;
+
+   return reinterpret_cast<struct sw_displaytarget *>(adt);
+}
+
+static boolean
+android_displaytarget_get_handle(struct sw_winsys *ws,
+                                 struct sw_displaytarget *dt,
+                                 struct winsys_handle *whandle)
+{
+   return FALSE;
+}
+
+static boolean
+android_is_displaytarget_format_supported(struct sw_winsys *ws,
+                                          unsigned tex_usage,
+                                          enum pipe_format format)
+{
+   struct android_sw_winsys *droid = android_sw_winsys(ws);
+   int fmt = -1;
+
+   switch (format) {
+   case PIPE_FORMAT_R8G8B8A8_UNORM:
+      fmt = HAL_PIXEL_FORMAT_RGBA_8888;
+      break;
+   case PIPE_FORMAT_R8G8B8X8_UNORM:
+      fmt = HAL_PIXEL_FORMAT_RGBX_8888;
+      break;
+   case PIPE_FORMAT_R8G8B8_UNORM:
+      fmt = HAL_PIXEL_FORMAT_RGB_888;
+      break;
+   case PIPE_FORMAT_B5G6R5_UNORM:
+      fmt = HAL_PIXEL_FORMAT_RGB_565;
+      break;
+   case PIPE_FORMAT_B8G8R8A8_UNORM:
+      fmt = HAL_PIXEL_FORMAT_BGRA_8888;
+      break;
+   default:
+      break;
+   }
+
+   return (fmt != -1);
+}
+
+static void
+android_destroy(struct sw_winsys *ws)
+{
+   struct android_sw_winsys *droid = android_sw_winsys(ws);
+
+   FREE(droid);
+}
+
+}; /* namespace android */
+
+using namespace android;
+
+struct sw_winsys *
+android_create_sw_winsys(void)
+{
+   struct android_sw_winsys *droid;
+   const hw_module_t *mod;
+
+   droid = CALLOC_STRUCT(android_sw_winsys);
+   if (!droid)
+      return NULL;
+
+   if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID, &mod)) {
+      FREE(droid);
+      return NULL;
+   }
+
+   droid->grmod = (const gralloc_module_t *) mod;
+
+   droid->base.destroy = android_destroy;
+   droid->base.is_displaytarget_format_supported =
+      android_is_displaytarget_format_supported;
+
+   droid->base.displaytarget_create = android_displaytarget_create;
+   droid->base.displaytarget_destroy = android_displaytarget_destroy;
+   droid->base.displaytarget_from_handle = android_displaytarget_from_handle;
+   droid->base.displaytarget_get_handle = android_displaytarget_get_handle;
+
+   droid->base.displaytarget_map = android_displaytarget_map;
+   droid->base.displaytarget_unmap = android_displaytarget_unmap;
+   droid->base.displaytarget_display = android_displaytarget_display;
+
+   return &droid->base;
+}
diff --git a/src/gallium/winsys/sw/android/android_sw_winsys.h b/src/gallium/winsys/sw/android/android_sw_winsys.h
new file mode 100644
index 00000000000..79392dc0f97
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+++ b/src/gallium/winsys/sw/android/android_sw_winsys.h
@@ -0,0 +1,49 @@
+/*
+ * Mesa 3-D graphics library
+ * Version:  7.12
+ *
+ * Copyright (C) 2010-2011 LunarG Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Chia-I Wu <[email protected]>
+ */
+
+#ifndef ANDROID_SW_WINSYS
+#define ANDROID_SW_WINSYS
+
+#include <sys/cdefs.h>
+#include <hardware/gralloc.h>
+
+__BEGIN_DECLS
+
+struct sw_winsys;
+
+struct android_winsys_handle {
+   buffer_handle_t handle;
+   int stride;
+};
+
+struct sw_winsys *
+android_create_sw_winsys(void);
+
+__END_DECLS
+
+#endif /* ANDROID_SW_WINSYS */