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authorTom Stellard <[email protected]>2012-03-20 13:33:37 -0400
committerTom Stellard <[email protected]>2012-05-02 09:39:10 -0400
commitd0f6274489d4e4b9ce48cc377f502b0ccf64fae6 (patch)
tree20234ad8035ce2eb514ada1f82559f1afefa8967 /src/gallium/winsys/radeon
parente42df8e10a83e76565474f82330d34403da71b49 (diff)
winsys/radeon: Get max_pipes from the kernel
Signed-off-by: Tom Stellard <[email protected]>
Diffstat (limited to 'src/gallium/winsys/radeon')
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_winsys.c10
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_winsys.h1
2 files changed, 11 insertions, 0 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 4d343b8489b..fc57d676876 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -81,6 +81,10 @@
#define RADEON_INFO_IB_VM_MAX_SIZE 0x0f
#endif
+#ifndef RADEON_INFO_MAX_PIPES
+#define RADEON_INFO_MAX_PIPES 0x10
+#endif
+
/* Enable/disable feature access for one command stream.
* If enable == TRUE, return TRUE on success.
@@ -299,6 +303,12 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
ws->info.r600_has_streamout = ws->info.drm_minor >= 13;
}
+ /* Get max pipes, this is only needed for compute shaders. All evergreen+
+ * chips have at least 2 pipes, so we use 2 as a default. */
+ ws->info.r600_max_pipes = 2;
+ radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_PIPES, NULL,
+ &ws->info.r600_max_pipes);
+
return TRUE;
}
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index 99768248644..6f85b3e11d2 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -98,6 +98,7 @@ struct radeon_info {
uint32_t r600_va_start;
uint32_t r600_ib_vm_max_size;
boolean r600_has_streamout;
+ uint32_t r600_max_pipes;
};
enum radeon_feature_id {