r600g: use r600_bo for relocation argument, simplify code

Signed-off-by: Jerome Glisse <[email protected]>

4 files changed, 29 insertions, 19 deletions

diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
index f51b14e48ec..ff2c48e770e 100644
--- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c
+++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
@@ -39,9 +39,6 @@
 #include <pipebuffer/pb_bufmgr.h>
 #include "r600_priv.h"
 
-struct radeon_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset);
-int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg);
-
 #define GROUP_FORCE_NEW_BLOCK	0
 
 static const struct r600_reg evergreen_config_reg_list[] = {
@@ -747,8 +744,8 @@ void evergreen_context_pipe_state_set_vs_sampler(struct r600_context *ctx, struc
 
 void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *draw)
 {
-	struct radeon_bo *cb[12];
-	struct radeon_bo *db;
+	struct r600_bo *cb[12];
+	struct r600_bo *db;
 	unsigned ndwords = 9;
 
 	if (draw->indices) {
@@ -823,7 +820,7 @@ void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *dr
 		ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_draw_initiator;
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0);
 		ctx->pm4[ctx->pm4_cdwords++] = 0;
-		r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], radeon_bo_pb_get_bo(draw->indices->pb));
+		r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], draw->indices);
 	} else {
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_DRAW_INDEX_AUTO, 1);
 		ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_num_indices;
diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c
index 61e3fbcc9ab..7a908b3ca4d 100644
--- a/src/gallium/winsys/r600/drm/r600_hw_context.c
+++ b/src/gallium/winsys/r600/drm/r600_hw_context.c
@@ -705,10 +705,12 @@ out_err:
 	return r;
 }
 
-void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct radeon_bo *bo)
+void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct r600_bo *rbo)
 {
+	struct radeon_bo *bo;
 	int i, reloc_id;
 
+	bo = r600_bo_get_bo(rbo);
 	assert(bo != NULL);
 	for (i = 0, reloc_id = -1; i < ctx->creloc; i++) {
 		if (ctx->reloc[i].handle == bo->handle) {
@@ -881,7 +883,7 @@ void r600_context_pipe_state_set_vs_sampler(struct r600_context *ctx, struct r60
 	r600_context_pipe_state_set_sampler_border(ctx, state, offset);
 }
 
-struct radeon_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset)
+struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset)
 {
 	struct r600_range *range;
 	struct r600_block *block;
@@ -892,15 +894,15 @@ struct radeon_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset)
 	offset -= block->start_offset;
 	id = block->pm4_bo_index[offset >> 2];
 	if (block->reloc[id].bo) {
-		return radeon_bo_pb_get_bo(block->reloc[id].bo->pb);
+		return block->reloc[id].bo;
 	}
 	return NULL;
 }
 
 void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw)
 {
-	struct radeon_bo *cb[8];
-	struct radeon_bo *db;
+	struct r600_bo *cb[8];
+	struct r600_bo *db;
 	unsigned ndwords = 9;
 
 	if (draw->indices) {
@@ -973,7 +975,7 @@ void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw)
 		ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_draw_initiator;
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0);
 		ctx->pm4[ctx->pm4_cdwords++] = 0;
-		r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], radeon_bo_pb_get_bo(draw->indices->pb));
+		r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], draw->indices);
 	} else {
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_DRAW_INDEX_AUTO, 1);
 		ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_num_indices;
@@ -1184,7 +1186,7 @@ void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
 	ctx->pm4[ctx->pm4_cdwords++] = 0;
 	ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0);
 	ctx->pm4[ctx->pm4_cdwords++] = 0;
-	r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], radeon_bo_pb_get_bo(query->buffer->pb));
+	r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], query->buffer);
 
 	query->state |= R600_QUERY_STATE_STARTED;
 	query->state ^= R600_QUERY_STATE_ENDED;
@@ -1200,7 +1202,7 @@ void r600_query_end(struct r600_context *ctx, struct r600_query *query)
 	ctx->pm4[ctx->pm4_cdwords++] = 0;
 	ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0);
 	ctx->pm4[ctx->pm4_cdwords++] = 0;
-	r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], radeon_bo_pb_get_bo(query->buffer->pb));
+	r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], query->buffer);
 
 	query->num_results += 16;
 	query->state ^= R600_QUERY_STATE_STARTED;
diff --git a/src/gallium/winsys/r600/drm/r600_priv.h b/src/gallium/winsys/r600/drm/r600_priv.h
index 4bd2c278bc7..5c954ea6213 100644
--- a/src/gallium/winsys/r600/drm/r600_priv.h
+++ b/src/gallium/winsys/r600/drm/r600_priv.h
@@ -68,6 +68,7 @@ struct radeon_bo {
 struct r600_bo {
 	struct pipe_reference		reference;
 	struct pb_buffer		*pb;
+	unsigned			size;
 };
 
 
@@ -78,8 +79,6 @@ unsigned radeon_family_from_device(unsigned device);
 struct radeon *radeon_decref(struct radeon *radeon);
 
 /* radeon_bo.c */
-struct radeon_bo *radeon_bo_pb_get_bo(struct pb_buffer *_buf);
-void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct radeon_bo *bo);
 struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle,
 			    unsigned size, unsigned alignment, void *ptr);
 void radeon_bo_reference(struct radeon *radeon, struct radeon_bo **dst,
@@ -89,13 +88,23 @@ int radeon_bo_busy(struct radeon *radeon, struct radeon_bo *bo, uint32_t *domain
 void radeon_bo_pbmgr_flush_maps(struct pb_manager *_mgr);
 
 /* radeon_bo_pb.c */
+struct radeon_bo *radeon_bo_pb_get_bo(struct pb_buffer *_buf);
 struct pb_manager *radeon_bo_pbmgr_create(struct radeon *radeon);
 struct pb_buffer *radeon_bo_pb_create_buffer_from_handle(struct pb_manager *_mgr,
 							 uint32_t handle);
 
+/* r600_hw_context.c */
+void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct r600_bo *rbo);
+struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset);
+int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg);
+
 /* r600_bo.c */
 unsigned r600_bo_get_handle(struct r600_bo *bo);
 unsigned r600_bo_get_size(struct r600_bo *bo);
+static INLINE struct radeon_bo *r600_bo_get_bo(struct r600_bo *bo)
+{
+	return radeon_bo_pb_get_bo(bo->pb);
+}
 
 #define CTX_RANGE_ID(ctx, offset) (((offset) >> (ctx)->hash_shift) & 255)
 #define CTX_BLOCK_ID(ctx, offset) ((offset) & ((1 << (ctx)->hash_shift) - 1))
@@ -122,18 +131,16 @@ static void inline r600_context_reg(struct r600_context *ctx,
 
 static inline void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block)
 {
-	struct radeon_bo *bo;
 	int id;
 
 	for (int j = 0; j < block->nreg; j++) {
 		if (block->pm4_bo_index[j]) {
 			/* find relocation */
 			id = block->pm4_bo_index[j];
-			bo = radeon_bo_pb_get_bo(block->reloc[id].bo->pb);
 			for (int k = 0; k < block->reloc[id].nreloc; k++) {
 				r600_context_bo_reloc(ctx,
 					&block->pm4[block->reloc[id].bo_pm4_index[k]],
-					bo);
+					block->reloc[id].bo);
 			}
 		}
 	}
diff --git a/src/gallium/winsys/r600/drm/radeon_ws_bo.c b/src/gallium/winsys/r600/drm/radeon_ws_bo.c
index a502c7e2521..8089c916404 100644
--- a/src/gallium/winsys/r600/drm/radeon_ws_bo.c
+++ b/src/gallium/winsys/r600/drm/radeon_ws_bo.c
@@ -37,6 +37,7 @@ struct r600_bo *r600_bo(struct radeon *radeon,
 
 	desc.alignment = alignment;
 	desc.usage = usage;
+	ws_bo->size = size;
 
 	if (!radeon->use_mem_constant && (usage & PIPE_BIND_CONSTANT_BUFFER)) {
 		man = radeon->mman;
@@ -59,12 +60,15 @@ struct r600_bo *r600_bo_handle(struct radeon *radeon,
 					 unsigned handle)
 {
 	struct r600_bo *ws_bo = calloc(1, sizeof(struct r600_bo));
+	struct radeon_bo *bo;
 
 	ws_bo->pb = radeon_bo_pb_create_buffer_from_handle(radeon->kman, handle);
 	if (!ws_bo->pb) {
 		free(ws_bo);
 		return NULL;
 	}
+	bo = radeon_bo_pb_get_bo(ws_bo->pb);
+	ws_bo->size = bo->size;
 	pipe_reference_init(&ws_bo->reference, 1);
 	return ws_bo;
 }