gallium/radeon/winsyses: boolean -> bool, TRUE -> true, FALSE -> false

Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Vedran Miletić <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>

4 files changed, 38 insertions, 37 deletions

diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index aa415c47e57..b4dc6c7901a 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
@@ -619,10 +619,10 @@ error:
    return NULL;
 }
 
-static boolean amdgpu_bo_get_handle(struct pb_buffer *buffer,
-                                    unsigned stride, unsigned offset,
-                                    unsigned slice_size,
-                                    struct winsys_handle *whandle)
+static bool amdgpu_bo_get_handle(struct pb_buffer *buffer,
+                                 unsigned stride, unsigned offset,
+                                 unsigned slice_size,
+                                 struct winsys_handle *whandle)
 {
    struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(buffer);
    enum amdgpu_bo_handle_type type;
@@ -641,18 +641,18 @@ static boolean amdgpu_bo_get_handle(struct pb_buffer *buffer,
       type = amdgpu_bo_handle_type_kms;
       break;
    default:
-      return FALSE;
+      return false;
    }
 
    r = amdgpu_bo_export(bo->bo, type, &whandle->handle);
    if (r)
-      return FALSE;
+      return false;
 
    whandle->stride = stride;
    whandle->offset = offset;
    whandle->offset += slice_size * whandle->layer;
    bo->is_shared = true;
-   return TRUE;
+   return true;
 }
 
 static struct pb_buffer *amdgpu_bo_from_ptr(struct radeon_winsys *rws,
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 8c1e9fbb11f..740bfd1494f 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -118,7 +118,7 @@ bool amdgpu_fence_wait(struct pipe_fence_handle *fence, uint64_t timeout,
 				    &expired);
    if (r) {
       fprintf(stderr, "amdgpu: amdgpu_cs_query_fence_status failed.\n");
-      return FALSE;
+      return false;
    }
 
    if (expired) {
@@ -497,8 +497,8 @@ static void amdgpu_ib_finalize(struct amdgpu_ib *ib)
    ib->max_ib_size = MAX2(ib->max_ib_size, ib->base.prev_dw + ib->base.current.cdw);
 }
 
-static boolean amdgpu_init_cs_context(struct amdgpu_cs_context *cs,
-                                      enum ring_type ring_type)
+static bool amdgpu_init_cs_context(struct amdgpu_cs_context *cs,
+                                   enum ring_type ring_type)
 {
    int i;
 
@@ -529,20 +529,20 @@ static boolean amdgpu_init_cs_context(struct amdgpu_cs_context *cs,
    cs->buffers = (struct amdgpu_cs_buffer*)
                   CALLOC(1, cs->max_num_buffers * sizeof(struct amdgpu_cs_buffer));
    if (!cs->buffers) {
-      return FALSE;
+      return false;
    }
 
    cs->handles = CALLOC(1, cs->max_num_buffers * sizeof(amdgpu_bo_handle));
    if (!cs->handles) {
       FREE(cs->buffers);
-      return FALSE;
+      return false;
    }
 
    cs->flags = CALLOC(1, cs->max_num_buffers);
    if (!cs->flags) {
       FREE(cs->handles);
       FREE(cs->buffers);
-      return FALSE;
+      return false;
    }
 
    for (i = 0; i < ARRAY_SIZE(cs->buffer_indices_hashlist); i++) {
@@ -556,7 +556,7 @@ static boolean amdgpu_init_cs_context(struct amdgpu_cs_context *cs,
    cs->ib[IB_CONST_PREAMBLE].flags = AMDGPU_IB_FLAG_CE |
                                      AMDGPU_IB_FLAG_PREAMBLE;
 
-   return TRUE;
+   return true;
 }
 
 static void amdgpu_cs_context_cleanup(struct amdgpu_cs_context *cs)
@@ -698,9 +698,9 @@ static int amdgpu_cs_lookup_buffer(struct radeon_winsys_cs *rcs,
    return amdgpu_lookup_buffer(cs->csc, (struct amdgpu_winsys_bo*)buf);
 }
 
-static boolean amdgpu_cs_validate(struct radeon_winsys_cs *rcs)
+static bool amdgpu_cs_validate(struct radeon_winsys_cs *rcs)
 {
-   return TRUE;
+   return true;
 }
 
 static bool amdgpu_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw)
@@ -784,7 +784,8 @@ static bool amdgpu_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw)
    return true;
 }
 
-static boolean amdgpu_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt)
+static bool amdgpu_cs_memory_below_limit(struct radeon_winsys_cs *rcs,
+                                         uint64_t vram, uint64_t gtt)
 {
    struct amdgpu_cs *cs = amdgpu_cs(rcs);
    struct amdgpu_winsys *ws = cs->ctx->ws;
@@ -823,7 +824,7 @@ static unsigned amdgpu_cs_get_buffer_list(struct radeon_winsys_cs *rcs,
     return cs->num_buffers;
 }
 
-DEBUG_GET_ONCE_BOOL_OPTION(all_bos, "RADEON_ALL_BOS", FALSE)
+DEBUG_GET_ONCE_BOOL_OPTION(all_bos, "RADEON_ALL_BOS", false)
 
 /* Since the kernel driver doesn't synchronize execution between different
  * rings automatically, we have to add fence dependencies manually.
@@ -965,7 +966,7 @@ void amdgpu_cs_sync_flush(struct radeon_winsys_cs *rcs)
       util_queue_job_wait(&cs->flush_completed);
 }
 
-DEBUG_GET_ONCE_BOOL_OPTION(noop, "RADEON_NOOP", FALSE)
+DEBUG_GET_ONCE_BOOL_OPTION(noop, "RADEON_NOOP", false)
 
 static void amdgpu_cs_flush(struct radeon_winsys_cs *rcs,
                             unsigned flags,
@@ -1088,9 +1089,9 @@ static void amdgpu_cs_destroy(struct radeon_winsys_cs *rcs)
    FREE(cs);
 }
 
-static boolean amdgpu_bo_is_referenced(struct radeon_winsys_cs *rcs,
-                                       struct pb_buffer *_buf,
-                                       enum radeon_bo_usage usage)
+static bool amdgpu_bo_is_referenced(struct radeon_winsys_cs *rcs,
+                                    struct pb_buffer *_buf,
+                                    enum radeon_bo_usage usage)
 {
    struct amdgpu_cs *cs = amdgpu_cs(rcs);
    struct amdgpu_winsys_bo *bo = (struct amdgpu_winsys_bo*)_buf;
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
index a7f3414269f..f56b5a5a16e 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
@@ -182,7 +182,7 @@ amdgpu_cs_from_ib(struct amdgpu_ib *ib)
    }
 }
 
-static inline boolean
+static inline bool
 amdgpu_bo_is_referenced_by_cs(struct amdgpu_cs *cs,
                               struct amdgpu_winsys_bo *bo)
 {
@@ -191,7 +191,7 @@ amdgpu_bo_is_referenced_by_cs(struct amdgpu_cs *cs,
          (num_refs && amdgpu_lookup_buffer(cs->csc, bo) != -1);
 }
 
-static inline boolean
+static inline bool
 amdgpu_bo_is_referenced_by_cs_with_usage(struct amdgpu_cs *cs,
                                          struct amdgpu_winsys_bo *bo,
                                          enum radeon_bo_usage usage)
@@ -199,16 +199,16 @@ amdgpu_bo_is_referenced_by_cs_with_usage(struct amdgpu_cs *cs,
    int index;
 
    if (!bo->num_cs_references)
-      return FALSE;
+      return false;
 
    index = amdgpu_lookup_buffer(cs->csc, bo);
    if (index == -1)
-      return FALSE;
+      return false;
 
    return (cs->csc->buffers[index].usage & usage) != 0;
 }
 
-static inline boolean
+static inline bool
 amdgpu_bo_is_referenced_by_any_cs(struct amdgpu_winsys_bo *bo)
 {
    return bo->num_cs_references != 0;
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index 54b30bf6959..72afc764e14 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -93,7 +93,7 @@ static unsigned cik_get_num_tile_pipes(struct amdgpu_gpu_info *info)
 }
 
 /* Helper function to do the ioctls needed for setup and init. */
-static boolean do_winsys_init(struct amdgpu_winsys *ws, int fd)
+static bool do_winsys_init(struct amdgpu_winsys *ws, int fd)
 {
    struct amdgpu_buffer_size_alignments alignment_info = {};
    struct amdgpu_heap_info vram, gtt;
@@ -270,12 +270,12 @@ static boolean do_winsys_init(struct amdgpu_winsys *ws, int fd)
    ws->info.has_uvd = uvd.available_rings != 0;
    ws->info.vce_fw_version =
          vce.available_rings ? vce_version : 0;
-   ws->info.has_userptr = TRUE;
+   ws->info.has_userptr = true;
    ws->info.num_render_backends = ws->amdinfo.rb_pipes;
    ws->info.clock_crystal_freq = ws->amdinfo.gpu_counter_freq;
    ws->info.num_tile_pipes = cik_get_num_tile_pipes(&ws->amdinfo);
    ws->info.pipe_interleave_bytes = 256 << ((ws->amdinfo.gb_addr_cfg >> 4) & 0x7);
-   ws->info.has_virtual_memory = TRUE;
+   ws->info.has_virtual_memory = true;
    ws->info.has_sdma = dma.available_rings != 0;
 
    /* Get the number of good compute units. */
@@ -296,14 +296,14 @@ static boolean do_winsys_init(struct amdgpu_winsys *ws, int fd)
 
    ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL;
 
-   return TRUE;
+   return true;
 
 fail:
    if (ws->addrlib)
       AddrDestroy(ws->addrlib);
    amdgpu_device_deinitialize(ws->dev);
    ws->dev = NULL;
-   return FALSE;
+   return false;
 }
 
 static void amdgpu_winsys_destroy(struct radeon_winsys *rws)
@@ -327,11 +327,11 @@ static void amdgpu_winsys_query_info(struct radeon_winsys *rws,
    *info = ((struct amdgpu_winsys *)rws)->info;
 }
 
-static boolean amdgpu_cs_request_feature(struct radeon_winsys_cs *rcs,
-                                         enum radeon_feature_id fid,
-                                         boolean enable)
+static bool amdgpu_cs_request_feature(struct radeon_winsys_cs *rcs,
+                                      enum radeon_feature_id fid,
+                                      bool enable)
 {
-   return FALSE;
+   return false;
 }
 
 static uint64_t amdgpu_query_value(struct radeon_winsys *rws,
@@ -397,7 +397,7 @@ static int compare_dev(void *key1, void *key2)
    return key1 != key2;
 }
 
-DEBUG_GET_ONCE_BOOL_OPTION(thread, "RADEON_THREAD", TRUE)
+DEBUG_GET_ONCE_BOOL_OPTION(thread, "RADEON_THREAD", true)
 
 static bool amdgpu_winsys_unref(struct radeon_winsys *rws)
 {