diff options
author | Rob Clark <[email protected]> | 2015-02-26 15:13:10 -0500 |
---|---|---|
committer | Rob Clark <[email protected]> | 2015-03-03 10:41:00 -0500 |
commit | 9d732d3125e1b39788a642a5723aeb54cb1983f3 (patch) | |
tree | 38fb76e3addbf84eb54634cddfa359436797512a /src/gallium/drivers | |
parent | 20b50a071271e2caf8a4c3d4fd72f877af8a18d9 (diff) |
freedreno/ir3: add support for memory (cat6) instructions
Scheduled basically the same as texture (cat5) instructions, using (sy)
flag for synchronization.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3.h | 8 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_depth.c | 2 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_legalize.c | 2 |
3 files changed, 8 insertions, 4 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3.h b/src/gallium/drivers/freedreno/ir3/ir3.h index a3bbba941ce..f90392b7297 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3.h +++ b/src/gallium/drivers/freedreno/ir3/ir3.h @@ -420,6 +420,11 @@ static inline bool is_tex(struct ir3_instruction *instr) return (instr->category == 5); } +static inline bool is_mem(struct ir3_instruction *instr) +{ + return (instr->category == 6); +} + static inline bool is_input(struct ir3_instruction *instr) { return (instr->category == 2) && (instr->opc == OPC_BARY_F); @@ -508,9 +513,6 @@ int ir3_block_ra(struct ir3_block *block, enum shader_t type, void ir3_block_legalize(struct ir3_block *block, bool *has_samp, int *max_bary); -#ifndef ARRAY_SIZE -# define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) -#endif /* ************************************************************************* */ /* split this out or find some helper to use.. like main/bitset.h.. */ diff --git a/src/gallium/drivers/freedreno/ir3/ir3_depth.c b/src/gallium/drivers/freedreno/ir3/ir3_depth.c index 76413d41589..8ff62ba70a6 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_depth.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_depth.c @@ -67,7 +67,7 @@ int ir3_delayslots(struct ir3_instruction *assigner, return 6; /* handled via sync flags: */ - if (is_sfu(assigner) || is_tex(assigner)) + if (is_sfu(assigner) || is_tex(assigner) || is_mem(assigner)) return 0; /* assigner must be alu: */ diff --git a/src/gallium/drivers/freedreno/ir3/ir3_legalize.c b/src/gallium/drivers/freedreno/ir3/ir3_legalize.c index 2ef11f183d7..11629f61f73 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_legalize.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_legalize.c @@ -168,6 +168,8 @@ static void legalize(struct ir3_legalize_ctx *ctx) */ ctx->has_samp = true; regmask_set(&needs_sy, n->regs[0]); + } else if (is_mem(n)) { + regmask_set(&needs_sy, n->regs[0]); } /* both tex/sfu appear to not always immediately consume |