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authorTimothy Arceri <tarceri@itsqueeze.com>2019-02-12 10:36:35 +1100
committerTimothy Arceri <tarceri@itsqueeze.com>2019-02-20 10:46:19 +1100
commit94a3df62d75344c0666d9bb60650921e176bf666 (patch)
tree05c16ee666a80b0071c0329d707b0ce1b2f62c55 /src/gallium/drivers
parent05cc1dd764e076366c7811956079d3f8091271d0 (diff)
radeonsi/nir: set colors_read properly
shader-db results for VEGA64: Totals from affected shaders: SGPRS: 1976 -> 1976 (0.00 %) VGPRS: 1240 -> 1144 (-7.74 %) Spilled SGPRs: 145 -> 145 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 34632 -> 34604 (-0.08 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 261 -> 285 (9.20 %) Wait states: 0 -> 0 (0.00 %) Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeonsi/si_shader_nir.c17
1 files changed, 10 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index a151182bf8f..7e98eb39152 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -74,9 +74,18 @@ static void gather_intrinsic_load_deref_info(const nir_shader *nir,
}
break;
}
- default:
+ default: {
+ unsigned semantic_name, semantic_index;
+ tgsi_get_gl_varying_semantic(var->data.location, true,
+ &semantic_name, &semantic_index);
+
+ if (semantic_name == TGSI_SEMANTIC_COLOR) {
+ uint8_t mask = nir_ssa_def_components_read(&instr->dest.ssa);
+ info->colors_read |= mask << (semantic_index * 4);
+ }
break;
}
+ }
}
static void scan_instruction(const struct nir_shader *nir,
@@ -495,12 +504,6 @@ void si_nir_scan_shader(const struct nir_shader *nir,
info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
break;
}
-
- /* TODO make this more precise */
- if (variable->data.location == VARYING_SLOT_COL0)
- info->colors_read |= 0x0f;
- else if (variable->data.location == VARYING_SLOT_COL1)
- info->colors_read |= 0xf0;
}
}