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authorKristian H. Kristensen <[email protected]>2019-03-26 10:31:54 -0700
committerKristian H. Kristensen <[email protected]>2019-03-27 13:26:02 -0700
commit893425a607a63a83e8a4c13fd963367c8d174678 (patch)
tree8854bd3625f9fbf5706dbd934f7c9f3f8fe37ded /src/gallium/drivers
parent3c8779af325965a6c200b14ab4cc44c8f0b835e8 (diff)
freedreno/ir3: Push UBOs to constant file
We have a rather big constant file and it seems that the best way to use it is to upload all UBOs and lower UBO access the load_uniform. Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_emit.c15
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_gallium.c16
2 files changed, 27 insertions, 4 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index b48a0d68fde..75c8c91d897 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -72,11 +72,10 @@ fd6_emit_const(struct fd_ringbuffer *ring, gl_shader_stage type,
uint32_t regid, uint32_t offset, uint32_t sizedwords,
const uint32_t *dwords, struct pipe_resource *prsc)
{
- uint32_t i, sz;
+ uint32_t i, sz, align_sz;
enum a6xx_state_src src;
debug_assert((regid % 4) == 0);
- debug_assert((sizedwords % 4) == 0);
if (prsc) {
sz = 0;
@@ -86,12 +85,14 @@ fd6_emit_const(struct fd_ringbuffer *ring, gl_shader_stage type,
src = SS6_DIRECT;
}
- OUT_PKT7(ring, shader_t_to_opcode(type), 3 + sz);
+ align_sz = align(sz, 4);
+
+ OUT_PKT7(ring, shader_t_to_opcode(type), 3 + align_sz);
OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(regid/4) |
CP_LOAD_STATE6_0_STATE_TYPE(ST6_CONSTANTS) |
CP_LOAD_STATE6_0_STATE_SRC(src) |
CP_LOAD_STATE6_0_STATE_BLOCK(fd6_stage2shadersb(type)) |
- CP_LOAD_STATE6_0_NUM_UNIT(sizedwords/4));
+ CP_LOAD_STATE6_0_NUM_UNIT(DIV_ROUND_UP(sizedwords, 4)));
if (prsc) {
struct fd_bo *bo = fd_resource(prsc)->bo;
OUT_RELOC(ring, bo, offset, 0, 0);
@@ -100,9 +101,15 @@ fd6_emit_const(struct fd_ringbuffer *ring, gl_shader_stage type,
OUT_RING(ring, CP_LOAD_STATE6_2_EXT_SRC_ADDR_HI(0));
dwords = (uint32_t *)&((uint8_t *)dwords)[offset];
}
+
for (i = 0; i < sz; i++) {
OUT_RING(ring, dwords[i]);
}
+
+ /* Zero-pad to multiple of 4 dwords */
+ for (i = sz; i < align_sz; i++) {
+ OUT_RING(ring, 0);
+ }
}
static void
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_gallium.c b/src/gallium/drivers/freedreno/ir3/ir3_gallium.c
index 4481c544217..2d9516ade5c 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_gallium.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_gallium.c
@@ -254,6 +254,22 @@ emit_user_consts(struct fd_context *ctx, const struct ir3_shader_variant *v,
cb->user_buffer, cb->buffer);
}
}
+
+ struct ir3_ubo_analysis_state *state;
+ state = &v->shader->ubo_state;
+
+ for (uint32_t i = 1; i < ARRAY_SIZE(state->range); i++) {
+ struct pipe_constant_buffer *cb = &constbuf->cb[i];
+
+ if (state->range[i].start < state->range[i].end &&
+ constbuf->enabled_mask & (1 << i)) {
+
+ ctx->emit_const(ring, v->type, state->range[i].offset / 4,
+ cb->buffer_offset + state->range[i].start,
+ (state->range[i].end - state->range[i].start) / 4,
+ cb->user_buffer, cb->buffer);
+ }
+ }
}
static void