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author | Mario Kleiner <[email protected]> | 2019-01-07 19:42:29 +0100 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2019-01-09 11:08:44 -0500 |
commit | 5e30e54e057300f65019c927482e633c367963fc (patch) | |
tree | 30253b1a1649f44bd3f55d29bca7e0e44ee69eec /src/gallium/drivers | |
parent | ee8488ea3b99ad0632e5eac6defcef0264d8782c (diff) |
radeonsi: Fix use of 1- or 2- component GL_DOUBLE vbo's.
With Mesa 18.1, commit be973ed21f6e, si_llvm_load_input_vs()
changed the number of source 32-bit wide dword components
used for fetching vertex attributes into the vertex shader
from a constant 4 to a variable num_channels number, depending
on input data format, with some special case handling for
input data formats like 64-Bit doubles.
In the case of a GL_DOUBLE input data format with one
or two components though, e.g, submitted via ...
a) glTexCoordPointer(1, GL_DOUBLE, 0, buffer);
b) glTexCoordPointer(2, GL_DOUBLE, 0, buffer);
... the input format would be SI_FIX_FETCH_RG_64_FLOAT,
but no special case handling was implemented for that
case, so in the default path the number of 32-bit
dwords would be set to the number of float input components
derived from info->input_usage_mask. This ends with corrupted
input to the vertex shader, because fetching a 64-bit double
from the vbo requires fetching two 32-bit dwords instead of 1,
and fetching a two double input requires 4 dword fetches
instead of 2, so in these cases the vertex shader receives
incomplete/truncated input data:
a) float v = gl_MultiTexCoord0.x; -> v.x is corrupted.
b) vec2 v = gl_MultiTexCoord0.xy; -> v.x is assigned
correctly, but v.y is corrupted.
This happens with the standard TGSI IR compiled shaders.
Under NIR with R600_DEBUG=nir, we got correct behavior
because the current radeonsi nir code always assigns
info->input_usage_mask = TGSI_WRITEMASK_XYZW, thereby
always fetches 4 dwords regardless of what the shader
actually needs.
Fix this by properly assigning 2 or 4 dword fetches for
one or two component GL_DOUBLE input.
Fixes: be973ed21f6e ("radeonsi: load the right number of
components for VS inputs and TBOs")
Signed-off-by: Mario Kleiner <[email protected]>
Cc: [email protected]
Cc: Marek Olšák <[email protected]>
Signed-off-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index f64fb2e959f..b7f449640d7 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -563,6 +563,14 @@ void si_llvm_load_input_vs( /* Do multiple loads for special formats. */ switch (fix_fetch) { + case SI_FIX_FETCH_RG_64_FLOAT: + num_fetches = 1; /* 1 2-dword or 4-dword load */ + fetch_stride = 0; + if (util_last_bit(info->input_usage_mask[input_index]) >= 2) + num_channels = 4; /* 2 doubles in 4 dwords */ + else + num_channels = 2; /* 1 double in 2 dwords */ + break; case SI_FIX_FETCH_RGB_64_FLOAT: num_fetches = 3; /* 3 2-dword loads */ fetch_stride = 8; |