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| author | Nicolai Hähnle <[email protected]> | 2016-09-07 10:50:14 +0200 |
|---|---|---|
| committer | Nicolai Hähnle <[email protected]> | 2016-09-12 13:54:59 +0200 |
| commit | 11cbf4d7aea861e37067407ba7a660ea566c1593 (patch) | |
| tree | 20eddeb7982c07dcde7ce6a40fafc8b4065a1cd1 /src/gallium/drivers/virgl/virgl_winsys.h | |
| parent | 480ac143df281fef762e30f92bccc3b89674fef8 (diff) | |
winsys/amdgpu: use only one fence per BO
The fence that is added to the BO during flush is guaranteed to be
signaled after all the fences that were in the fences array of the BO
before the flush, because those fences are added as dependencies for the
submission (and all this happens atomically under the bo_fence_lock).
Therefore, keeping only the last fence around is sufficient.
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/virgl/virgl_winsys.h')
0 files changed, 0 insertions, 0 deletions