diff options
author | Eric Anholt <[email protected]> | 2014-08-24 16:51:32 -0700 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2014-09-04 11:39:51 -0700 |
commit | 874dfa8b2ecccf3c9a73453d7ccc6638363a59bd (patch) | |
tree | be821f68c78f6785282b2d620b84c122effd57a7 /src/gallium/drivers/vc4/vc4_qir.h | |
parent | 3972a6f057e20ec9e8358f4487c3b4d51c499628 (diff) |
vc4: Expose compares at a lower level in QIR.
Before, we had some special opcodes like CMP and SNE that emitted multiple
instructions. Now, we reduce those operations significantly, giving
optimization more to look at for reducing redundant operations.
The downside is that QOP_SF is pretty special -- we're going to have to
track it separately when we're doing instruction scheduling, and we want
to peephole it into the instruction generating the destination write in
most cases (and not allocate the destination reg, probably. Unless it's
used for some other purpose, as well).
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_qir.h')
-rw-r--r-- | src/gallium/drivers/vc4/vc4_qir.h | 37 |
1 files changed, 24 insertions, 13 deletions
diff --git a/src/gallium/drivers/vc4/vc4_qir.h b/src/gallium/drivers/vc4/vc4_qir.h index 77b5f1af903..99df99c1a07 100644 --- a/src/gallium/drivers/vc4/vc4_qir.h +++ b/src/gallium/drivers/vc4/vc4_qir.h @@ -54,11 +54,21 @@ enum qop { QOP_FMINABS, QOP_FMAXABS, - QOP_SEQ, - QOP_SNE, - QOP_SGE, - QOP_SLT, - QOP_CMP, + /* Sets the flag register according to src. */ + QOP_SF, + + /* Note: Orderings of these compares must be the same as in + * qpu_defines.h. Selects the src[0] if the ns flag bit is set, + * otherwise 0. */ + QOP_SEL_X_0_ZS, + QOP_SEL_X_0_ZC, + QOP_SEL_X_0_NS, + QOP_SEL_X_0_NC, + /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */ + QOP_SEL_X_Y_ZS, + QOP_SEL_X_Y_ZC, + QOP_SEL_X_Y_NS, + QOP_SEL_X_Y_NC, QOP_FTOI, QOP_ITOF, @@ -260,6 +270,15 @@ QIR_ALU1(MOV) QIR_ALU2(FADD) QIR_ALU2(FSUB) QIR_ALU2(FMUL) +QIR_NODST_1(SF) +QIR_ALU1(SEL_X_0_ZS) +QIR_ALU1(SEL_X_0_ZC) +QIR_ALU1(SEL_X_0_NS) +QIR_ALU1(SEL_X_0_NC) +QIR_ALU2(SEL_X_Y_ZS) +QIR_ALU2(SEL_X_Y_ZC) +QIR_ALU2(SEL_X_Y_NS) +QIR_ALU2(SEL_X_Y_NC) QIR_ALU2(FMIN) QIR_ALU2(FMAX) QIR_ALU2(FMINABS) @@ -284,14 +303,6 @@ QIR_ALU0(FRAG_RCP_W) QIR_NODST_1(TLB_DISCARD_SETUP) static inline struct qreg -qir_CMP(struct qcompile *c, struct qreg cmp, struct qreg a, struct qreg b) -{ - struct qreg t = qir_get_temp(c); - qir_emit(c, qir_inst4(QOP_CMP, t, cmp, a, b, c->undef)); - return t; -} - -static inline struct qreg qir_R4_UNPACK(struct qcompile *c, int i) { struct qreg t = qir_get_temp(c); |