vc4: Expose compares at a lower level in QIR.

Before, we had some special opcodes like CMP and SNE that emitted multiple
instructions.  Now, we reduce those operations significantly, giving
optimization more to look at for reducing redundant operations.

The downside is that QOP_SF is pretty special -- we're going to have to
track it separately when we're doing instruction scheduling, and we want
to peephole it into the instruction generating the destination write in
most cases (and not allocate the destination reg, probably.  Unless it's
used for some other purpose, as well).

1 files changed, 6 insertions, 3 deletions

diff --git a/src/gallium/drivers/vc4/vc4_opt_algebraic.c b/src/gallium/drivers/vc4/vc4_opt_algebraic.c
index 2bf474ccef9..f8ed6218adc 100644
--- a/src/gallium/drivers/vc4/vc4_opt_algebraic.c
+++ b/src/gallium/drivers/vc4/vc4_opt_algebraic.c
@@ -45,9 +45,12 @@ qir_opt_algebraic(struct qcompile *c)
                 struct qinst *inst = (struct qinst *)node;
 
                 switch (inst->op) {
-                case QOP_CMP:
-                        /* Turn "dst = (a < 0) ? b : b)" into "dst = b" */
-                        if (qir_reg_equals(inst->src[1], inst->src[2])) {
+                case QOP_SEL_X_Y_ZS:
+                case QOP_SEL_X_Y_ZC:
+                case QOP_SEL_X_Y_NS:
+                case QOP_SEL_X_Y_NC:
+                        /* Turn "dst = (sf == x) ? a : a)" into "dst = a" */
+                        if (qir_reg_equals(inst->src[0], inst->src[1])) {
                                 if (debug) {
                                         fprintf(stderr, "optimizing: ");
                                         qir_dump_inst(inst);