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authorMarek Olšák <[email protected]>2014-08-06 23:58:10 +0200
committerMarek Olšák <[email protected]>2014-08-11 21:53:57 +0200
commitc10332bbb8889d733bdaa729ef23cbd90176b55d (patch)
tree3ffd8ddb9bcc10daae13c081c5e8bbc5ac052150 /src/gallium/drivers/radeonsi
parent718d4b97efc5792c09b824c909d1ec2998738c02 (diff)
gallium: remove PIPE_SHADER_CAP_MAX_ADDRS
This limit is fixed in Mesa core and cannot be changed. It only affects ARB_vertex_program and ARB_fragment_program. The minimum value for ARB_vertex_program is 1 according to the spec. The maximum value for ARB_vertex_program is limited to 1 by Mesa core. The value should be zero for ARB_fragment_program, because it doesn't support ARL. Finally, drivers shouldn't mess with these values arbitrarily. Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 85b57f4b3bd..592069746d9 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -348,9 +348,6 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
return shader == PIPE_SHADER_VERTEX ? SI_NUM_VERTEX_BUFFERS : 32;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 256; /* Max native temporaries. */
- case PIPE_SHADER_CAP_MAX_ADDRS:
- /* FIXME Isn't this equal to TEMPS? */
- return 1; /* Max native address registers */
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
return 4096 * sizeof(float[4]); /* actually only memory limits this */
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: