diff options
| author | Michel Dänzer <[email protected]> | 2013-08-06 10:45:50 +0200 |
|---|---|---|
| committer | Michel Dänzer <[email protected]> | 2013-08-06 12:50:01 +0200 |
| commit | 46b6f79fea1042604ebb61a8214188fb807316ff (patch) | |
| tree | 376d0f8e02fc65faae60ceb553961dd251666c5e /src/gallium/drivers/radeonsi/si_state_draw.c | |
| parent | 59f22148b361a5e1c06d9f5b200666afa854473c (diff) | |
radeonsi: Number of SGPRs retrieved from LLVM already includes VCC
Fixes spurious 'Assertion `num_sgprs <= 104' failed.' with shaders using
all 104 SGPRs.
Cc: [email protected]
Reviewed-by: Christian König <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state_draw.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 29d960d2403..0d1bd818e46 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -91,10 +91,10 @@ static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *s num_user_sgprs = SI_VS_NUM_USER_SGPR; num_sgprs = shader->num_sgprs; - if (num_user_sgprs > num_sgprs) - num_sgprs = num_user_sgprs; - /* Last 2 reserved SGPRs are used for VCC */ - num_sgprs += 2; + if (num_user_sgprs > num_sgprs) { + /* Last 2 reserved SGPRs are used for VCC */ + num_sgprs = num_user_sgprs + 2; + } assert(num_sgprs <= 104); vgpr_comp_cnt = shader->shader.uses_instanceid ? 3 : 0; @@ -235,10 +235,10 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s num_user_sgprs = SI_PS_NUM_USER_SGPR; num_sgprs = shader->num_sgprs; - if (num_user_sgprs > num_sgprs) - num_sgprs = num_user_sgprs; - /* Last 2 reserved SGPRs are used for VCC */ - num_sgprs += 2; + if (num_user_sgprs > num_sgprs) { + /* Last 2 reserved SGPRs are used for VCC */ + num_sgprs = num_user_sgprs + 2; + } assert(num_sgprs <= 104); si_pm4_set_reg(pm4, R_00B028_SPI_SHADER_PGM_RSRC1_PS, |