diff options
author | Marek Olšák <[email protected]> | 2018-04-04 21:43:28 -0400 |
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committer | Marek Olšák <[email protected]> | 2018-04-27 17:56:04 -0400 |
commit | c732d069b3a4a5fefb353d01d17834ce2c548ae6 (patch) | |
tree | 3ec2bcc1754ee05c9886612f9300fcd503d8cf4b /src/gallium/drivers/radeonsi/si_state.c | |
parent | 9ef423f72038e35ef914e081876ddabcd05b93a9 (diff) |
radeonsi: implement DCC fast clear swizzle constraints more accurately
Reduce swizzle constraints to the ALPHA_IS_ON_MSB constraint and the clear
value of 1.
This significantly changes the DCC fast clear code, and fixes fast clear
for RGB formats without alpha.
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index fee4f06dbee..7e306665f46 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -3742,9 +3742,7 @@ si_make_texture_descriptor(struct si_screen *screen, } if (tex->dcc_offset) { - unsigned swap = si_translate_colorswap(pipe_format, false); - - state[6] = S_008F28_ALPHA_IS_ON_MSB(swap <= 1); + state[6] = S_008F28_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(pipe_format)); } else { /* The last dword is unused by hw. The shader uses it to clear * bits in the first dword of sampler state. |